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1. 发明申请

US20110145490A1 DEVICE AND METHOD OF CONTROLLING FLASH MEMORY 有权
标题翻译：控制闪速存储器的装置和方法
公开(公告)号：US20110145490A1
公开(公告)日：2011-06-16
申请号：US13058314
申请日：2008-09-04
申请人： Jongmin Lee , Donghee Lee , Hanmook Park
发明人： Jongmin Lee , Donghee Lee , Hanmook Park
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7211 , G11C16/102
摘要： Disclosed is a flash memory controlling method and controlling device. The flash memory controlling method including calculating a cost for each of available block recycling schemes based on a multi-block erase function when the multi-block erase function is supported, the multi-block erase function being a function that simultaneously erases data stored in a plurality of blocks of a flash memory and selecting at least one scheme from among the available block recycling schemes based on the calculated cost, and managing at least one block using the at least one method selected from among the available block recycling schemes.
摘要翻译：公开了一种闪存控制方法和控制装置。闪速存储器控制方法包括当支持多块擦除功能时基于多块擦除功能计算每个可用块再循环方案的成本，多块擦除功能是同时擦除存储在多个块的闪速存储器，并且基于所计算的成本从可用块回收方案中选择至少一个方案，以及使用从可用块回收方案中选择的至少一种方法来管理至少一个块。

2. 发明授权

US08554986B2 Device and method of controlling flash memory 有权
标题翻译：控制闪存的设备和方法
公开(公告)号：US08554986B2
公开(公告)日：2013-10-08
申请号：US13058314
申请日：2008-09-04
申请人： Jongmin Lee , Donghee Lee , Hanmook Park
发明人： Jongmin Lee , Donghee Lee , Hanmook Park
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7211 , G11C16/102
摘要： Disclosed is a flash memory controlling method and controlling device. The flash memory controlling method including calculating a cost for each of available block recycling schemes based on a multi-block erase function when the multi-block erase function is supported, the multi-block erase function being a function that simultaneously erases data stored in a plurality of blocks of a flash memory and selecting at least one scheme from among the available block recycling schemes based on the calculated cost, and managing at least one block using the at least one method selected from among the available block recycling schemes.
摘要翻译：公开了一种闪存控制方法和控制装置。闪速存储器控制方法包括当支持多块擦除功能时基于多块擦除功能计算每个可用块再循环方案的成本，多块擦除功能是同时擦除存储在多个块的闪速存储器，并且基于所计算的成本从可用块回收方案中选择至少一个方案，以及使用从可用块回收方案中选择的至少一种方法来管理至少一个块。

3. 发明申请

US20100287427A1 Flash Memory Device and Flash Memory Programming Method Equalizing Wear-Level 有权
标题翻译：闪存设备和闪存编程方法均衡磨损级别
公开(公告)号：US20100287427A1
公开(公告)日：2010-11-11
申请号：US12811001
申请日：2008-08-25
申请人： Bumsoo Kim , Hyunmo Chung , Hanmook Park
发明人： Bumsoo Kim , Hyunmo Chung , Hanmook Park
IPC分类号： G06F11/25 , H03M13/00
CPC分类号： G11C16/3495 , G06F3/0679 , G06F11/00 , G06F11/0727 , G06F11/08 , G06F12/0246 , G06F17/30218 , G11C11/5628 , G11C13/0035 , G11C16/10 , G11C16/26 , G11C16/3436 , G11C16/344 , G11C16/349 , G11C29/36 , G11C2211/5647
摘要： Disclosed are a flash memory device and flash memory programming method that equalizes a wear-level. The flash memory device includes a memory cell array, an inversion determining unit to generate a programming page through inverting or not inverting a data page based on a number of ‘1’s and ‘0’s in the data page, a programming unit to store the generated programming page in the memory cell array; and a data verifying unit to read the programming page stored in the memory cell array, to restore the data page from the programming page according to whether an error exists in the read programming page, and to output the restored data page, and thereby can equalize a wear-level of a memory cell.
摘要翻译：公开了一种使磨损等级化的闪速存储器件和闪存编程方法。闪速存储器件包括存储单元阵列，反转确定单元，用于通过基于数据页中的“1”和“0”的数量来反转或不反相数据页生成编程页面，编程单元，用于存储所生成的编程页面在存储单元阵列中; 以及数据验证单元，用于读取存储在存储单元阵列中的编程页面，以根据读取编程页面中是否存在错误从编程页面恢复数据页面，并输出恢复的数据页面，从而可以均衡存储单元的磨损级别。

4. 发明授权

US08756464B2 Flash memory device and flash memory programming method equalizing wear-level 有权
标题翻译：闪存设备和闪存编程方法均衡磨损等级
公开(公告)号：US08756464B2
公开(公告)日：2014-06-17
申请号：US12811001
申请日：2008-08-25
申请人： Bumsoo Kim , Hyunmo Chung , Hanmook Park
发明人： Bumsoo Kim , Hyunmo Chung , Hanmook Park
IPC分类号： G11C29/00 , H03M13/00 , G11C11/34 , G11C5/14 , G06F13/00 , G11C16/34 , G11C16/10 , G11C11/56 , G11C29/36 , G11C13/00 , G06F3/06 , G06F11/00 , G06F11/07 , G06F11/08 , G06F12/02 , G06F17/30
CPC分类号： G11C16/3495 , G06F3/0679 , G06F11/00 , G06F11/0727 , G06F11/08 , G06F12/0246 , G06F17/30218 , G11C11/5628 , G11C13/0035 , G11C16/10 , G11C16/26 , G11C16/3436 , G11C16/344 , G11C16/349 , G11C29/36 , G11C2211/5647
摘要： Disclosed are a flash memory device and flash memory programming method that equalizes a wear-level. The flash memory device includes a memory cell array, an inversion determining unit to generate a programming page through inverting or not inverting a data page based on a number of ‘1’s and ‘0’s in the data page, a programming unit to store the generated programming page in the memory cell array; and a data verifying unit to read the programming page stored in the memory cell array, to restore the data page from the programming page according to whether an error exists in the read programming page, and to output the restored data page, and thereby can equalize a wear-level of a memory cell.
摘要翻译：公开了一种使磨损等级化的闪速存储器件和闪存编程方法。闪速存储器件包括存储单元阵列，反转确定单元，用于通过基于数据页中的“1”和“0”的数量来反转或不反相数据页生成编程页面，编程单元，用于存储所生成的编程页面在存储单元阵列中; 以及数据验证单元，用于读取存储在存储单元阵列中的编程页面，以根据读取编程页面中是否存在错误从编程页面恢复数据页面，并输出恢复的数据页面，从而可以均衡存储单元的磨损级别。

5. 发明申请

US20100287335A1 Read Enable Signal Adjusting Flash Memory Device and Read Control Method of Flash Memory Device 审中-公开
标题翻译：读取闪存设备的启用信号调整闪存设备和读取控制方法
公开(公告)号：US20100287335A1
公开(公告)日：2010-11-11
申请号：US12810984
申请日：2008-08-25
申请人： Hyunmo Chung , Hanmook Park
发明人： Hyunmo Chung , Hanmook Park
IPC分类号： G06F12/02
CPC分类号： G11C16/32 , G11C16/04 , G11C29/02 , G11C29/023 , G11C29/028 , G11C29/50012 , G11C2207/2254
摘要： Disclosed is a flash memory device for adjusting a read signal timing and read control method of the flash memory device. The flash memory device includes a plurality of flash memory units, a common input/output bus connected with each of the plurality of flash memory units, and a controller to propagate the read control signal to a flash memory unit selected from among the plurality of flash memories and to receive data read from the selected flash memory unit via the common input/output bus, the controller being connected with the common input/output bus, wherein the controller adjusts a propagation timing of the read control signal unit based on a propagation delay corresponding to the selected flash memory unit, and thereby controlling a timing optimized for each flash memory unit.
摘要翻译：公开了一种用于调整闪速存储器件的读取信号定时和读取控制方法的闪速存储器件。闪速存储装置包括多个闪存单元，与多个闪存单元中的每一个连接的公共输入/输出总线，以及控制器，用于将读取的控制信号传播到从多个闪存中选择的闪存单元存储器，并且经由公共输入/输出总线接收从所选择的闪存单元读取的数据，控制器与公共输入/输出总线连接，其中控制器基于传播延迟来调整读取控制信号单元的传播定时对应于所选择的闪存单元，从而控制针对每个闪存单元优化的定时。

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