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1. 发明授权

US06587292B1 Magneto-resistive asymmetry compensation loop 有权
标题翻译：磁阻不对称补偿回路
公开(公告)号：US06587292B1
公开(公告)日：2003-07-01
申请号：US09546796
申请日：2000-04-11
申请人： Jonathan Ashley , James Wilson Rae , Stephen J. Franck
发明人： Jonathan Ashley , James Wilson Rae , Stephen J. Franck
IPC分类号： G11B5035
CPC分类号： G11B20/10055 , G11B5/09 , G11B20/10009 , G11B20/22
摘要： A magneto-resistive asymmetry compensation system includes a linearizer (61) interposed in a data path and a control loop (63). The control loop uses signal estimates from an interpolated timing response unit (25) to derive a magneto-resistive asymmetry error. The error term is used to obtain a control scaling input to the linearizer. The linearizer functions to multiply the scaling multiple to the square of the input signal and then add it back to the input signal.
摘要翻译：磁阻非对称补偿系统包括插入在数据路径中的线性化器（61）和控制回路（63）。控制环路使用来自内插定时响应单元（25）的信号估计来导出磁阻非对称误差。误差项用于获得对线性化器的控制缩放输入。线性化器用于将缩放倍数乘以输入信号的平方，然后将其添加回输入信号。

2. 发明授权

US06661590B2 Efficient analog front end for a read/write channel of a hard disk drive running from a highly regulated power supply 有权
公开(公告)号：US06661590B2
公开(公告)日：2003-12-09
申请号：US09865860
申请日：2001-05-25
申请人： Sasan Cyrusian , Stephen J. Franck , Sriharsha Annadore , Elmar Bach , Siegfried Hart , Thomas Blon , William G. Bliss , James Wilson Rae , Michael Ruegg , Ulrich Huewels , Fritz Mistlberger
发明人： Sasan Cyrusian , Stephen J. Franck , Sriharsha Annadore , Elmar Bach , Siegfried Hart , Thomas Blon , William G. Bliss , James Wilson Rae , Michael Ruegg , Ulrich Huewels , Fritz Mistlberger
IPC分类号： G11B509
CPC分类号： G11B5/02 , G11B5/012 , G11B20/10009
摘要： A method and apparatus for running an analog portion (162) of a read/write channel (108) from a highly regulated power supply (260). The apparatus includes an analog portion (162), a clock synthesizer (154), and a highly regulated power supply (260) connected to the analog portion (162) and the clock synthesizer (154). The analog portion (162) and the clock synthesizer (154) both comprise high voltage transistors which operate in a first voltage range and low voltage transistors which operate in a second voltage range, wherein the first voltage range is within the second voltage range. The highly regulated power supply (260) supplies power that is within the first voltage range to the analog portion (162) and the clock synthesizer (154). The method includes generating power that is within the first voltage range using the highly regulated power supply (260), and supplying the power to the analog portion (162) and the clock synthesizer (154).

3. 发明授权

US06853509B2 Acquisition signal error estimator 有权
标题翻译：采集信号误差估计器
公开(公告)号：US06853509B2
公开(公告)日：2005-02-08
申请号：US10322243
申请日：2002-12-17
申请人： Jonathan Ashley , Stephen J. Franck , Razmik Karabed
发明人： Jonathan Ashley , Stephen J. Franck , Razmik Karabed
IPC分类号： G11B5/09 , G11B20/10 , G11B20/22
CPC分类号： G11B20/10037 , G11B5/09 , G11B20/10009 , G11B20/10055 , G11B20/22
摘要： A system and method for acquisition signal error estimation is provided which uses one or more past values of the sequence to determine the nearest ideal sample value without comparing the received sample value to the potential sample values. According to one embodiment, the nearest ideal sample value is selected based on the received sample value and values of three consecutive samples. According to another embodiment, the nearest ideal sample value is selected based on the received sample value and a value of an immediately preceding sample. According yet to another embodiment, the nearest ideal sample value is selected based on the received sample value and a value of a previous sample. The acquisition signal error estimator maybe used in conjunction with gain, DC offset, or magneto-resistive asymmetry control loops in a sampled amplitude read channel.
摘要翻译：提供了一种用于采集信号误差估计的系统和方法，其使用该序列的一个或多个过去值来确定最接近的理想采样值，而不将接收到的采样值与潜在采样值相比较。根据一个实施例，基于接收到的采样值和三个连续样本的值来选择最接近的理想采样值。根据另一个实施例，基于所接收的采样值和紧接在前的样本的值来选择最接近的理想采样值。根据另一个实施例，基于所接收的采样值和先前样本的值来选择最接近的理想采样值。采集信号误差估计器可以与采样幅度读通道中的增益，直流偏移或磁阻不对称控制环路结合使用。

4. 发明授权

US06594094B2 Read/write channel 有权
标题翻译：读/写通道
公开(公告)号：US06594094B2
公开(公告)日：2003-07-15
申请号：US10025001
申请日：2001-12-18
申请人： James W. Rae , William Bliss , Jonathan Ashley , Razmik Karabed , Stephen J. Franck , Fritz Mistlberger , Matthias Driller , Heinrich Stockmanns , Dominik Margraf
发明人： James W. Rae , William Bliss , Jonathan Ashley , Razmik Karabed , Stephen J. Franck , Fritz Mistlberger , Matthias Driller , Heinrich Stockmanns , Dominik Margraf
IPC分类号： G11B502
CPC分类号： G11B20/10055 , G11B5/012 , G11B5/09 , G11B5/59688 , G11B5/6076 , G11B20/10009 , G11B20/10037
摘要： An improved sampled amplitude read/write channel is provided. The system is an integrated Generalized Partial Response Maximum Likelihood (GPRML) read channel incorporating Read, Write, and Servo modes of operation. One implementation includes a 32/34 rate parity code and matched Viterbi detector, a 32 state Viterbi detector optimal parity processor, robust frame synchronization, self-adaptive equalization, thermal asperity detection and compensation, adaptive magneto-resistive asymmetry compensation, low latency interpolated timing recovery and programmable write precompensation.
摘要翻译：提供了一种改进的采样幅度读/写通道。该系统是集成了读，写和伺服操作模式的集成广义部分响应最大似然（GPRML）读通道。一个实现包括32/34速率奇偶校验码和匹配维特比检测器，32状态维特比检测器最佳奇偶校验处理器，鲁棒帧同步，自适应均衡，热粗糙度检测和补偿，自适应磁阻不对称补偿，低延迟内插时序恢复和可编程预写。

5. 发明授权

US06549354B1 Acquisition signal error estimator 有权
公开(公告)号：US06549354B1
公开(公告)日：2003-04-15
申请号：US09653235
申请日：2000-08-31
申请人： Jonathan Ashley , Stephen J. Franck , Razmik Karabed
发明人： Jonathan Ashley , Stephen J. Franck , Razmik Karabed
IPC分类号： G11B509
CPC分类号： G11B20/10037 , G11B5/09 , G11B20/10009 , G11B20/10055 , G11B20/22
摘要： A system and method for acquisition signal error estimation is provided which uses one or more past values of the sequence to determine the nearest ideal sample value. According to one embodiment, four consecutive samples are used. According to another embodiment, two samples are used. The acquisition signal error estimator maybe used in conjunction with gain, DC offset, or magneto-resistive asymmetry control loops in a sampled amplitude read channel.

6. 发明授权

US06469851B1 Acquisition signal error estimator 有权
标题翻译：采集信号误差估计器
公开(公告)号：US06469851B1
公开(公告)日：2002-10-22
申请号：US09480314
申请日：2000-01-10
申请人： Jonathan Ashley , Stephen J. Franck
发明人： Jonathan Ashley , Stephen J. Franck
IPC分类号： G11B509
CPC分类号： G11B20/10055 , G11B5/09 , G11B20/10009 , G11B20/10037 , G11B20/22
摘要： A system and method for acquisition signal error estimation is provided which uses one or more past values of the sequence to determine the nearest ideal sample value. According to one embodiment, four consecutive samples are used. According to another embodiment, two samples are used. The acquisition signal error estimator maybe used in conjunction with gain, DC offset, or magneto-resistive asymmetry control loops in a sampled amplitude read channel.
摘要翻译：提供了一种用于采集信号误差估计的系统和方法，其使用该序列的一个或多个过去值来确定最接近的理想样本值。根据一个实施例，使用四个连续的样本。根据另一个实施例，使用两个样本。采集信号误差估计器可以与采样幅度读通道中的增益，直流偏移或磁阻不对称控制环路结合使用。

7. 发明授权

US07280005B2 AC coupling network with variable attenuation 失效
标题翻译：交流耦合网络具有可变衰减
公开(公告)号：US07280005B2
公开(公告)日：2007-10-09
申请号：US10738810
申请日：2003-12-17
申请人： James A. Bailey , Stephen J. Franck
发明人： James A. Bailey , Stephen J. Franck
IPC分类号： H03H7/24
CPC分类号： H04L25/0266
摘要： An AC coupling network has (a) a first pair of capacitances C1 connected between the input nodes and the output nodes and (b) a second pair of capacitances C2 cross-connected between the input nodes and the output nodes. The capacitances C1 and C2 are formed by sets of switched capacitors that can be configured to provide the network with different levels of attenuation while maintaining a constant AC coupling pole frequency. In particular, the sets of switched capacitors can be configured to ensure that C1+C2 remains constant, while C1−C2 varies. The present invention enables AC coupling to be implemented without using active devices such as operational amplifiers and/or buffers.
摘要翻译：交流耦合网络具有（a）连接在输入节点和输出节点之间的第一对电容C1，（b）在输入节点和输出节点之间交叉连接的第二对电容C 2。电容C 1和C 2由开关电容器组形成，其可被配置为在保持恒定的AC耦合极点频率的同时向网络提供不同程度的衰减。特别地，开关电容器组可被配置为确保C 1 + C 2保持恒定，而C 1 -C 2变化。本发明使得能够实现AC耦合而不使用诸如运算放大器和/或缓冲器的有源器件。

8. 发明授权

US5412344A Class AB amplifier with improved phase margin 失效
标题翻译： AB类放大器具有改善的相位裕量
公开(公告)号：US5412344A
公开(公告)日：1995-05-02
申请号：US155584
申请日：1993-11-19
申请人： Stephen J. Franck
发明人： Stephen J. Franck
IPC分类号： H03F1/08 , H03F3/30 , H03F3/45
CPC分类号： H03F3/3001 , H03F1/086
摘要： An amplifier circuit providing high power efficiency and an improved phase margin includes a transconductance input stage, one output of which is connected to an input of a class AB amplifier gain stage to form a compensation node, and the other output of which drives a current gain means, with the outputs of the current gain means and the class AB amplifier forming a current summing output node that is coupled to the compensation node through a compensation capacitor. The phase margin of the amplifier circuit is optimized by selecting the gain of the current gain means to be approximately equal to one plus the ratio of the capacitance of the load to the capacitance of the compensation capacitor.
摘要翻译：提供高功率效率和改善的相位裕度的放大器电路包括跨导输入级，其一个输出端连接到AB类放大器增益级的输入端以形成补偿节点，而另一个输出驱动电流增益意味着当前增益装置和AB类放大器的输出形成通过补偿电容器耦合到补偿节点的电流求和输出节点。通过选择电流增益装置的增益近似等于1加上负载的电容与补偿电容的电容的比例来优化放大器电路的相位裕度。

9. 发明授权

US06720832B2 System and method for converting from single-ended to differential signals 有权
标题翻译：从单端到差分信号转换的系统和方法
公开(公告)号：US06720832B2
公开(公告)日：2004-04-13
申请号：US10184274
申请日：2002-06-26
申请人： Stephen J. Franck , Zabih Toosky
发明人： Stephen J. Franck , Zabih Toosky
IPC分类号： H03F304
CPC分类号： H03F3/345 , H03F1/26 , H03F3/265 , H03F2200/372
摘要： A single-ended signal is converted to differential signals with a first device that converts an input current of a single-ended input signal to a voltage, a second device coupled to the first device to generate a first output current of a double-ended output signal based on the voltage, and a third device coupled to the first device to generate a second complementary output current of the double-ended output signal based on the voltage. The output currents can be amplified by a gain with respect to the input current, and the gain can be set a relative size of the first device with respect to each of the second and third devices. A fourth device can balance the current gain of the first device and cause the current through the second device and the third device to be equal.
摘要翻译：单端信号被转换成具有将单端输入信号的输入电流转换为电压的第一器件的差分信号，耦合到第一器件的第二器件产生双端输出的第一输出电流基于电压的信号，以及耦合到第一器件的第三器件，以基于电压产生双端输出信号的第二互补输出电流。可以通过相对于输入电流的增益放大输出电流，并且可以将增益设置为相对于第二和第三器件中的每一个的第一器件的相对大小。第四设备可以平衡第一设备的当前增益，并使通过第二设备和第三设备的电流相等。

10. 发明授权

US06429747B2 System and method for converting from single-ended to differential signals 有权
公开(公告)号：US06429747B2
公开(公告)日：2002-08-06
申请号：US09813241
申请日：2001-03-20
申请人： Stephen J. Franck , Zabih Toosky
发明人： Stephen J. Franck , Zabih Toosky
IPC分类号： H03F304
CPC分类号： H03F3/345 , H03F1/26 , H03F3/265 , H03F2200/372
摘要： The present invention relates to a conversion circuit that converts a single-ended signal to differential signals. According to an embodiment of the present invention, crosstalk is avoided by insuring that none of the transistors in the conversion circuit are directly connected to ground. By not having a transistor directly connected to ground, ground current is avoided and crosstalk associated with ground current is eliminated.

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