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    • 6. 发明授权
    • Ferroelectric device with bismuth tantalate capping layer and method of making same
    • 具有钽酸铋盖层的铁电元件及其制造方法
    • US06437380B1
    • 2002-08-20
    • US09819542
    • 2001-03-28
    • Myoungho LimVikram JoshiNarayan SolayappanLarry D. McMillanCarlos A. Paz de Araujo
    • Myoungho LimVikram JoshiNarayan SolayappanLarry D. McMillanCarlos A. Paz de Araujo
    • H01L2976
    • H01L29/516H01L28/56
    • An integrated circuit device includes a thin film of bismuth-containing layered superlattice material having a thickness not exceeding 100 nm, a capping layer thin film of bismuth tantalate, and an electrode. The capping layer has a thickness in a range of from 3 nm to 30 nm and is deposited between the thin film of layered superlattice material and the electrode to increase dielectric breakdown voltage. Preferably the capping layer contains an excess amount of bismuth relative to the stoichiometrically balanced amount represented by the balanced stoichiometric formula BiTaO4. Preferably, the layered superlattice material is ferroelectric SBT or SBTN. Preferably, the integrated circuit device is a nonvolatile ferroelectric memory. Heating treatments for fabrication of the integrated circuit device containing the bismuth tantalate capping layerare conducted at temperatures not exceeding 700° C., preferably in a range of from 650° C. to 700° C.
    • 集成电路器件包括厚度不超过100nm的含铋层状超晶格材料薄膜,钽酸铋覆盖层薄膜和电极。 覆盖层的厚度在3nm至30nm的范围内,并且沉积在层状超晶格材料的薄膜和电极之间以增加介电击穿电压。 优选地,封盖层相对于由平衡化学计量式BiTaO 4表示的化学计量平衡量含有过量的铋。 优选地,层状超晶格材料是铁电SBT或SBTN。 优选地,集成电路器件是非易失性铁电存储器。 用于制造包含钽酸铋覆盖层的集成电路器件的加热处理在不超过700℃的温度下进行,优选在650℃至700℃的范围内。