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1. 发明授权

US5684972A Programmable servo burst sequencer for a disk drive 失效
标题翻译：用于磁盘驱动器的可编程伺服脉冲序列发生器
公开(公告)号：US5684972A
公开(公告)日：1997-11-04
申请号：US294234
申请日：1994-08-22
申请人： John P. Hill , David L. Dyer , Nicolas C. Assoud
发明人： John P. Hill , David L. Dyer , Nicolas C. Assoud
IPC分类号： G11B5/596 , G06F13/00 , G05B19/29
CPC分类号： G11B5/59605 , G11B5/59688
摘要： An integrated circuit includes a programmable servo burst sequencer that includes an instruction memory, an instruction register, and an address control circuit. The instruction register drives a plurality of output lines of the programmable servo burst sequencer. The programmable servo burst sequencer can process a plurality of fields in any one of a plurality of servo sectors. The programmable servo burst sequencer eliminates the need for a specific servo burst sequencer for each possible configuration of the plurality of fields in a servo sector. The user simply uses a plurality of instructions to configure the programmable servo burst sequencer so that the programmed servo burst sequencer can process the plurality of fields in the servo sector information on the user's disk drive.
摘要翻译：集成电路包括可编程伺服脉冲序列发生器，其包括指令存储器，指令寄存器和地址控制电路。指令寄存器驱动可编程伺服脉冲序列发生器的多条输出线。可编程伺服脉冲序列发生器可以处理多个伺服扇区中的任何一个中的多个场。可编程伺服脉冲序列发生器消除了对伺服扇区中的多个场的每个可能配置的特定伺服脉冲序列发生器的需要。用户简单地使用多个指令来配置可编程伺服脉冲序列发生器，使得编程的伺服脉冲序列发生器可以处理用户磁盘驱动器上的伺服扇区信息中的多个场。

2. 发明授权

US5640583A Programmable servo burst decoder 失效
标题翻译：可编程伺服突发解码器
公开(公告)号：US5640583A
公开(公告)日：1997-06-17
申请号：US293981
申请日：1994-08-22
申请人： Nicolas C. Assouad , John P. Hill , David L. Dyer
发明人： Nicolas C. Assouad , John P. Hill , David L. Dyer
IPC分类号： G11B5/596 , G11B20/10 , G11B27/30 , G06F7/00
CPC分类号： G11B20/10 , G11B27/3027 , G11B5/59655 , G11B2020/1282
摘要： A disk drive controller integrated circuit includes a programmable servo burst decoder that can process any one of a plurality of servo sectors. A disk drive head reads each embedded servo sector on the disk and provides an analog signal, a servo burst, representing the servo sector to a preamp. The preamp provides an amplified analog signal to a read channel integrated circuit. The read channel integrated circuit provides input signals that are processed by the programmable servo burst decoder. The programmable servo burst decoder includes a programmable timing mark sequencer having an instruction register of a first size and a servo timing mark output line, and a programmable burst sequencer connected to the servo timing mark output line and having an instruction register of a second size. In this embodiment, the first size is different from the second size. Specifically, the first size is 20 bits, and the second size is 38 bits.
摘要翻译：磁盘驱动器控制器集成电路包括可处理多个伺服扇区中的任一个的可编程伺服突发解码器。磁盘驱动器头读取磁盘上的每个嵌入式伺服扇区，并将表示伺服扇区的模拟信号，伺服脉冲串提供给前置放大器。前置放大器为读通道集成电路提供放大的模拟信号。读通道集成电路提供由可编程伺服脉冲解码器处理的输入信号。可编程伺服脉冲串解码器包括具有第一大小的指令寄存器和伺服定时标记输出线的可编程定时标记定序器和连接到伺服定时标记输出线并具有第二大小的指令寄存器的可编程脉冲序列发生器。在该实施例中，第一尺寸与第二尺寸不同。具体来说，第一大小是20比特，第二大小是38比特。

3. 发明授权

US5640538A Programmable timing mark sequencer for a disk drive 失效
标题翻译：用于磁盘驱动器的可编程定时标记定序器
公开(公告)号：US5640538A
公开(公告)日：1997-06-17
申请号：US294128
申请日：1994-08-22
申请人： David L. Dyer , John P. Hill , Nicolas C. Assouad
发明人： David L. Dyer , John P. Hill , Nicolas C. Assouad
IPC分类号： G11B5/596 , G06F17/00
CPC分类号： G11B5/59616
摘要： A programmable timing mark sequencer automatically analyzes a sequence of data bits on a data input line. If the appropriate timing pattern is detected in the sequence of data bits, the timing mark sequencer drives a signal active on a servo timing mark output line. The timing mark sequencer is a fully programmable sequencer that is optimized for the detection of servo sector timing mark patterns. The timing mark sequencer includes a branch and fetch unit, a timing mark sequencer random access memory(RAM), an instruction register, a space counter, a window counter, and a synchronization flip-flop. The timing mark sequencer has a plurality of input lines including a search input line, a high resolution data bit line, and a decode clock line.
摘要翻译：可编程定时标记定序器自动分析数据输入线上的数据位序列。如果在数据位序列中检测到适当的定时模式，则定时标记定序器驱动在伺服定时标记输出线上有效的信号。定时标记定序器是一个完全可编程的定序器，针对伺服扇区定时标记模式的检测进行了优化。定时标记定序器包括分支和取出单元，定时标记定序器随机存取存储器（RAM），指令寄存器，空间计数器，窗口计数器和同步触发器。定时标记定序器具有包括搜索输入线，高分辨率数据位线和解码时钟线的多条输入线。

4. 发明授权

US07230981B2 Integrated data jitter generator for the testing of high-speed serial interfaces 有权
标题翻译：集成数据抖动发生器，用于测试高速串行接口
公开(公告)号：US07230981B2
公开(公告)日：2007-06-12
申请号：US10435405
申请日：2003-05-09
申请人： John P. Hill
发明人： John P. Hill
IPC分类号： H04B3/46
CPC分类号： G01R31/31709 , G01R31/31715 , H04L1/205
摘要： An integrated data jitter generator for the testing of high speed serial interfaces is provided. A transmit timing generator for use in a transmit data path includes a high frequency clock generator such as a phase-locked loop or a delay-locked loop having an input for receiving an oscillator or reference clock input. A clock modulator receives both an existing low frequency modulation signal and a high frequency modulation signal. A high-speed modulated clock signal is generated to enable jitter testing by a downstream-coupled receiver. Fixed frequencies such as 3, 6, 125, 150, 250, 300, 750, or 1500 MHz are used for the high-speed modulation signal, but any high-speed modulation frequency can be used to generate the desired amount of jitter. Likewise, the amplitude of the high frequency modulation signal can also be varied as desired.
摘要翻译：提供了一种用于测试高速串行接口的集成数据抖动发生器。用于发送数据路径的发送定时发生器包括诸如锁相环的高频时钟发生器或具有用于接收振荡器或参考时钟输入的输入的延迟锁定环路。时钟调制器接收现有的低频调制信号和高频调制信号。生成高速调制时钟信号，以使下游耦合接收机进行抖动测试。诸如3,6,125,150,250,300,750或1500MHz的固定频率用于高速调制信号，但是可以使用任何高速调制频率来产生期望的抖动量。同样地，高频调制信号的振幅也可以根据需要而改变。

5. 发明授权

US07105053B2 Energy efficient method for growing polycrystalline silicon 有权
公开(公告)号：US07105053B2
公开(公告)日：2006-09-12
申请号：US10367570
申请日：2003-02-13
申请人： Lyle C. Winterton , John P. Hill
发明人： Lyle C. Winterton , John P. Hill
IPC分类号： C30B25/12 , C30B25/14
CPC分类号： C01B33/035 , C30B25/005 , C30B29/06
摘要： Polysilicon dendrites are grown by depositing silicon on a polysilicon rod or other substrate. Surface temperature is increased to a temperature at which needle-like dendrites develop due to the deposition of silicon from silicon-containing molecules in the surrounding reactor atmosphere. Thereafter, the surface temperature is gradually reduced so that silicon that deposits on the needle-like dendrites causes the dendrites to grow and assume a generally flared shape.

6. 发明授权

US06735038B2 Supply variance compensation method for switched voltage mode voice coil motor driver circuit 有权
标题翻译：交流电压模式音圈电机驱动电路的供电方差补偿方法
公开(公告)号：US06735038B2
公开(公告)日：2004-05-11
申请号：US09877278
申请日：2001-06-08
申请人： John P. Hill
发明人： John P. Hill
IPC分类号： G11B2102
CPC分类号： G11B5/5521 , H02P25/034
摘要： A VCM power driver having an input for receiving an external supply voltage VDD. A voltage-mode driver is coupled to the power supply voltage and generates a drive signal to a load. A system processor generates commands indicating a programmed voltage output desired from the voltage-mode driver. A comparator compares VDD to a reference voltage to generate an error signal. A combination mechanism generates a modified command using the error signal. The modified commands are coupled to the voltage-mode driver, such that the voltage-mode driver generates a voltage output based upon the modified command.
摘要翻译：具有用于接收外部电源电压VDD的输入的VCM功率驱动器。电压模式驱动器耦合到电源电压并且向负载产生驱动信号。系统处理器产生指示从电压模式驱动器所需的编程电压输出的命令。比较器将VDD与参考电压进行比较，以产生误差信号。组合机制使用错误信号生成修改的命令。修改的命令耦合到电压模式驱动器，使得电压模式驱动器基于修改的命令产生电压输出。

7. 发明授权

US06584516B1 High-speed servo data interface system 有权
标题翻译：高速伺服数据接口系统
公开(公告)号：US06584516B1
公开(公告)日：2003-06-24
申请号：US09703260
申请日：2000-10-31
申请人： John P. Hill
发明人： John P. Hill
IPC分类号： G06F1300
CPC分类号： G06F3/0613 , G06F3/0655 , G06F3/0674
摘要： The invention provides a high-speed interface that transfers servo position data from the read channel integrated circuit to the drive control integrated circuit or another integrated circuit. The high-speed interface eliminates the need for analog pins on the integrated circuits to lower the cost of the system. The high-speed interface also eliminates the use of the serial interface to transfer the servo position data which speeds up the data transfer. Examples of servo position data include high-resolution servo position data and coarse-resolution servo position data. A read channel integrated circuit transfers the user data and the high-resolution servo position data to a data bus, such as an NRZ bus. The data bus transfers the user data and the high-resolution servo position data to another integrated circuit, such as a drive control integrated circuit. The other integrated circuit receives the user data and the high-resolution servo position data from the data bus. The coarse-resolution servo position data can also be transferred over the data bus.
摘要翻译：本发明提供一种高速接口，其将伺服位置数据从读通道集成电路传送到驱动控制集成电路或另一集成电路。高速接口不需要集成电路上的模拟引脚来降低系统的成本。高速接口也消除了使用串行接口传送伺服位置数据，加快了数据传输速度。伺服位置数据的示例包括高分辨率伺服位置数据和粗分辨率伺服位置数据。读通道集成电路将用户数据和高分辨率伺服位置数据传送到诸如NRZ总线的数据总线。数据总线将用户数据和高分辨率伺服位置数据传送到诸如驱动控制集成电路的另一集成电路。另一个集成电路从数据总线接收用户数据和高分辨率伺服位置数据。粗分辨率伺服位置数据也可以通过数据总线传输。

8. 发明授权

US06225873B1 Frequency shift key modulating oscillator 失效
标题翻译：频移键调制振荡器
公开(公告)号：US06225873B1
公开(公告)日：2001-05-01
申请号：US08566270
申请日：1995-12-01
申请人： John P. Hill
发明人： John P. Hill
IPC分类号： H03C300
CPC分类号： H03C3/16 , H03B5/1847 , H03B5/187 , H03B2201/017
摘要： The present invention teaches a system for selectably oscillating at a first or a second oscillating frequency. The system comprises an oscillator for providing an oscillating output. Moreover, the system comprises a switching device for selecting a first or a second impedance in response to a select signal having a voltage. Each of the first and second impedances is fixed independently of the select signal voltage such that the oscillating output oscillates at the first oscillating frequency when the first impedance is provided and oscillates at the second oscillating frequency when the second impedance is provided.
摘要翻译：本发明教导了一种用于以第一或第二振荡频率可选地振荡的系统。该系统包括用于提供振荡输出的振荡器。此外，该系统包括用于响应于具有电压的选择信号选择第一或第二阻抗的开关装置。第一和第二阻抗中的每一个都是独立于选择信号电压固定的，使得当提供第一阻抗时，振荡输出以第一振荡频率振荡，并且当提供第二阻抗时以第二振荡频率振荡。

9. 发明授权

US6054828A Circuitry and methods for adjusting and switching the gain of a digital-to-analog converter in a disk drive 失效
标题翻译：用于调整和切换磁盘驱动器中数模转换器增益的电路和方法
公开(公告)号：US6054828A
公开(公告)日：2000-04-25
申请号：US216623
申请日：1998-12-16
申请人： John P. Hill
发明人： John P. Hill
IPC分类号： G11B5/596 , G11B21/08 , H03M1/66 , G05B11/01 , G05B13/00 , G11B7/00
CPC分类号： G11B21/085 , H03M1/66 , G11B5/59622
摘要： Disclosed is a tracking control integrated circuit (IC) system implementation and method for controlling the gain of a digital-to-analog converter in a disk drive system. The tracking control IC system includes components defined in integrated circuit chips and components defined on a printed circuit board. The tracking control IC system is configured to be implemented in a disk drive system that includes a disk media. The tracking control IC system includes a servo controller chip that includes a compensator/processor, the digital-to-analog converter, and a switch. The switch is configured to receive a high gain signal (being Low or High) for setting the switch in an open state or a closed state. The tracking control IC system further includes a power amplifier chip having amplifying elements. The power amplifier chip has a first input and a second input, both of which connect to selected ones of the amplifying elements. The digital-to-analog converter includes a first output that is in communication with the switch and the first input of the power amplifier chip. The digital-to-analog converter has a second output that is in communication with the switch, and the switch has an output that is coupled to the first input of the power amplifier chip through the selected amplifying elements. The switch therefore enables the tracking control IC system to have a wider dynamic range control voltage Vc without increasing the die area of the servo control chip, without adding external active components to the PCB, and without increasing the control signal's susceptibility to noise pickup or offsets.
摘要翻译：公开了一种用于控制磁盘驱动器系统中的数模转换器的增益的跟踪控制集成电路（IC）系统实现和方法。跟踪控制IC系统包括在印刷电路板上限定的集成电路芯片和部件中定义的组件。跟踪控制IC系统被配置为在包括盘介质的磁盘驱动器系统中实现。跟踪控制IC系统包括包括补偿器/处理器，数模转换器和开关的伺服控制器芯片。开关被配置为接收高增益信号（低或高），用于将开关置于打开状态或关闭状态。跟踪控制IC系统还包括具有放大元件的功率放大器芯片。功率放大器芯片具有第一输入和第二输入，两者均连接到选定的放大元件。数模转换器包括与开关和功率放大器芯片的第一输入通信的第一输出。数模转换器具有与开关通信的第二输出，并且开关具有通过所选择的放大元件耦合到功率放大器芯片的第一输入的输出。因此，该开关能够使跟踪控制IC系统具有更宽的动态范围控制电压Vc，而不增加伺服控制芯片的管芯面积，而不会增加外部有源元件到PCB，并且不增加控制信号对噪声拾取或偏移的敏感性。

10. 发明授权

US5703584A Analog data acquisition system 失效
标题翻译：模拟数据采集系统
公开(公告)号：US5703584A
公开(公告)日：1997-12-30
申请号：US293973
申请日：1994-08-22
申请人： John P. Hill
发明人： John P. Hill
IPC分类号： G06F17/40 , H03M1/12
CPC分类号： G11B20/10037 , G11B5/59611
摘要： An analog data acquisition system in an integrated circuit automatically processes and stores analog data without sequencing support from a processor. The analog data acquisition system converts each analog input signal into digital data. The digital data are stored in registers in the integrated circuit that are directly readable by a digital signal processor without data moves and are directly usable by the digital signal processor without further processing or conversion. Consequently, the analog data acquisition system minimizes the use of both the digital signal processor and the digital signal processor program memory and leaves capacity, i.e., both processing time and instruction memory locations, for use in other activities. The analog data acquisition system includes an analog input multiplexer and an analog-to-digital (A/D) converter that has an input line that is connected to the analog input multiplexer output line. An acquisition sequencer provides signals to the analog input multiplexer so that a signal on one of the plurality of input lines to the analog input multiplexer is applied to the A/D converter.
摘要翻译：集成电路中的模拟数据采集系统自动处理和存储模拟数据，无需处理器的排序支持。模拟数据采集系统将每个模拟输入信号转换为数字数据。数字数据存储在集成电路中的数字信号处理器可直接读取的寄存器中，无需数据移动，并可直接由数字信号处理器使用，无需进一步处理或转换。因此，模拟数据采集系统最大限度地减少数字信号处理器和数字信号处理器程序存储器的使用，并且留下用于其他活动的容量，即处理时间和指令存储器位置。模拟数据采集系统包括模拟输入多路复用器和具有连接到模拟输入多路复用器输出线的输入线的模拟（A / D）转换器。采集定序器向模拟输入多路复用器提供信号，使得到模拟输入多路复用器的多条输入线之一上的信号被施加到A / D转换器。

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