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1. 发明授权

US06670902B1 Delta-sigma modulators with improved noise performance 有权
标题翻译：具有改进噪声性能的Delta-Σ调制器
公开(公告)号：US06670902B1
公开(公告)日：2003-12-30
申请号：US10162324
申请日：2002-06-04
申请人： John Laurence Melanson , Yu Qing Yang
发明人： John Laurence Melanson , Yu Qing Yang
IPC分类号： H03M300
CPC分类号： H03M3/368 , H03M3/424 , H03M3/452
摘要： An integrator stage for use in a delta sigma modulator includes an operational amplifier, an integration capacitor coupling an output of the operational amplifier and a summing node at an input of the operational amplifier, and a feedback path. The feedback path includes first and second capacitors having first plates coupled electrically in common at a common plate node and switching circuitry for sampling selected reference voltages onto second plates of the capacitors during a sampling phase. The integrator stage further includes a switch for selectively coupling the common plate node and the summing node during an integration phase.
摘要翻译：用于Δ-Σ调制器的积分器级包括运算放大器，耦合运算放大器的输出的积分电容器和运算放大器输入端的求和节点和反馈路径。反馈路径包括第一和第二电容器，该第一和第二电容器具有在公共板节点处共同电耦合的第一板和用于在采样阶段期间将选定的参考电压采样到电容器的第二板上的开关电路。积分器级还包括用于在积分阶段期间选择性地耦合公共板节点和求和节点的开关。

2. 发明授权

US06956514B1 Delta-sigma modulators with improved noise performance 有权
公开(公告)号：US06956514B1
公开(公告)日：2005-10-18
申请号：US11087234
申请日：2005-03-23
申请人： John Laurence Melanson , Yu Qing Yang
发明人： John Laurence Melanson , Yu Qing Yang
IPC分类号： H03M3/00 , H03M3/04
CPC分类号： H03M3/368 , H03M3/342 , H03M3/424 , H03M3/452
摘要： An integrator stage for use in a delta sigma modulator includes an operational amplifier, an integration capacitor coupling an output of the operational amplifier and a summing node at an input of the operational amplifier, and a feedback path. The feedback path includes first and second capacitors having first plates coupled electrically in common at a common plate node and switching circuitry for sampling selected reference voltages onto second plates of the capacitors during a sampling phase. The integrator stage further includes a switch for selectively coupling the common plate node and the summing node during an integration phase.

3. 发明申请

US20120194143A1 Switch-Mode Converter Operating in a Hybrid Discontinuous Conduction Mode (DCM)/Continuous Conduction Mode (CCM) That Uses Double or More Pulses in a Switching Period 审中-公开
标题翻译：开关模式转换器工作在混合不连续导通模式（DCM）/连续导通模式（CCM），在开关周期中使用双脉冲或更多脉冲
公开(公告)号：US20120194143A1
公开(公告)日：2012-08-02
申请号：US13351069
申请日：2012-01-16
申请人： John Laurence Melanson
发明人： John Laurence Melanson
IPC分类号： G05F1/70
CPC分类号： H02M1/4225 , H03M3/476 , Y02B70/126 , Y02P80/112
摘要： A switching converter controller and method for controlling a switch-mode converter in a hybrid discontinuous conduction mode (DCM)/continuous conduction mode (CCM) mode are disclosed. The hybrid mode involves using double (two) or more switching pulses in a switching period of a control signal for controlling the switch-mode converter. The switching period is defined by a switch on-time duration, a switch off-time duration, and an N number of switching pulses. N is an integer greater than one. An inductor current through the inductor of the switch-mode converter is zero before an initial switching pulse, is zero after a last switching pulse, and is non-zero for all other times within the switching period. The switch-mode-converter controller can be used as a power factor correction controller for a power factor corrector. The switch-mode converter controller can be implemented on a single integrated circuit.
摘要翻译：公开了一种用于控制混合不连续导通模式（DCM）/连续导通模式（CCM）模式中的开关模式转换器的开关转换器控制器和方法。混合模式涉及在用于控制开关模式转换器的控制信号的开关周期中使用双（2）个或更多个开关脉冲。开关周期由开关导通时间，开关关断时间和N个开关脉冲限定。 N是大于1的整数。在初始切换脉冲之前，通过开关模式转换器的电感器的电感电流为零，在最后一个开关脉冲之后为零，并且在开关周期内的所有其他时间都为非零。开关模式转换器控制器可用作功率因数校正器的功率因数校正控制器。开关模式转换器控制器可以在单个集成电路上实现。

4. 发明授权

US08125805B1 Switch-mode converter operating in a hybrid discontinuous conduction mode (DCM)/continuous conduction mode (CCM) that uses double or more pulses in a switching period 有权
标题翻译：开关模式转换器在混合不连续导通模式（DCM）/连续导通模式（CCM）中工作，在开关周期中使用双倍或更多脉冲
公开(公告)号：US08125805B1
公开(公告)日：2012-02-28
申请号：US12113536
申请日：2008-05-01
申请人： John Laurence Melanson
发明人： John Laurence Melanson
IPC分类号： H02M7/217
CPC分类号： H02M1/4225 , H03M3/476 , Y02B70/126 , Y02P80/112
摘要： A switching converter controller and method for controlling a switch-mode converter in a hybrid discontinuous conduction mode (DCM)/continuous conduction mode (CCM) mode are disclosed. The hybrid mode involves using double (two) or more switching pulses in a switching period of a control signal for controlling the switch-mode converter. The switching period is defined by a switch on-time duration, a switch off-time duration, and an N number of switching pulses. N is an integer greater than one. An inductor current through the inductor of the switch-mode converter is zero before an initial switching pulse, is zero after a last switching pulse, and is non-zero for all other times within the switching period. The switch-mode converter controller can be used as a power factor correction controller for a power factor corrector. The switch-mode converter controller can be implemented on a single integrated circuit.
摘要翻译：公开了一种用于控制混合不连续导通模式（DCM）/连续导通模式（CCM）模式中的开关模式转换器的开关转换器控制器和方法。混合模式涉及在用于控制开关模式转换器的控制信号的开关周期中使用双（2）个或更多个开关脉冲。开关周期由开关导通时间，开关关断时间和N个开关脉冲限定。 N是大于1的整数。在初始切换脉冲之前，通过开关模式转换器的电感器的电感电流为零，在最后一个开关脉冲之后为零，并且在开关周期内的所有其他时间都为非零。开关模式转换器控制器可用作功率因数校正器的功率因数校正控制器。开关模式转换器控制器可以在单个集成电路上实现。

5. 发明授权

US07808263B2 Non-invasive, low pin count test circuits and methods utilizing emulated stress conditions 有权
标题翻译：非侵入性，低引脚数测试电路和利用模拟应力条件的方法
公开(公告)号：US07808263B2
公开(公告)日：2010-10-05
申请号：US12381774
申请日：2009-03-17
申请人： Murari Kejariwal , John Laurence Melanson , Ammisetti V. Prasad , Sherry Xiaohong Wu
发明人： Murari Kejariwal , John Laurence Melanson , Ammisetti V. Prasad , Sherry Xiaohong Wu
IPC分类号： G01R31/02
CPC分类号： G01R31/2884
摘要： An integrated circuit including at least one internal operational block, which includes test control circuitry for initiating a test mode and testing circuitry for verifying an operation of the integrated circuit under a more stringent condition in the test mode as compared to a condition in another operating mode such that proper operation of the integrated circuit is assured in the another operating mode. Pin control circuitry selectively outputs a test signal from a selected pin in the test mode indicative of the operation of the internal block, wherein the selected pin is utilized for exchanging another signal when the integrated circuit is in the another operating mode.
摘要翻译：一种集成电路，包括至少一个内部操作块，其包括用于启动测试模式的测试控制电路和用于在测试模式中在更严格的条件下验证集成电路的操作的测试电路，与其他操作模式中的条件相比使得在另一操作模式下确保集成电路的正确操作。引脚控制电路在指示内部块的操作的测试模式中选择性地输出来自所选引脚的测试信号，其中当集成电路处于另一操作模式时，所选择的引脚用于交换另一信号。

6. 发明授权

US07719248B1 Discontinuous conduction mode (DCM) using sensed current for a switch-mode converter 有权
标题翻译：不连续导通模式（DCM）使用感应电流作为开关模式转换器
公开(公告)号：US07719248B1
公开(公告)日：2010-05-18
申请号：US12110714
申请日：2008-04-28
申请人： John Laurence Melanson
发明人： John Laurence Melanson
IPC分类号： G05F1/575 , G05F1/613
CPC分类号： H02M1/4225 , H03M3/476 , Y02B70/126 , Y02P80/112
摘要： A switch-mode converter controller and method utilizes a comparator for receiving and comparing a sensed current and a peak current that is determined by a product of a multiplying factor, that is greater than or equal to two, and a target current. A finite state machine (FSM) is configured to operate the switch-mode converter in a discontinuous conduction mode (DCM). Responsive to the comparator, the FSM turns on the switch and observes an on-time duration of the switch until the sensed current reaches the peak current; calculates a switching period responsive to the peak current and the observed on-time duration; and varies the switching period responsive to the on-time duration and the multiplying factor such that an average of the sensed current equals the target current. The FSM can also be configured to alternatively operate the switch-mode converter in a continuous conduction mode (CCM).
摘要翻译：开关模式转换器控制器和方法利用比较器来接收和比较感测电流和由乘法因子（大于或等于2）乘以目标电流确定的峰值电流。有限状态机（FSM）被配置为以不连续导通模式（DCM）操作开关模式转换器。响应于比较器，FSM打开开关并观察开关的导通时间，直到感测到的电流达到峰值电流; 计算响应于峰值电流和观察到的接通时间的开关周期; 并且响应于导通时间和乘法因子改变开关周期，使得感测电流的平均值等于目标电流。 FSM还可以配置为以连续导通模式（CCM）交替操作开关模式转换器。

7. 发明授权

US07308027B1 Circuits and methods for reducing distortion and noise in pulse width modulation systems utilizing full-bridge drivers 有权
标题翻译：利用全桥驱动器减小脉冲宽度调制系统中的失真和噪声的电路和方法
公开(公告)号：US07308027B1
公开(公告)日：2007-12-11
申请号：US10828816
申请日：2004-04-21
申请人： Johann Guy Gaboriau , Melvin L. Hagge , Lingli Zhang , John Laurence Melanson
发明人： Johann Guy Gaboriau , Melvin L. Hagge , Lingli Zhang , John Laurence Melanson
IPC分类号： H03K7/08
CPC分类号： H03F3/2173 , H03F1/26 , H03F1/32 , H03F3/68 , H03F2200/03 , H03F2200/351 , H03F2200/372
摘要： A pulse width modulation circuit for driving a full-bridge output load includes a pulse width modulation stage for generating, from an input data stream, a pulse width modulated data stream for driving a terminal of a full-bridge output load and another pulse width modulated data stream for driving another terminal of the full bridge output load. A delay circuit delays the another pulse width modulated data stream relative to the pulse width modulated data stream such that edges of the another pulse width modulated data stream and edges of the pulse width modulated data stream are temporally spaced.
摘要翻译：用于驱动全桥输出负载的脉宽调制电路包括脉冲宽度调制级，用于从输入数据流生成用于驱动全桥输出负载的端子的脉冲宽度调制数据流，以及用于驱动全桥输出负载的另一个脉宽调制用于驱动全桥输出负载的另一终端的数据流。延迟电路相对于脉宽调制数据流延迟另一个脉冲宽度调制数据流，使得另一脉宽调制数据流的边缘和脉宽调制数据流的边沿在时间上间隔开。

8. 发明授权

US07183954B1 Circuits, systems and methods for volume control in low noise 1-bit digital audio systems 有权
标题翻译：低噪声1位数字音频系统中音量控制的电路，系统和方法
公开(公告)号：US07183954B1
公开(公告)日：2007-02-27
申请号：US10818240
申请日：2004-04-05
申请人： John Laurence Melanson , Jason Powell Rhode
发明人： John Laurence Melanson , Jason Powell Rhode
IPC分类号： H03M3/00
CPC分类号： H03M7/3015 , H03M7/3028 , H03M7/304
摘要： A data converter including a digital volume control for continuously scaling a received stream of digital audio data by a selected factor and a low noise delta-sigma modulator for re-quantizing a scaled digital data stream output from the digital volume control.
摘要翻译：一种数据转换器，包括数字音量控制，用于通过所选择的因子连续缩放所接收的数字音频数据流，以及用于重新量化从数字音量控制输出的经缩放的数字数据流的低噪声Δ-Σ调制器。

9. 发明授权

US07057539B1 Systems and methods for clock mode determination utilizing explicit formulae and lookup tables 有权
标题翻译：使用显式公式和查找表进行时钟模式确定的系统和方法
公开(公告)号：US07057539B1
公开(公告)日：2006-06-06
申请号：US11136059
申请日：2005-05-24
申请人： Bruce Eliot Duewer , John Laurence Melanson
发明人： Bruce Eliot Duewer , John Laurence Melanson
IPC分类号： H03M1/00
CPC分类号： G01R23/005
摘要： A system for determining a data converter operating mode includes measurement circuitry operable to measure a master clock frequency of a master clock signal and measure a frequency ratio between a data clock frequency of a data clock signal and the master clock frequency. A mapping system maps the measurements of the master clock frequency and the frequency ratio to an operating mode of the data converter utilizing an explicit formula. In a further embodiment, the mapping system maps the measurements of the master clock frequency and the frequency ratio to an operating mode of the data converter utilizing a lookup table. In an additional embodiment, the mapping system tests an available set of operating modes, independent of any previous tests, to determine a suitable operating mode for the data converter.
摘要翻译：一种用于确定数据转换器操作模式的系统包括可操作以测量主时钟信号的主时钟频率并测量数据时钟信号的数据时钟频率与主时钟频率之间的频率比的测量电路。映射系统使用显式公式将主时钟频率和频率比的测量值映射到数据转换器的操作模式。在另一实施例中，映射系统使用查找表将主时钟频率和频率比的测量值映射到数据转换器的操作模式。在另外的实施例中，映射系统独立于任何先前的测试来测试可用的一组操作模式，以确定数据转换器的合适的操作模式。

10. 发明授权

US07049988B1 Systems and methods for clock mode determination utilizing a fixed-frequency reference signal 有权
标题翻译：使用固定频率参考信号的时钟模式确定的系统和方法
公开(公告)号：US07049988B1
公开(公告)日：2006-05-23
申请号：US11136060
申请日：2005-05-24
申请人： Bruce Eliot Duewer , John Laurence Melanson
发明人： Bruce Eliot Duewer , John Laurence Melanson
IPC分类号： H03M1/00
CPC分类号： G11B20/10222 , G11B20/10009
摘要： A system for determining a data converter operating mode including measurement circuitry operable to measure a master clock frequency by comparing a frequency of a master clock signal and a frequency of a fixed frequency clock signal and operable to measure a frequency ratio between a frequency of a data clock signal and the master clock frequency. A mapping system maps the measurements of the master clock frequency and the frequency ratio to an operating mode of the data converter. In one particular embodiment, the fixed frequency clock signal is provided by an oscillator. In a further embodiment, the master clock signal is generated by multiplying the frequency of another clock signal.
摘要翻译：一种用于确定数据转换器操作模式的系统，包括测量电路，可操作以通过比较主时钟信号的频率和固定频率时钟信号的频率来测量主时钟频率，并可操作以测量数据频率之间的频率比时钟信号和主时钟频率。映射系统将主时钟频率和频率比的测量结果映射到数据转换器的操作模式。在一个具体实施例中，固定频率时钟信号由振荡器提供。在另一实施例中，主时钟信号是通过将另一个时钟信号的频率相乘而产生的。

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