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1. 发明授权

US07110460B1 Delta-sigma modulators with integral digital low-pass filtering 有权
标题翻译：具有整数数字低通滤波的Delta-Σ调制器
公开(公告)号：US07110460B1
公开(公告)日：2006-09-19
申请号：US10914917
申请日：2004-08-10
申请人： John Laurence Melanson , Heling Yi
发明人： John Laurence Melanson , Heling Yi
IPC分类号： H04B14/06 , H03M3/02
CPC分类号： H03M7/304 , H03M7/3026 , H03M7/3028
摘要： A delta-sigma modulator of an order of at least three having a signal transfer function defining a signal low-pass response, the signal transfer function has a numerator and a denominator, the denominator defined by a product of first and second functions defining respective first and second pole sets such that a roll-off frequency of a low-pass response defined by the first pole set is at least twice a roll-off frequency of a low-pass response defined by the second pole set. The delta-sigma modulator also has a noise transfer function defining a noise high-pass response, the noise transfer function having a numerator and a denominator, the denominator defined by the product of the first and second functions. The numerator of the noise transfer function differs from the numerator of the signal transfer function and characterizes the noise high-pass response.
摘要翻译：具有定义信号低通响应的信号传递函数的具有至少三个数量级的Δ-Σ调制器，所述信号传递函数具有分子和分母，所述分母由第一和第二函数的乘积定义，所述第一和第二函数定义相应的第一以及第二极点组，使得由第一极点集限定的低通响应的滚降频率为由第二极点限定的低通响应的滚降频率的至少两倍。 Δ-Σ调制器还具有定义噪声高通响应的噪声传递函数，噪声传递函数具有分子和分母，分母由第一和第二函数的乘积定义。噪声传递函数的分子与信号传递函数的分子不同，并表征噪声高通响应。

2. 发明授权

US07116721B1 Delta-sigma modulators with integral digital low-pass filtering 有权
标题翻译：具有整数数字低通滤波的Delta-Σ调制器
公开(公告)号：US07116721B1
公开(公告)日：2006-10-03
申请号：US10151322
申请日：2002-05-20
申请人： John Laurence Melanson , Heling Yi
发明人： John Laurence Melanson , Heling Yi
IPC分类号： H04B14/06 , H03M3/02
CPC分类号： H03M7/304 , H03M7/3026 , H03M7/3028
摘要： A feedback noise-shaper of an order of at least three implements a first pole set defining a signal transfer function of a selected corner frequency and a second pole set having at least one pole at a frequency at least twice the selected corner frequency defining a noise transfer function.
摘要翻译：至少三个级别的反馈噪声整形器实现了定义所选转角频率的信号传递函数的第一极点集合和具有至少一个极点的第二极点，频率至少为所选转角频率的两倍，所述转角频率限定噪声传递函数。

3. 发明授权

US06531975B1 Apparatus and method for multi-channel digital to analog conversion of signals with different sample rates 有权
标题翻译：具有不同采样率的信号的多通道数模转换的装置和方法
公开(公告)号：US06531975B1
公开(公告)日：2003-03-11
申请号：US09865079
申请日：2001-05-24
申请人： Brian D. Trotter , Thomas D. Stein , Heling Yi , Jason P. Rhode , Timothy T. Rueger
发明人： Brian D. Trotter , Thomas D. Stein , Heling Yi , Jason P. Rhode , Timothy T. Rueger
IPC分类号： H03M166
CPC分类号： H03M1/662
摘要： An apparatus and method for converting digital input signals sampled at different rates to analog signals includes a digital to analog converter for each digital input signal. Each digital to analog converter receives a digital input signal and a clock signal corresponding to the sampling rate of the received digital input signal. The apparatus can also receive a set of sample rate signals indicating the sampling rate for each digital input signal. The sample rate signals are used to route each digital input signal, along with a corresponding clock signal, to a corresponding digital to analog converter (DAC). A clock error signal controls routing of the digital input signals to the DACs as well as operation of the DACs. A clock divider and ratio detector module generates the clock error signal based on intermediate clock error signals that correspond to the sample rates.
摘要翻译：用于将以不同速率采样的数字输入信号转换为模拟信号的装置和方法包括用于每个数字输入信号的数模转换器。每个数模转换器接收与所接收的数字输入信号的采样率相对应的数字输入信号和时钟信号。该装置还可以接收指示每个数字输入信号的采样率的一组采样率信号。采样率信号用于将每个数字输入信号与相应的时钟信号一起路由到相应的数模转换器（DAC）。时钟误差信号控制数字输入信号到DAC的路由以及DAC的工作。时钟分频器和比率检测器模块基于对应于采样率的中间时钟误差信号生成时钟误差信号。

4. 发明授权

US06809572B2 Integrated circuit with automatic polarity detection and configuration 有权
标题翻译：具有自动极性检测和配置的集成电路
公开(公告)号：US06809572B2
公开(公告)日：2004-10-26
申请号：US10245957
申请日：2002-09-18
申请人： Heling Yi , David Olivenbaum
发明人： Heling Yi , David Olivenbaum
IPC分类号： H03K1716
CPC分类号： H03F3/2171
摘要： An integrated circuit on a system board is used, for example, in a digital audio device (such as a DVD or A/V receiver). The integrated circuit includes a digital-to-analog converter and the system board may include circuitry to mute the analog output of the device under certain predefined conditions. Because it may not be known in advance by the designer of the integrated circuit whether the circuit is activated by a signal in a high state (polarity) or a low state, the integrated circuit includes a detector which detects and stores the required polarity. When it is necessary for the circuit to be activated, the detector provides a signal of the correct polarity.
摘要翻译：例如，在数字音频设备（例如DVD或A / V接收机）中使用系统板上的集成电路。集成电路包括数模转换器，并且系统板可以包括在某些预定条件下使设备的模拟输出静音的电路。由于集成电路的设计者可能不知道该电路是由高状态（极性）还是低状态的信号激活，所以集成电路包括检测并存储所需极性的检测器。当电路需要激活时，检测器提供正确极性的信号。

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