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    • 4. 发明授权
    • Methods and apparatus for data transfer between partitions in a computer system
    • 计算机系统中分区之间数据传输的方法和装置
    • US07389398B2
    • 2008-06-17
    • US11300609
    • 2005-12-14
    • John I. Garney
    • John I. Garney
    • G06F12/10
    • G06F9/5077
    • A method includes establishing two partitions, including a first partition and a second partition, in a computer system. The method further includes designating a first memory page in memory space controlled by the first partition, designating a second memory page in memory space controlled by the second partition, storing an address of the first memory page in an address mapping array that is accessible by the first partition and storing an address of the second memory page in an address mapping array that is accessible by the second partition. In addition, the method includes exchanging the address of the first memory page in the address mapping array that is accessible by the first partition with the address of the second memory page in the address mapping array that is accessible by the second partition.
    • 一种方法包括在计算机系统中建立包括第一分区和第二分区的两个分区。 该方法还包括指定由第一分区控制的存储器空间中的第一存储器页面,指定由第二分区控制的存储器空间中的第二存储器页面,将第一存储器页面的地址存储在地址映射阵列中,该地址映射阵列可由 第一分区并将第二存储器页的地址存储在可由第二分区访问的地址映射阵列中。 此外,该方法包括将可由第一分区访问的地址映射数组中的第一存储器页的地址与可由第二分区访问的地址映射数组中的第二存储器页的地址进行交换。
    • 8. 发明授权
    • Digital system having a peripheral bus structure with at least one store-and-forward segment
    • 数字系统具有具有至少一个存储和转发段的外围总线结构
    • US06546018B1
    • 2003-04-08
    • US09309484
    • 1999-05-10
    • John I. GarneyJohn S. HowardVenkat Iyer
    • John I. GarneyJohn S. HowardVenkat Iyer
    • H04J1500
    • G06F13/385
    • A digital system is provided with a bus controller to operate and control a peripheral bus, wherein the bus controller selectively operates at least a first portion of the peripheral bus in a store-and-forward manner. The bus controller facilitates communication with a first bus agent in this first portion by sending a number of request packets destined for the first bus agent to a first hub in the first portion, in an integrated multi-packet form, in bulk, and at a first communication speed. The first hub buffers the request packets, and then forwards the request packets to the first bus agent, on a packet-by-packet basis, and at a second communication speed. In one embodiment, the second communication speed is slower than the first communication speed. In one embodiment, the first hub also receives communications destined for a second bus agent of this first portion, from the bus controller at the first communication speed, and repeats the communications for the second bus agent without buffering, at also the first communication speed. In another embodiment, the peripheral bus further includes a second portion, including a second hub that receives communications destined for a third bus agent in this second portion, from the bus controller at the second communication speed, and repeats the communications for the third bus agent without buffering, at also the second communication speed.
    • 数字系统设置有总线控制器以操作和控制外围总线,其中总线控制器以存储和转发的方式选择性地操作外围总线的至少第一部分。 总线控制器通过以大量方式以集成的多分组形式向第一部分中的第一集线器发送目的地为第一总线代理的多个请求分组,并且在 第一通讯速度。 第一集线器缓冲请求分组,然后以逐个分组的方式,以第二通信速度将请求分组转发到第一总线代理。 在一个实施例中,第二通信速度比第一通信速度慢。 在一个实施例中,第一集线器还以第一通信速度从总线控制器接收目的地为该第一部分的第二总线代理的通信,并且也以第一通信速度重复第二总线代理的通信而不进行缓冲。 在另一个实施例中,外围总线还包括第二部分,包括第二集线器,第二集线器以第二通信速度从总线控制器接收发往第二部分中的第三总线代理的通信,并重复第三总线代理的通信 没有缓冲,也是第二个通信速度。
    • 9. 发明授权
    • I/O peripheral device for use in a store-and-forward segment of a peripheral bus
    • 用于外围总线存储转发段的I / O外围设备
    • US06389501B1
    • 2002-05-14
    • US09309087
    • 1999-05-10
    • John I. GarneyJohn S. HowardVenkat Iyer
    • John I. GarneyJohn S. HowardVenkat Iyer
    • G06F1312
    • G06F13/4059
    • An I/O peripheral device is equipped with a first collection of circuitry to enable the I/O peripheral device to provide a store-and-forward manner of operation to a segment of a peripheral bus. The first collection of circuitry includes first buffering circuitry to buffer request packets destined for a first bus agent, received from a bus controller in an integrated multi-packet form, in bulk, and at a first communication speed. Furthermore, the first collection includes control circuitry to forward the request packets separately, in a packet-by-packet basis, to the first bus agent, in a second communication speed. In one embodiment, the second communication speed is slower than the first communication speed. The I/O peripheral device further includes second buffer circuitry to buffer response packets to a request from the first bus agent provided separately, and each at the slower second communication speed. The first control circuitry also facilitates forwarding of the buffered response packets to the bus controller in bulk at the faster first communication speed. In one embodiment, the I/O peripheral device further includes second control circuitry to repeat communications destined for a second bus agent, received from the bus controller at the first communication speed, for the second bus agent, at also the first communication speed. In one embodiment, the I/O peripheral device is a hub.
    • I / O外围设备配备有电路的第一集合,以使得I / O外围设备能够向外围总线的段提供存储转发的操作方式。 电路的第一集合包括第一缓冲电路,用于以批量和第一通信速度缓冲以集成多分组形式从总线控制器接收的去往第一总线代理的请求分组。 此外,第一集合包括控制电路,其以第二通信速度逐个分组地将请求分组转发到第一总线代理。 在一个实施例中,第二通信速度比第一通信速度慢。 I / O外围设备还包括第二缓冲器电路,用于将响应分组缓冲到来自分开提供的第一总线代理的请求,并且每个以较慢的第二通信速度缓冲。 第一控制电路还有助于将缓冲的响应分组以更快的第一通信速度批量转发到总线控制器。 在一个实施例中,I / O外围设备还包括第二控制电路,用于以第一通信速度,以第一通信速度从总线控制器接收第二总线代理的第二总线代理用于第二总线代理。 在一个实施例中,I / O外围设备是集线器。
    • 10. 发明授权
    • Device driver configuration in a computer system
    • 计算机系统中的设备驱动程序配置
    • US5319751A
    • 1994-06-07
    • US815331
    • 1991-12-27
    • John I. Garney
    • John I. Garney
    • G06F3/00G06F9/44G06F9/445G06F12/02G06F13/10G06F13/14G06F13/40G06F13/00
    • G06F13/4068G06F13/102G06F9/4415G06F12/023
    • A computer system for dynamically configuring device drivers of removable system resources. The computer system comprises a processor, a system memory and an interface for receiving removable system resources such as feature cards. Each feature card includes a card memory area comprising: 1) a full device driver portion, and 2) a stub device driver portion. Upon insertion of a card into the computer system, the device driver stub code image is read from the card memory area and transferred into an area of computer system memory. The device driver stub code is then executed by the processor of the computer system from computer system random access memory. Conversely, the full device driver code is not transferred to the computer system random access memory; rather, the full device driver is executed while still resident on the card. Upon execution, the device driver stub enables access to the full card resident device driver by allowing memory mapping to the full device driver. The full device driver may then be activated by the processor. Upon removal of a feature card from the computer system, the device driver stub disables access to the full card resident device driver by disallowing memory mapping to the full device driver.
    • 用于动态配置可移动系统资源的设备驱动程序的计算机系统。 计算机系统包括处理器,系统存储器和用于接收诸如功能卡的可移除系统资源的接口。 每个功能卡包括卡存储区域,其包括:1)完整设备驱动器部分,以及2)存根设备驱动器部分。 在将卡插入计算机系统中时,从卡存储区读取设备驱动器存根代码图像并将其传送到计算机系统存储器的区域中。 然后由计算机系统的处理器从计算机系统随机存取存储器执行设备驱动器存根代码。 相反,完整的设备驱动程序代码不会传输到计算机系统随机存取存储器; 而是在仍然驻留在卡上时执行完整的设备驱动程序。 执行后,设备驱动程序存根通过允许存储器映射到完整的设备驱动程序来访问全部卡驻留设备驱动程序。 然后可以由处理器激活完整的设备驱动程序。 从计算机系统中删除功能卡后,设备驱动程序存根通过不允许对完整设备驱动程序的内存映射来禁用对完整的卡驻留设备驱动程序的访问。