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1. 发明授权

US08841893B2 Dual-loop voltage regulator architecture with high DC accuracy and fast response time 有权
标题翻译：双回路稳压器架构，具有高直流精度和响应时间快
公开(公告)号：US08841893B2
公开(公告)日：2014-09-23
申请号：US13213578
申请日：2011-08-19
申请人： John F. Bulzacchelli , Carrie E. Cox , Zeynep Toprak-Deniz , Daniel J. Friedman , Joseph A. Iadanza , Todd M. Rasmus
发明人： John F. Bulzacchelli , Carrie E. Cox , Zeynep Toprak-Deniz , Daniel J. Friedman , Joseph A. Iadanza , Todd M. Rasmus
IPC分类号： G05F1/575
CPC分类号： G05F1/575
摘要： Dual-loop voltage regulator circuits and methods in which a dual-loop voltage regulation framework is implemented with a first inner loop having a bang-bang voltage regulator to achieve nearly instantaneous response time, and a second outer loop, which is slower in operating speed than the first inner loop, to controllably adjust a trip point of the bang-bang voltage regulator to achieve high DC accuracy.
摘要翻译：双环路电压调节器电路和方法，其中使用具有爆轰电压调节器的第一内环实现双回路电压调节框架以实现几乎瞬时的响应时间，以及第二外环，其操作速度较慢比第一个内环，可控地调节砰砰电压调节器的跳闸点，以实现高直流精度。

2. 发明申请

US20120153910A1 DUAL-LOOP VOLTAGE REGULATOR ARCHITECTURE WITH HIGH DC ACCURACY AND FAST RESPONSE TIME 有权
标题翻译：具有高直流精度和快速响应时间的双环电压调节器架构
公开(公告)号：US20120153910A1
公开(公告)日：2012-06-21
申请号：US13213578
申请日：2011-08-19
申请人： John F. Bulzacchelli , Carrie E. Cox , Zeynep Toprak-Deniz , Daniel J. Friedman , Joseph A. Iadanza , Todd M. Rasmus
发明人： John F. Bulzacchelli , Carrie E. Cox , Zeynep Toprak-Deniz , Daniel J. Friedman , Joseph A. Iadanza , Todd M. Rasmus
IPC分类号： G05F1/10
CPC分类号： G05F1/575
摘要： Dual-loop voltage regulator circuits and methods in which a dual-loop voltage regulation framework is implemented with a first inner loop having a bang-bang voltage regulator to achieve nearly instantaneous response time, and a second outer loop, which is slower in operating speed than the first inner loop, to controllably adjust a trip point of the bang-bang voltage regulator to achieve high DC accuracy.
摘要翻译：双环路电压调节器电路和方法，其中使用具有爆轰电压调节器的第一内环实现双回路电压调节框架以实现几乎瞬时的响应时间，以及第二外环，其操作速度较慢比第一个内环，可控地调节砰砰电压调节器的跳闸点，以实现高直流精度。

3. 发明申请

US20120153909A1 HYBRID FAST-SLOW PASSGATE CONTROL METHODS FOR VOLTAGE REGULATORS EMPLOYING HIGH SPEED COMPARATORS 审中-公开
标题翻译：采用高速比较器的电压调节器的混合快速低通控制方法
公开(公告)号：US20120153909A1
公开(公告)日：2012-06-21
申请号：US13213368
申请日：2011-08-19
申请人： William L. Bucossi , John F. Bulzacchelli , Mohak Chhabra , Zeynep Toprak-Deniz , Daniel J. Friedman , Joseph A. Iadanza , Todd M. Rasmus
发明人： William L. Bucossi , John F. Bulzacchelli , Mohak Chhabra , Zeynep Toprak-Deniz , Daniel J. Friedman , Joseph A. Iadanza , Todd M. Rasmus
IPC分类号： G05F1/10
CPC分类号： H02M3/1563 , H02M1/15 , H02M2003/1566
摘要： Voltage regulator circuits and methods implementing hybrid fast-slow passgate control circuitry are provided to minimize the ripple amplitude of a regulated voltage output. In one aspect, a voltage regulator circuit includes a comparator, a first passgate device, a second passgate device, and a bandwidth limiting control circuit. The comparator compares a reference voltage to a regulated voltage at an output node of the voltage regulator circuit and generates a first control signal on a first gate control path based on a result of the comparing. The first and second passgate devices are connected to the output node of the regulator circuit. The first passgate device is controlled in a bang-bang mode of operation by the first control signal to supply current to the output node. The bandwidth limiting control circuit has an input connected to the first gate control path and an output connected to the second passgate device. The bandwidth limiting control circuit generates a second control signal based on the first control signal, wherein the second control signal is a slew rate limited version of the first control signal, and wherein the second passgate is controlled by the second control signal to supply current to the output node.
摘要翻译：提供了实现混合快速慢门控制电路的稳压器电路和方法，以最小化稳压电压输出的纹波幅度。在一个方面，电压调节器电路包括比较器，第一通道门，第二通道器件和带宽限制控制电路。比较器将参考电压与调节器电路的输出节点处的调节电压进行比较，并且基于比较的结果在第一门控制路径上产生第一控制信号。第一和第二传递门装置连接到调节器电路的输出节点。第一传递门装置通过第一控制信号被控制在爆炸操作模式中，以向输出节点提供电流。带宽限制控制电路具有连接到第一门控制路径的输入端和连接到第二通道门装置的输出端。带宽限制控制电路基于第一控制信号产生第二控制信号，其中第二控制信号是第一控制信号的转换速率限制版本，并且其中第二传递门由第二控制信号控制以将电流提供给输出节点。

4. 发明申请

US20100328130A1 TIME-TO-DIGITAL BASED ANALOG-TO-DIGITAL CONVERTER ARCHITECTURE 有权
标题翻译：基于时间到数字的模拟到数字转换器架构
公开(公告)号：US20100328130A1
公开(公告)日：2010-12-30
申请号：US12494496
申请日：2009-06-30
申请人： John F. Bulzacchelli , Daniel J. Friedman , Shahrzad Naraghi , Sergey V. Rylov , Alexander V. Rylyakov , Zeynep Toprak-Deniz
发明人： John F. Bulzacchelli , Daniel J. Friedman , Shahrzad Naraghi , Sergey V. Rylov , Alexander V. Rylyakov , Zeynep Toprak-Deniz
IPC分类号： H03M1/50
CPC分类号： H03M1/20 , H03M1/1215 , H03M1/502
摘要： Apparatus and methods are provided relating to time-to-digital based analog-to-digital converter. An apparatus includes a time-to-digital converter based analog-to-digital converter for generating a first signal and a second signal having a timing relationship between a rising edge of the first signal and a rising edge of the second signal based on a sampled input analog voltage level, and converting the timing relationship into a corresponding time-to-digital representation. The time-to-digital representation is obtained without any voltage comparison and current comparison.
摘要翻译：提供了关于基于时间到数字的模数转换器的装置和方法。一种装置包括：基于时间 - 数字转换器的模数转换器，用于产生第一信号;以及第二信号，其具有基于采样的第一信号的上升沿和第二信号的上升沿之间的定时关系输入模拟电压电平，并将定时关系转换成相应的时间 - 数字表示。在没有任何电压比较和电流比较的情况下获得时间到数字表示。

5. 发明授权

US07893861B2 Time-to-digital based analog-to-digital converter architecture 有权
标题翻译：基于时间到数字的模数转换器架构
公开(公告)号：US07893861B2
公开(公告)日：2011-02-22
申请号：US12494496
申请日：2009-06-30
申请人： John F. Bulzacchelli , Daniel J. Friedman , Shahrzad Naraghi , Sergey V. Rylov , Alexander V. Rylyakov , Zeynep Toprak-Deniz
发明人： John F. Bulzacchelli , Daniel J. Friedman , Shahrzad Naraghi , Sergey V. Rylov , Alexander V. Rylyakov , Zeynep Toprak-Deniz
IPC分类号： H03M1/50
CPC分类号： H03M1/20 , H03M1/1215 , H03M1/502
摘要： Apparatus and methods are provided relating to time-to-digital based analog-to-digital converter. An apparatus includes a time-to-digital converter based analog-to-digital converter for generating a first signal and a second signal having a timing relationship between a rising edge of the first signal and a rising edge of the second signal based on a sampled input analog voltage level, and converting the timing relationship into a corresponding time-to-digital representation. The time-to-digital representation is obtained without any voltage comparison and current comparison.
摘要翻译：提供了关于基于时间到数字的模数转换器的装置和方法。一种装置包括：基于时间 - 数字转换器的模数转换器，用于产生第一信号;以及第二信号，其具有基于采样的第一信号的上升沿和第二信号的上升沿之间的定时关系输入模拟电压电平，并将定时关系转换成相应的时间 - 数字表示。在没有任何电压比较和电流比较的情况下获得时间到数字表示。

6. 发明申请

US20110316506A1 Dual Loop Voltage Regulator with Bias Voltage Capacitor 有权
标题翻译：具有偏置电压电容器的双回路稳压器
公开(公告)号：US20110316506A1
公开(公告)日：2011-12-29
申请号：US12822507
申请日：2010-06-24
申请人： John Bulzacchelli , Paul D. Muench , Michael A. Sperling , Zeynep Toprak-Deniz
发明人： John Bulzacchelli , Paul D. Muench , Michael A. Sperling , Zeynep Toprak-Deniz
IPC分类号： G05F1/10
CPC分类号： G05F1/575
摘要： A voltage regulator includes a regulator input connected to a reference voltage; a regulator output that outputs a regulated voltage to an electrical load; a first loop, the first loop configured to receive the reference voltage, the first loop outputting a bias voltage; a second loop, the second loop configured to receive the bias voltage as an input; and a bias voltage capacitor connected to a node between the first loop and the second loop.
摘要翻译：电压调节器包括连接到参考电压的调节器输入; 调节器输出，其将调节的电压输出到电负载; 第一回路，所述第一回路被配置为接收所述参考电压，所述第一回路输出偏置电压; 第二回路，所述第二回路被配置为接收所述偏置电压作为输入; 以及连接到第一回路和第二回路之间的节点的偏压电容器。

7. 发明授权

US08575905B2 Dual loop voltage regulator with bias voltage capacitor 有权
标题翻译：具有偏置电容的双回路稳压器
公开(公告)号：US08575905B2
公开(公告)日：2013-11-05
申请号：US12822507
申请日：2010-06-24
申请人： John Bulzacchelli , Paul D. Muench , Michael A. Sperling , Zeynep Toprak-Deniz
发明人： John Bulzacchelli , Paul D. Muench , Michael A. Sperling , Zeynep Toprak-Deniz
IPC分类号： G05F1/40 , G05F1/44
CPC分类号： G05F1/575
摘要： A voltage regulator includes a regulator input connected to a reference voltage; a regulator output that outputs a regulated voltage to an electrical load; a first loop, the first loop configured to receive the reference voltage, the first loop outputting a bias voltage; a second loop, the second loop configured to receive the bias voltage as an input; and a bias voltage capacitor connected to a node between the first loop and the second loop.
摘要翻译：电压调节器包括连接到参考电压的调节器输入; 调节器输出，其将调节的电压输出到电负载; 第一回路，所述第一回路被配置为接收所述参考电压，所述第一回路输出偏置电压; 第二回路，所述第二回路被配置为接收所述偏置电压作为输入; 以及连接到第一回路和第二回路之间的节点的偏压电容器。

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