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1. 发明授权

US08738875B2 Increasing memory capacity in power-constrained systems 有权
标题翻译：在功率有限的系统中增加内存容量
公开(公告)号：US08738875B2
公开(公告)日：2014-05-27
申请号：US13295196
申请日：2011-11-14
申请人： John Bruce Carter , Wei Huang , Karthick Rajamani , Kshitij Sudan , Joanne R. Rawson
发明人： John Bruce Carter , Wei Huang , Karthick Rajamani , Freeman Leigh Rawson, III , Kshitij Sudan
IPC分类号： G06F12/06
CPC分类号： G06F12/08 , G06F1/3275 , G06F9/5094 , G06F2212/1028 , G11C5/04 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： A system, and computer program product for increasing a capacity of a memory are provided in the illustrative embodiments. Using an application executing using a processor wherein the memory includes a set of ranks, the memory is configured to form a cold tier and a hot tier, the cold tier including a first subset of ranks from the set of ranks in the memory, and the hot tier including a second subset of ranks from the set of ranks in the memory. A determination is made whether a page to which a memory access request is directed is located in the cold tier in the memory. In response to the page being located in the cold tier of the memory, the processing of the memory access request is throttled by processing the memory access request with a delay.
摘要翻译：在说明性实施例中提供了用于增加存储器容量的系统和计算机程序产品。使用使用处理器执行的应用程序，其中所述存储器包括一组等级，所述存储器被配置为形成冷层和热层，所述冷层包括来自所述存储器中的所述一组等级的第一子群，热层包括来自内存中的一组排名的第二个子集。确定存储器访问请求所指向的页面是否位于存储器中的冷层中。响应于页面位于存储器的冷层中，通过以延迟处理存储器访问请求来限制存储器访问请求的处理。

2. 发明申请

US20130124814A1 INCREASING MEMORY CAPACITY IN POWER-CONSTRAINED SYSTEMS 有权
标题翻译：在功率约束系统中增加存储容量
公开(公告)号：US20130124814A1
公开(公告)日：2013-05-16
申请号：US13295196
申请日：2011-11-14
申请人： John Bruce Carter , Wei Huang , Karthick Rajamani , Kshitij Sudan , Joanne R Rawson
发明人： John Bruce Carter , Wei Huang , Karthick Rajamani , Freeman Leigh Rawson, III , Kshitij Sudan
IPC分类号： G06F12/00
CPC分类号： G06F12/08 , G06F1/3275 , G06F9/5094 , G06F2212/1028 , G11C5/04 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： A system, and computer program product for increasing a capacity of a memory are provided in the illustrative embodiments. Using an application executing using a processor wherein the memory includes a set of ranks, the memory is configured to form a cold tier and a hot tier, the cold tier including a first subset of ranks from the set of ranks in the memory, and the hot tier including a second subset of ranks from the set of ranks in the memory. A determination is made whether a page to which a memory access request is directed is located in the cold tier in the memory. In response to the page being located in the cold tier of the memory, the processing of the memory access request is throttled by processing the memory access request with a delay.
摘要翻译：在说明性实施例中提供了用于增加存储器容量的系统和计算机程序产品。使用使用处理器执行的应用程序，其中所述存储器包括一组等级，所述存储器被配置为形成冷层和热层，所述冷层包括来自所述存储器中的所述等级的队列的第一子集，热层包括来自内存中的一组排名的第二个子集。确定存储器访问请求所指向的页面是否位于存储器中的冷层中。响应于页面位于存储器的冷层中，通过以延迟处理存储器访问请求来限制存储器访问请求的处理。

3. 发明授权

US08719527B2 Increasing memory capacity in power-constrained systems 有权
标题翻译：在功率有限的系统中增加内存容量
公开(公告)号：US08719527B2
公开(公告)日：2014-05-06
申请号：US13460044
申请日：2012-04-30
申请人： John Bruce Carter , Wei Huang , Karthick Rajamani , Kshitij Sudan , Joanne B. Rawson
发明人： John Bruce Carter , Wei Huang , Karthick Rajamani , Freeman Leigh Rawson, III , Kshitij Sudan
IPC分类号： G06F12/06
CPC分类号： G06F12/08 , G06F1/3275 , G06F9/5094 , G06F2212/1028 , G11C5/04 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： A method for increasing a capacity of a memory is provided in the illustrative embodiments. Using an application executing using a processor wherein the memory includes a set of ranks, the memory is configured to form a cold tier and a hot tier, the cold tier including a first subset of ranks from the set of ranks in the memory, and the hot tier including a second subset of ranks from the set of ranks in the memory. A determination is made whether a page to which a memory access request is directed is located in the cold tier in the memory. In response to the page being located in the cold tier of the memory, the processing of the memory access request is throttled by processing the memory access request with a delay.
摘要翻译：在说明性实施例中提供了用于增加存储器的容量的方法。使用使用处理器执行的应用程序，其中所述存储器包括一组等级，所述存储器被配置为形成冷层和热层，所述冷层包括来自所述存储器中的所述一组等级的第一子群，热层包括来自内存中的一组排名的第二个子集。确定存储器访问请求所指向的页面是否位于存储器中的冷层中。响应于页面位于存储器的冷层中，通过以延迟处理存储器访问请求来限制存储器访问请求的处理。

4. 发明申请

US20130124810A1 INCREASING MEMORY CAPACITY IN POWER-CONSTRAINED SYSTEMS 有权
标题翻译：在功率约束系统中增加存储容量
公开(公告)号：US20130124810A1
公开(公告)日：2013-05-16
申请号：US13460044
申请日：2012-04-30
申请人： John Bruce Carter , Wei Huang , Karthick Rajamani , Kshitij Sudan , Joanne B. Rawson
发明人： John Bruce Carter , Wei Huang , Karthick Rajamani , Freeman Leigh Rawson, III , Kshitij Sudan
IPC分类号： G06F12/02
CPC分类号： G06F12/08 , G06F1/3275 , G06F9/5094 , G06F2212/1028 , G11C5/04 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： A method for increasing a capacity of a memory is provided in the illustrative embodiments. Using an application executing using a processor wherein the memory includes a set of ranks, the memory is configured to form a cold tier and a hot tier, the cold tier including a first subset of ranks from the set of ranks in the memory, and the hot tier including a second subset of ranks from the set of ranks in the memory. A determination is made whether a page to which a memory access request is directed is located in the cold tier in the memory. In response to the page being located in the cold tier of the memory, the processing of the memory access request is throttled by processing the memory access request with a delay.
摘要翻译：在说明性实施例中提供了用于增加存储器的容量的方法。使用使用处理器执行的应用程序，其中所述存储器包括一组等级，所述存储器被配置为形成冷层和热层，所述冷层包括来自所述存储器中的所述等级的队列的第一子集，热层包括来自内存中的一组排名的第二个子集。确定存储器访问请求所指向的页面是否位于存储器中的冷层中。响应于页面位于存储器的冷层中，通过以延迟处理存储器访问请求来限制存储器访问请求的处理。

5. 发明授权

US08779846B2 Performance of digital circuits using current management 失效
标题翻译：使用当前管理的数字电路的性能
公开(公告)号：US08779846B2
公开(公告)日：2014-07-15
申请号：US13549748
申请日：2012-07-16
申请人： Malcolm Scott Allen-Ware , John Bruce Carter , Heather Lynn Hanson , Wei Huang , Charles Robert Lefurgy , Karthick Rajamani
发明人： Malcolm Scott Allen-Ware , John Bruce Carter , Heather Lynn Hanson , Wei Huang , Charles Robert Lefurgy , Karthick Rajamani
IPC分类号： G06F1/10 , G06F3/02 , H03K17/16 , H03K19/003
CPC分类号： G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： A method for improving the performance of a digital circuit is provided in the illustrative embodiments. A real frequency of operation of the digital circuit is adjusted using a control loop in the digital circuit, the adjusting the real frequency being responsive to a change in an operating condition of the digital circuit. A measurement of a current drawn by the digital circuit is received from a voltage regulator supplying electrical power to the digital circuit. An over-current target current value is received. A voltage output from the voltage regulator to the digital circuit is adjusted such that the current drawn by the digital circuit does not exceed the over-current target current value.
摘要翻译：在说明性实施例中提供了一种用于改善数字电路的性能的方法。使用数字电路中的控制环来调整数字电路的实际工作频率，响应于数字电路的工作状态的变化来调整实际频率。从向数字电路提供电力的电压调节器接收由数字电路汲取的电流的测量值。接收过电流目标电流值。调整从电压调节器到数字电路的输出电压，使得由数字电路汲取的电流不超过过电流目标电流值。

6. 发明申请

US20130035797A1 PERFORMANCE OF DIGITAL CIRCUITS USING CURRENT MANAGEMENT 失效
标题翻译：使用电流管理的数字电路的性能
公开(公告)号：US20130035797A1
公开(公告)日：2013-02-07
申请号：US13549748
申请日：2012-07-16
申请人： Malcolm Scott Allen-Ware , John Bruce Carter , Heather Lynn Hanson , Wei Huang , Charles Robert Lefurgy , Karthick Rajamani
发明人： Malcolm Scott Allen-Ware , John Bruce Carter , Heather Lynn Hanson , Wei Huang , Charles Robert Lefurgy , Karthick Rajamani
IPC分类号： G05D11/00
CPC分类号： G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： A method for improving the performance of a digital circuit is provided in the illustrative embodiments. A real frequency of operation of the digital circuit is adjusted using a control loop in the digital circuit, the adjusting the real frequency being responsive to a change in an operating condition of the digital circuit. A measurement of a current drawn by the digital circuit is received from a voltage regulator supplying electrical power to the digital circuit. An over-current target current value is received. A voltage output from the voltage regulator to the digital circuit is adjusted such that the current drawn by the digital circuit does not exceed the over-current target current value.
摘要翻译：在说明性实施例中提供了一种用于改善数字电路的性能的方法。使用数字电路中的控制环来调整数字电路的实际工作频率，响应于数字电路的工作状态的变化来调整实际频率。从向数字电路提供电力的电压调节器接收由数字电路汲取的电流的测量值。接收过电流目标电流值。调整从电压调节器到数字电路的输出电压，使得由数字电路汲取的电流不超过过电流目标电流值。

7. 发明申请

US20130033306A1 PERFORMANCE OF DIGITAL CIRCUITS USING CURRENT MANAGEMENT 审中-公开
标题翻译：使用电流管理的数字电路的性能
公开(公告)号：US20130033306A1
公开(公告)日：2013-02-07
申请号：US13195684
申请日：2011-08-01
申请人： Malcolm Scott Allen-Ware , John Bruce Carter , Heather Lynn Hanson , Wei Huang , Charles Robert Lefurgy , Karthick Rajamani
发明人： Malcolm Scott Allen-Ware , John Bruce Carter , Heather Lynn Hanson , Wei Huang , Charles Robert Lefurgy , Karthick Rajamani
IPC分类号： G05F1/10
CPC分类号： G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： A method, system, and computer program product for improving the performance of a digital circuit are provided in the illustrative embodiments. A real frequency of operation of the digital circuit is adjusted using a control loop in the digital circuit, the adjusting the real frequency being responsive to a change in an operating condition of the digital circuit. A measurement of a current drawn by the digital circuit is received from a voltage regulator supplying electrical power to the digital circuit. An over-current target current value is received. A voltage output from the voltage regulator to the digital circuit is adjusted such that the current drawn by the digital circuit does not exceed the over-current target current value.
摘要翻译：在说明性实施例中提供了用于改善数字电路的性能的方法，系统和计算机程序产品。使用数字电路中的控制环来调整数字电路的实际工作频率，响应于数字电路的工作状态的变化来调整实际频率。从向数字电路提供电力的电压调节器接收由数字电路汲取的电流的测量值。接收过电流目标电流值。调整从电压调节器到数字电路的输出电压，使得由数字电路汲取的电流不超过过电流目标电流值。

8. 发明授权

US09329670B2 Predicting energy savings 有权
标题翻译：预测节能
公开(公告)号：US09329670B2
公开(公告)日：2016-05-03
申请号：US13488822
申请日：2012-06-05
申请人： Malcolm S. Allen-Ware , Wei Huang , Fadi M. Kassem , Karthick Rajamani , Todd J. Rosedahl , Guillermo J. Silva
发明人： Malcolm S. Allen-Ware , Wei Huang , Fadi M. Kassem , Karthick Rajamani , Todd J. Rosedahl , Guillermo J. Silva
IPC分类号： G01F1/32 , G06F1/32
CPC分类号： G06F1/329 , Y02D10/24
摘要： A mechanism is provided for estimating energy/power consumption of a fixed-frequency operating mode while system is running in dynamic power management mode. For each time interval in a plurality of time intervals within a time period: a first processor identifies a modeled total nominal power value for at least one second processor during a current time interval, stores the modeled total nominal power value for the current time interval in a storage, identifies a dynamic power management mode power value for the at least one second processor in the data processing system during the current interval, and stores the dynamic power management mode power value for the current time interval in the storage. Responsive to the time period expiring, a comparison is produced of a plurality of modeled total nominal power values and a plurality of dynamic power management mode power values over the time period.
摘要翻译：提供了一种用于在系统以动态功率管理模式运行时估计固定频率操作模式的能量/功率消耗的机制。对于在一段时间段内的多个时间间隔中的每个时间间隔：第一处理器在当前时间间隔期间识别至少一个第二处理器的建模总额定功率值，将建模的总额定功率值存储在当前时间间隔中存储器，在当前间隔期间识别数据处理系统中的至少一个第二处理器的动态功率管理模式功率值，并将当前时间间隔的动态功率管理模式功率值存储在存储器中。响应于时间段到期，在该时间段内产生多个建模的总额定功率值和多个动态功率管理模式功率值的比较。

9. 发明申请

US20130325378A1 Predicting Energy Savings 有权
标题翻译：预测节能
公开(公告)号：US20130325378A1
公开(公告)日：2013-12-05
申请号：US13488822
申请日：2012-06-05
申请人： Malcolm S. Allen-Ware , Wei Huang , Fadi M. Kassem , Karthick Rajamani , Todd J. Rosedahl , Guillermo J. Silva
发明人： Malcolm S. Allen-Ware , Wei Huang , Fadi M. Kassem , Karthick Rajamani , Todd J. Rosedahl , Guillermo J. Silva
IPC分类号： G06F19/00 , G01R21/133
CPC分类号： G06F1/329 , Y02D10/24
摘要： A mechanism is provided for estimating energy/power consumption of a fixed-frequency operating mode while system is running in dynamic power management mode. For each time interval in a plurality of time intervals within a time period: a first processor identifies a modeled total nominal power value for at least one second processor during a current time interval, stores the modeled total nominal power value for the current time interval in a storage, identifies a dynamic power management mode power value for the at least one second processor in the data processing system during the current interval, and stores the dynamic power management mode power value for the current time interval in the storage. Responsive to the time period expiring, a comparison is produced of a plurality of modeled total nominal power values and a plurality of dynamic power management mode power values over the time period.
摘要翻译：提供了一种用于在系统以动态功率管理模式运行时估计固定频率操作模式的能量/功率消耗的机制。对于在一段时间段内的多个时间间隔中的每个时间间隔：第一处理器在当前时间间隔期间识别至少一个第二处理器的建模总额定功率值，将建模的总额定功率值存储在当前时间间隔中存储器，在当前间隔期间识别数据处理系统中的至少一个第二处理器的动态功率管理模式功率值，并将当前时间间隔的动态功率管理模式功率值存储在存储器中。响应于时间段到期，在该时间段内产生多个建模的总额定功率值和多个动态功率管理模式功率值的比较。

10. 发明申请

US20120223764A1 ON-CHIP CONTROL OF THERMAL CYCLING 审中-公开
标题翻译：热循环的片上控制
公开(公告)号：US20120223764A1
公开(公告)日：2012-09-06
申请号：US13040094
申请日：2011-03-03
申请人： Malcolm Scott Allen-Ware , John Bruce Carter , Elmootazbellah Nabil Elnozahy , Wei Huang
发明人： Malcolm Scott Allen-Ware , John Bruce Carter , Elmootazbellah Nabil Elnozahy , Wei Huang
IPC分类号： H03K3/36
CPC分类号： H01L23/34 , H01L2924/0002 , H01L2924/00
摘要： A method, system, and computer program product for on-chip control of thermal cycling in an integrated circuit (IC) are provided in the illustrative embodiments. A first circuit is configured on the IC for adjusting a first voltage being applied to a first part of the IC. A first temperature of the first part is measured at a first time. A determination is made that the first temperature is outside a temperature range defined by an upper temperature threshold and a lower temperature threshold. The first voltage is adjusted by reducing the first voltage when the first temperature exceeds the upper temperature threshold and by increasing the first voltage when the first temperature is below the lower temperature threshold, thereby causing the first temperature of the first part to attain a value within the temperature range.
摘要翻译：在说明性实施例中提供了用于集成电路（IC）中的热循环的片上控制的方法，系统和计算机程序产品。在IC上配置第一电路，用于调整施加到IC的第一部分的第一电压。在第一时间测量第一部分的第一温度。确定第一温度在由较高温度阈值和较低温度阈值所限定的温度范围之外。当第一温度超过上限温度阈值时，通过降低第一电压并且当第一温度低于低温阈值时增加第一电压，从而使第一部分的第一温度达到第一电压值温度范围。

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