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1. 发明授权

US08354850B2 Methods and systems for detecting the presence, or determining the location or the size, or detecting changes of material properties, of an object within a predefined space 有权
标题翻译：用于检测预定义空间内物体的存在或确定位置或大小或检测材料属性的变化的方法和系统
公开(公告)号：US08354850B2
公开(公告)日：2013-01-15
申请号：US12669359
申请日：2008-07-16
申请人： Joern Soerensen , Henrik Riehm Soerensen
发明人： Joern Soerensen , Henrik Riehm Soerensen
IPC分类号： G01R27/26 , G08B13/26
CPC分类号： G01V3/088
摘要： A method for detecting the presence, and/or determining the location, and/or detecting changes in the material properties, of a first object (4) within a predefined space (12) and compensating for the disturbance caused by a second object, where the method comprises the following steps: providing at least a first and a second electrode (6) capacitively coupled to each other; conductively applying an electrical signal to each of the first and second electrodes (6), the electrical signals being different for the first and second electrodes (6); for each of the electrodes (6) measuring the current signal through, and/or the voltage signal on, the electrode (6); deriving from the measured values an indication of the disturbance caused by the second object; and deriving from the measured values and the indication of the disturbance a disturbance-compensated indication of the presence, and/or the location, and/or changes in the material properties, of the first object (4).
摘要翻译：一种用于检测在预定空间（12）内的第一对象（4）的存在和/或确定位置和/或检测材料属性的变化并补偿由第二对象引起的干扰的方法，其中该方法包括以下步骤：提供至少彼此电容耦合的第一和第二电极（6）; 对第一和第二电极（6）中的每一个导电地施加电信号，对于第一和第二电极（6），电信号不同。对于测量电流信号的每个电极（6）和/或电极（6）上的电压信号; 从测量值得出由第二物体引起的干扰的指示; 并且从第一物体（4）的测量值和干扰指示导出干扰补偿的存在和/或位置指示和/或材料特性的改变。

2. 发明申请

US20100271047A1 METHODS AND SYSTEMS FOR DETECTING THE PRESENCE, OR DETERMINING THE LOCATION OR THE SIZE, OR DETECTING CHANGES OF MATERIAL PROPERTIES, OF AN OBJECT WITHIN A PREDEFINED SPACE 有权
标题翻译：用于检测存在或确定位置或大小的方法和系统，或检测材料特性在预定空间中的对象的变化
公开(公告)号：US20100271047A1
公开(公告)日：2010-10-28
申请号：US12669359
申请日：2008-07-16
申请人： Joern Soerensen , Henrik Riehm Soerensen
发明人： Joern Soerensen , Henrik Riehm Soerensen
IPC分类号： G01R27/26
CPC分类号： G01V3/088
摘要： A method for detecting the presence, and/or determining the location, and/or detecting changes in the material properties, of a first object (4) within a predefined space (12) and compensating for the disturbance caused by a second object, where the method comprises the following steps: providing at least a first and a second electrode (6) capacitively coupled to each other; conductively applying an electrical signal to each of the first and second electrodes (6), the electrical signals being different for the first and second electrodes (6); for each of the electrodes (6) measuring the current signal through, and/or the voltage signal on, the electrode (6); deriving from the measured values an indication of the disturbance caused by the second object; and deriving from the measured values and the indication of the disturbance a disturbance-compensated indication of the presence, and/or the location, and/or changes in the material properties, of the first object (4).
摘要翻译：一种用于检测在预定空间（12）内的第一对象（4）的存在和/或确定位置和/或检测材料属性的变化并补偿由第二对象引起的干扰的方法，其中该方法包括以下步骤：提供至少彼此电容耦合的第一和第二电极（6）; 对第一和第二电极（6）中的每一个导电地施加电信号，对于第一和第二电极（6），电信号不同。对于测量电流信号的每个电极（6）和/或电极（6）上的电压信号; 从测量值得出由第二物体引起的干扰的指示; 并且从第一物体（4）的测量值和干扰指示导出干扰补偿的存在和/或位置指示和/或材料特性的改变。

3. 发明授权

US08032678B2 Shared resource arbitration 有权
标题翻译：共享资源仲裁
公开(公告)号：US08032678B2
公开(公告)日：2011-10-04
申请号：US12265250
申请日：2008-11-05
申请人： Jean-Louis Tardieux , Joern Soerensen
发明人： Jean-Louis Tardieux , Joern Soerensen
IPC分类号： G06F13/36
CPC分类号： G06F13/362
摘要： Masters request access to a shared resource, such as a shared bus. Usage of the shared bus by each of the masters is monitored, a request to use the shared bus by one of the masters is received, and usage of the shared bus by the master is compared with a corresponding bandwidth threshold. The request is arbitrated if the usage of the shared bus by the master is below the bandwidth threshold, and the request to use the shared bus is granted to the master based on the arbitration.
摘要翻译：主人请求访问共享资源，例如共享总线。监视每个主机对共享总线的使用情况，接收主机之一使用共享总线的请求，将主机的共享总线的使用与对应的带宽阈值进行比较。如果主机的共享总线的使用低于带宽阈值，则请求被仲裁，并且基于仲裁向主机授予使用共享总线的请求。

4. 发明申请

US20100115167A1 Shared Resource Arbitration 有权
标题翻译：共享资源仲裁
公开(公告)号：US20100115167A1
公开(公告)日：2010-05-06
申请号：US12265250
申请日：2008-11-05
申请人： Jean-Louis Tardieux , Joern Soerensen
发明人： Jean-Louis Tardieux , Joern Soerensen
IPC分类号： G06F13/36
CPC分类号： G06F13/362
摘要： Masters request access to a shared resource, such as a shared bus. Usage of the shared bus by each of the masters is monitored, a request to use the shared bus by one of the masters is received, and usage of the shared bus by the master is compared with a corresponding bandwidth threshold. The request is arbitrated if the usage of the shared bus by the master is below the bandwidth threshold, and the request to use the shared bus is granted to the master based on the arbitration.
摘要翻译：主人请求访问共享资源，例如共享总线。监视每个主机对共享总线的使用情况，接收主机之一使用共享总线的请求，将主机的共享总线的使用与对应的带宽阈值进行比较。如果主机的共享总线的使用低于带宽阈值，则请求被仲裁，并且基于仲裁向主机授予使用共享总线的请求。

5. 发明授权

US06889331B2 Dynamic voltage control method and apparatus 有权
标题翻译：动态电压控制方法及装置
公开(公告)号：US06889331B2
公开(公告)日：2005-05-03
申请号：US10231446
申请日：2002-08-29
申请人： Joern Soerensen , Michael Allen , Palle Birk
发明人： Joern Soerensen , Michael Allen , Palle Birk
IPC分类号： G06F9/30 , G06F1/04 , G06F1/08 , G06F1/32 , G06F9/38 , G06F9/46 , G06F9/48 , G06F11/28 , G06F11/36 , G06F12/00 , G06F12/02 , G06F12/08 , G06F13/28 , G06F13/38 , G06F13/42 , H03L7/08 , H03L7/095 , H03L7/183 , H04B1/40
CPC分类号： G06F11/3636 , G06F1/04 , G06F1/08 , G06F1/3203 , G06F1/3237 , G06F1/324 , G06F1/3287 , G06F1/3296 , G06F9/3836 , G06F9/3851 , G06F9/3869 , G06F9/4843 , G06F12/0842 , G06F12/0859 , G06F13/28 , G06F13/385 , G06F2213/3814 , H03L7/0802 , H03L7/095 , H03L7/183 , H04W88/06 , Y02D10/126 , Y02D10/128 , Y02D10/151 , Y02D10/171 , Y02D10/172 , Y02D10/24 , Y02D50/20 , Y02D70/1222 , Y02D70/124 , Y02D70/142 , Y02D70/144 , Y02D70/164 , Y10S331/02
摘要： A dynamic power controller is provided that identifies a clock frequency requirement of a processor and determines a voltage requirement to support the clock frequency requirement. The dynamic power controller transitions the processor to a power state defined by the clock frequency requirement and the voltage requirement. In particular, a voltage level indicated by the voltage requirement is supplied to the processor and the frequency distribution indicated by the frequency requirement is provided to the clocks signals of the processor.
摘要翻译：提供了一种动态功率控制器，用于识别处理器的时钟频率要求，并确定支持时钟频率要求的电压要求。动态功率控制器将处理器转换为由时钟频率要求和电压要求定义的功率状态。特别地，由电压要求指示的电压电平被提供给处理器，并且由频率要求指示的频率分布被提供给处理器的时钟信号。

6. 发明授权

US07957758B2 Method of and apparatus for reducing power consumption in a mobile telephony system 有权
标题翻译：用于降低移动电话系统中的功耗的方法和装置
公开(公告)号：US07957758B2
公开(公告)日：2011-06-07
申请号：US11818226
申请日：2007-06-13
申请人： Joern Soerensen , Carsten Griem , Carsten Pedersen
发明人： Joern Soerensen , Carsten Griem , Carsten Pedersen
IPC分类号： H04B7/00
CPC分类号： H04W52/0229 , H04L1/0053 , H04L1/0059 , Y02D70/1222
摘要： A method of decoding data comprising a plurality of data-bursts, comprising the steps of: i) receiving a first one of the data-bursts, ii) associating hypothesis data with the or each received data-bursts; iii) attempting to decode the data; and iv) if the decode is successful to power down the receiver, and if the decode is unsuccessful receiving a further one of the data-bursts and repeating steps ii) to iv), until all of the data has been received.
摘要翻译：一种对包括多个数据突发的数据进行解码的方法，包括以下步骤：i）接收数据突发中的第一个，ii）将假设数据与所接收或接收的数据突发相关联; iii）尝试解码数据; 以及iv）如果解码成功地关闭接收机，并且如果解码不成功接收数据突发中的另一个，并重复步骤ii）至iv），直到所有数据已被接收。

7. 发明授权

US07114093B2 Generic architecture and system for a programmable serial port having a shift register and state machine therein 有权
标题翻译：用于可编程串行端口的通用架构和系统，其中具有移位寄存器和状态机
公开(公告)号：US07114093B2
公开(公告)日：2006-09-26
申请号：US10231526
申请日：2002-08-29
申请人： Jean-Louis Tardieux , Joern Soerensen
发明人： Jean-Louis Tardieux , Joern Soerensen
IPC分类号： G06F13/00 , H03M7/00
CPC分类号： G06F11/3636 , G06F1/04 , G06F1/08 , G06F1/3203 , G06F1/3237 , G06F1/324 , G06F1/3287 , G06F1/3296 , G06F9/3836 , G06F9/3851 , G06F9/3869 , G06F9/4843 , G06F12/0842 , G06F12/0859 , G06F13/28 , G06F13/385 , G06F2213/3814 , H03L7/0802 , H03L7/095 , H03L7/183 , H04W88/06 , Y02D10/126 , Y02D10/128 , Y02D10/151 , Y02D10/171 , Y02D10/172 , Y02D10/24 , Y02D50/20 , Y02D70/1222 , Y02D70/124 , Y02D70/142 , Y02D70/144 , Y02D70/164 , Y10S331/02
摘要： A high-speed programmable serial port having a finite state machine, a clock generator capable of controlling shifting of bits from a shift register and a shift register having a bit counter capable of maintaining a numbered count of data bits in a serial output. The clock generator and shift register reduce the burdens on a finite state machine, thus improving data throughput and the ability to provided data according to a multitude of data protocols.
摘要翻译：具有有限状态机的高速可编程串行端口，能够控制来自移位寄存器的位的移位的时钟发生器和具有能够维持串行输出中的数字位的编号计数的位计数器的移位寄存器。时钟发生器和移位寄存器减少了有限状态机的负担，从而提高了数据吞吐量，并提供了根据多种数据协议提供数据的能力。

8. 发明申请

US20100325368A1 SHARED MEMORY HAVING MULTIPLE ACCESS CONFIGURATIONS 有权
标题翻译：具有多个访问配置的共享记忆
公开(公告)号：US20100325368A1
公开(公告)日：2010-12-23
申请号：US12486308
申请日：2009-06-17
申请人： Kari Ann O'Brien , George Lattimore , Joern Soerensen , Mathew B. Rutledge , Paul William Hollis
发明人： Kari Ann O'Brien , George Lattimore , Joern Soerensen , Mathew B. Rutledge , Paul William Hollis
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F13/1652
摘要： An apparatus includes a first processor that accesses memory according to a first clock frequency, a second processor that accesses memory according to a second clock frequency, and a memory device is configurable to selectively operate according to the first clock frequency or the second clock frequency. A memory controller enables dynamic configuration of organization of the memory device to allow a first portion of the memory device to be accessed by the first processor according to the first clock frequency and a second portion of the memory device to be accessed by the second processor according to the second clock frequency.
摘要翻译：一种装置包括根据第一时钟频率访问存储器的第一处理器，根据第二时钟频率访问存储器的第二处理器，以及存储器件可配置为根据第一时钟频率或第二时钟频率选择性地操作。存储器控制器实现对存储器设备的组织的动态配置，以允许第一处理器根据第一时钟频率访问存储器件的第一部分，并且由第二处理器访问存储器件的第二部分，到第二个时钟频率。

9. 发明申请

US20080311947A1 Method of and apparatus for reducing power consumption in a mobile telephony system 有权
标题翻译：用于降低移动电话系统中的功耗的方法和装置
公开(公告)号：US20080311947A1
公开(公告)日：2008-12-18
申请号：US11818226
申请日：2007-06-13
申请人： Joern Soerensen , Carsten Griem , Carsten Pedersen
发明人： Joern Soerensen , Carsten Griem , Carsten Pedersen
IPC分类号： H04Q7/20
CPC分类号： H04W52/0229 , H04L1/0053 , H04L1/0059 , Y02D70/1222
摘要： A method of decoding data comprising a plurality of data-bursts, comprising the steps of: i) receiving a first one of the data-bursts, ii) associating hypothesis data with the or each received data-bursts; iii) attempting to decode the data; and iv) if the decode is successful to power down the receiver, and if the decode is unsuccessful receiving a further one of the data-bursts and repeating steps ii) to iv), until all of the data has been received.
摘要翻译：一种对包括多个数据突发的数据进行解码的方法，包括以下步骤：i）接收数据突发中的第一个，ii）将假设数据与所接收或接收的数据突发相关联; iii）尝试解码数据; 以及iv）如果解码成功地关闭接收机，并且如果解码不成功接收数据突发中的另一个，并重复步骤ii）至iv），直到所有数据已被接收。

10. 发明授权

US06950672B2 Clock enable system 有权
标题翻译：时钟使能系统
公开(公告)号：US06950672B2
公开(公告)日：2005-09-27
申请号：US10159177
申请日：2002-05-30
申请人： Jeffrey C. Gealow , Thomas J. Barber, Jr. , Palle Birk , Joern Soerensen
发明人： Jeffrey C. Gealow , Thomas J. Barber, Jr. , Palle Birk , Joern Soerensen
IPC分类号： G06F1/32 , H04B1/18 , H04B1/38
CPC分类号： G06F1/3237 , G06F1/3215 , H04W52/0293 , Y02D10/128 , Y02D70/1222
摘要： A clock enable system for a multichip device includes a first integrated circuit including a clock signal and at least a second integrated circuit including at least one functional block periodically requiring clock signals from the first integrated circuit; a clock required circuit responsive to each functional block for providing a clock required signal in response to activation of any one or more of the functional blocks; and a clock enable circuit responsive to the clock required signal for enabling the first integrated circuit to provide clock signals to the functional blocks on the second integrated circuit.
摘要翻译：用于多芯片器件的时钟使能系统包括包括时钟信号的第一集成电路和至少包括至少一个功能块的第二集成电路，周期性地要求来自第一集成电路的时钟信号; 响应于每个功能块的响应于任何一个或多个功能块的激活而提供时钟所需信号的时钟需要电路; 以及响应于时钟所需信号的时钟使能电路，用于使第一集成电路能够向第二集成电路上的功能块提供时钟信号。

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