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1. 发明授权

US07534711B2 System and method for direct etching 有权
标题翻译：用于直接蚀刻的系统和方法
公开(公告)号：US07534711B2
公开(公告)日：2009-05-19
申请号：US11615972
申请日：2006-12-23
申请人： Jingang Wu , Fei Luo , Guanqie Gao , Cheng Yang
发明人： Jingang Wu , Fei Luo , Guanqie Gao , Cheng Yang
IPC分类号： H01L21/20
CPC分类号： H01L21/76802
摘要： System and method for direct etching. According to an embodiment, the present invention provides a method for manufacturing an integrated circuit device. The method includes a step for providing a substrate having a contact region, which is provided between a first word line and a second word line. The contact region has an overlying plug structure, which is provided within a thickness of a first dielectric layer. The first dielectric layer includes a portion overlying the plug structure. The first dielectric layer has a planarized surface region. The method also includes a step for forming a first line and a second line and a space provided between the first word line and the second world line. The space is provided within a region overlying the plug structure.
摘要翻译：用于直接蚀刻的系统和方法根据实施例，本发明提供一种用于制造集成电路器件的方法。该方法包括提供具有接触区域的基板的步骤，该接触区域设置在第一字线和第二字线之间。接触区域具有覆盖的塞子结构，其设置在第一介电层的厚度内。第一电介质层包括覆盖插塞结构的部分。第一电介质层具有平坦化的表面区域。该方法还包括用于形成第一线和第二线以及设置在第一字线和第二世界线之间的空间的步骤。该空间设置在覆盖插头结构的区域内。

2. 发明申请

US20080146030A1 SYSTEM AND METHOD FOR DIRECT ETCHING 有权
标题翻译：用于直接蚀刻的系统和方法
公开(公告)号：US20080146030A1
公开(公告)日：2008-06-19
申请号：US11615972
申请日：2006-12-23
申请人： Jingang Wu , Fei Luo , Guanqie Gao , Cheng Yang
发明人： Jingang Wu , Fei Luo , Guanqie Gao , Cheng Yang
IPC分类号： H01L21/44
CPC分类号： H01L21/76802
摘要： System and method for direct etching. According to an embodiment, the present invention provides a method for manufacturing an integrated circuit device. The method includes a step for providing a substrate having a contact region, which is provided between a first word line and a second word line. The contact region has an overlying plug structure, which is provided within a thickness of a first dielectric layer. The first dielectric layer includes a portion overlying the plug structure. The first dielectric layer has a planarized surface region. The method also includes a step for forming a first line and a second line and a space provided between the first word line and the second world line. The space is provided within a region overlying the plug structure.
摘要翻译：用于直接蚀刻的系统和方法根据实施例，本发明提供一种用于制造集成电路器件的方法。该方法包括提供具有接触区域的基板的步骤，该接触区域设置在第一字线和第二字线之间。接触区域具有覆盖的塞子结构，其设置在第一介电层的厚度内。第一电介质层包括覆盖插塞结构的部分。第一电介质层具有平坦化的表面区域。该方法还包括用于形成第一线和第二线以及设置在第一字线和第二世界线之间的空间的步骤。该空间设置在覆盖插头结构的区域内。

3. 发明授权

US08426286B2 Method and device for a DRAM capacitor having low depletion ratio 有权
标题翻译：具有低耗尽率的DRAM电容器的方法和装置
公开(公告)号：US08426286B2
公开(公告)日：2013-04-23
申请号：US13078917
申请日：2011-04-01
申请人： Cheng Yang , Bo Tao , Jason Luo , Jingang Wu
发明人： Cheng Yang , Bo Tao , Jason Luo , Jingang Wu
IPC分类号： H01L21/20
CPC分类号： H01L28/84 , H01L28/82
摘要： A method of manufacturing a semiconductor integrated circuit device having low depletion ratio capacitor comprising: forming hemispherical grains (HSG) on a poly-silicon; doping the hemispherical grained polysilicon in a phosphine gas; and rapid thermal oxidizing the doped hemispherical grained polysilicon at 850° C. for 10 seconds. The method further comprises nitridizing the rapid thermal oxidized hemispherical-grained polysilicon and depositing a alumina film on the silicon nitride layer. A semiconductor integrated circuit device having a low depletion ratio capacitor according to the disclosed manufacturing method is provided.
摘要翻译：一种制造具有低耗尽率电容器的半导体集成电路器件的方法，包括：在多晶硅上形成半球状晶粒（HSG）; 在磷化氢气体中掺杂半球形多晶硅; 并在850℃下快速热氧化掺杂的半球晶粒状多晶硅10秒。该方法还包括将快速热氧化的半球状多晶硅氮化并在氮化硅层上沉积氧化铝膜。提供了根据所公开的制造方法具有低耗尽率电容器的半导体集成电路器件。

4. 发明授权

US10758169B2 Method and apparatus for collecting and analyzing urine samples 有权
公开(公告)号：US10758169B2
公开(公告)日：2020-09-01
申请号：US16639244
申请日：2018-10-30
申请人： Cheng Yang , Long Di , Longze Chen , Cao Dong
发明人： Cheng Yang , Long Di , Longze Chen , Cao Dong
IPC分类号： A61B5/20 , E03D11/13 , A61B10/00
摘要： A urine collecting and analyzing apparatus that mounts on a toilet. The apparatus has a housing that mounts to or is integrated into the rim of the toilet bowl and has an opening for access to the bowl. The housing has a collector compartment and a controller compartment. A collector cup fits under the collector compartment extends over the bowl in a retracted position and in a collecting position. When in the collecting position, the cup captures urine released by a user. The cup is connected to a measurement chamber by a transfer tube. The urine moves through the transfer tube from the cup to the measurement chamber to a predetermined threshold volume and level. A controller in the controller compartment reads sensors and transmits sensor data to a device for storage and display.

5. 发明授权

US07846644B2 Photopatternable deposition inhibitor containing siloxane 有权
标题翻译：含有硅氧烷的光图案沉积抑制剂
公开(公告)号：US07846644B2
公开(公告)日：2010-12-07
申请号：US11942780
申请日：2007-11-20
申请人： Lyn M. Irving , David H. Levy , Diane C. Freeman , Cheng Yang , Peter J. Cowdery-Corvan
发明人： Lyn M. Irving , David H. Levy , Diane C. Freeman , Cheng Yang , Peter J. Cowdery-Corvan
IPC分类号： G03F7/26 , G03F7/075
CPC分类号： G03F7/0757 , G03F7/0754 , G03F7/40
摘要： An atomic-layer-deposition process for forming a patterned thin film comprising providing a substrate, applying a photopatternable deposition inhibitor material to the substrate, wherein the deposition inhibitor material comprises an organosiloxane compound; and patterning the deposition inhibitor material. The thin film is substantially deposited only in the selected areas of the substrate not having the deposition inhibitor material.
摘要翻译：一种用于形成图案化薄膜的原子层沉积工艺，包括提供衬底，将光可图案化沉积抑制剂材料施加到衬底上，其中所述沉积抑制剂材料包括有机硅氧烷化合物; 并图案化沉积抑制剂材料。薄膜仅基本上沉积在不具有沉积抑制剂材料的基底的选定区域中。

6. 发明授权

US07788258B1 Automatic determination of whether a document includes an image gallery 有权
标题翻译：自动确定文档是否包含图像库
公开(公告)号：US07788258B1
公开(公告)日：2010-08-31
申请号：US10871030
申请日：2004-06-21
申请人： Radhika Malpani , Cheng Yang , Yonatan Zunger
发明人： Radhika Malpani , Cheng Yang , Yonatan Zunger
IPC分类号： G06F7/00 , G06F17/30
CPC分类号： G06F17/30277 , G06F17/30265 , G06F17/30864 , G06K9/6267
摘要： Image galleries are automatically located within documents, such as web pages. Documents that are determined to contain image galleries may be treated differently when storing the document for later retrieval by an image search engine. In one implementation, the image galleries are automatically located within a document by calculating position information indicating relative positions of images in the document. The document may be determined to contain an image gallery when the position information indicates that the images in the document are generally evenly distributed.
摘要翻译：图像库自动位于文档（如网页）中。确定包含图像库的文档在存储文档以供图像搜索引擎稍后检索时可以被不同地对待。在一个实现中，图像库通过计算指示文档中的图像的相对位置的位置信息而自动位于文档内。当位置信息指示文档中的图像大致均匀分布时，文档可以被确定为包含图像库。

7. 发明申请

US20090130609A1 Colored mask combined with selective area deposition 有权
标题翻译：彩色面罩与选择性区域沉积相结合
公开(公告)号：US20090130609A1
公开(公告)日：2009-05-21
申请号：US11986169
申请日：2007-11-20
申请人： Lyn M. Irving , Diane C. Freeman , Peter J. Cowdery-Corvan , Cheng Yang , David H. Levy
发明人： Lyn M. Irving , Diane C. Freeman , Peter J. Cowdery-Corvan , Cheng Yang , David H. Levy
IPC分类号： G03F1/00
CPC分类号： H01L27/1288 , G03F7/0005 , G03F7/2022 , H01L27/1214 , H01L27/1225 , H01L27/1292 , H01L29/66765 , H01L29/7869
摘要： The invention relates to a process for forming a structure comprising (a) providing a transparent support; (b) forming a color mask on a first side of the transparent support; (c) applying a first layer comprising a deposition inhibitor material that is sensitive to visible light; (d) patterning the first layer by exposing the first layer through the color mask with visible light to form a first pattern and developing the deposition inhibitor material to provide selected areas of the first layer effectively not having the deposition inhibitor material; and (e) depositing a second layer of functional material over the transparent support; wherein the second layer of functional material is substantially deposited only in selected areas over the transparent support not having the deposition inhibitor material.
摘要翻译：本发明涉及一种用于形成结构的方法，包括（a）提供透明支撑体; （b）在所述透明支撑体的第一面上形成彩色掩模; （c）施加包含对可见光敏感的沉积抑制剂材料的第一层; （d）通过用可见光将所述第一层暴露于所述彩色掩模以形成第一图案并使所述沉积抑制剂材料显影以提供所述第一层的选定区域，而不具有所述沉积抑制剂材料; 和（e）在所述透明支撑体上沉积第二层功能材料; 其中第二层功能材料仅在不具有沉积抑制剂材料的透明支撑体上基本上沉积在选定的区域中。

8. 发明授权

US07051029B1 Identifying and reporting on frequent sequences of events in usage data 有权
标题翻译：识别和报告使用数据中的频繁事件序列
公开(公告)号：US07051029B1
公开(公告)日：2006-05-23
申请号：US09755971
申请日：2001-01-05
申请人： Usama Fayyad , Neal Rothleder , Cheng Yang
发明人： Usama Fayyad , Neal Rothleder , Cheng Yang
IPC分类号： G06F17/30
CPC分类号： G06F17/30876 , Y10S707/99943
摘要： A method, system, and computer-readable medium for identifying sequences of interaction events of interest that frequently occur is described. In particular, techniques are described for receiving multiple groups each having related interaction events in serial or sequential order, and for determining sequences of interaction events that frequently occur in the multiple groups. Reports can also be generated and provided that include information about the determined frequent sequences. The techniques can at times be used to provide a service to customers in which logs containing data about interaction events related to that customer (e.g., usage events for a provided service or of a provided Website) are received or obtained, in which frequent sequences in the log data are identified, and in which reports are provided to representatives of the customer about the frequent sequences (e.g., remotely over the Web based on interactive specifications).
摘要翻译：描述了用于识别经常发生的感兴趣的交互事件序列的方法，系统和计算机可读介质。具体地，描述了用于接收多个组的技术，每个组具有串行或顺序的相关交互事件，并且用于确定多个组中经常发生的交互事件的序列。还可以生成报告，并提供包括关于确定的频繁序列的信息。这些技术有时可用于向客户提供服务，其中包含与该客户相关的交互事件的数据的日志（例如，所提供的服务或所提供的网站的使用事件）被接收或获得，其中频繁的序列记录日志数据，并且向客户的代表提供有关频繁序列的报告（例如，基于交互式规范的Web远程访问）。

9. 发明申请

US20160265761A1 ELECTRICAL BOX HAVING LED NIGHT LAMP AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：具有LED灯泡的电气盒及其制造方法
公开(公告)号：US20160265761A1
公开(公告)日：2016-09-15
申请号：US15159843
申请日：2016-05-20
申请人： Cheng Yang , GUANGZHOU MICRO WELDING EQUIPMENT CO., LTD.
发明人： Shilang Yang , Shitong Yang , Kemin Yang , Cheng Yang
IPC分类号： F21V33/00 , F21V23/04 , F21V19/00 , F21V23/00
CPC分类号： F21V33/006 , F21S8/035 , F21V19/003 , F21V23/001 , F21V23/04 , F21Y2101/00 , F21Y2101/02 , F21Y2115/10 , H02G3/10
摘要： The present invention provides an electrical box having LED night lamp including an electrical box capable of being assembled to a wall and a LED night lamp assembled to the electrical box. The LED night lamp includes a circuit board having a switch and a LED point light electrically connected thereto. The circuit board is electrically connected to a mains supply wire. The electric connection of the circuit board and the mains supply wire is hidden in the electrical box. The electrical box having LED night lamp according to the present invention can provide a new way for the promotion of low-carbon energy saving green lighting.
摘要翻译：本发明提供一种具有LED夜灯的电箱，其包括能够组装到墙壁上的电箱和组装到电箱的LED夜灯。 LED夜灯包括具有与其电连接的开关和LED点光的电路板。电路板电连接到电源线。电路板和电源线的电气连接隐藏在电气箱中。根据本发明的具有LED夜灯的电器盒可以提供促进低碳节能绿色照明的新途径。

10. 发明申请

US20140038390A1 THROUGH SILICON VIA GUARD RING 审中-公开
标题翻译：通过硅胶通过保护环
公开(公告)号：US20140038390A1
公开(公告)日：2014-02-06
申请号：US13753868
申请日：2013-01-30
申请人： Cheng Yang , Jiamin Qian , Hai Wu
发明人： Cheng Yang , Jiamin Qian , Hai Wu
IPC分类号： H01L23/58
CPC分类号： H01L23/585 , H01L24/73 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2924/12042 , H01L2924/15311 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： The present disclosure relates to forming a plurality of through silicon vias guard rings proximate the scribes streets of a microelectronic device wafer. The microelectronic device wafer includes a substrate wherein the through silicon via guard ring is fabricated by forming vias extending completely through the substrate. The through silicon via guard rings act as crack arresters, such that defects caused by cracks resulting from the dicing of the microelectronic wafer are substantially reduced or eliminated.
摘要翻译：本公开涉及在微电子器件晶片的文字街道附近形成多个通过硅通孔的保护环。微电子器件晶片包括其中通过硅通孔保护环的衬底通过形成完全延伸穿过衬底的通孔来制造。通过硅通孔保护环作为裂纹捕获器，使得由微电子晶片的切割引起的裂纹引起的缺陷被显着地减少或消除。

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