会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Resistance mirror circuit
    • 电阻镜电路
    • US06747508B2
    • 2004-06-08
    • US10229160
    • 2002-08-28
    • Jing-Meng LiuKent HwangChao-Hsuan ChuangCheng-Hsuan Fan
    • Jing-Meng LiuKent HwangChao-Hsuan ChuangCheng-Hsuan Fan
    • G05F110
    • G05F3/262
    • A resistance adjustable of resistance mirror circuit having a master resistor R0, a reference current source terminal providing a current value I0 through the master resistor R0 to ground; a first transistor; a current mirror source terminal providing a current value n I0, through the first transistor to ground; an operational amplifier having a positive terminal connecting to a drain of the first transistor, a negative terminal connecting to the other terminal of the master resistor R0, and an output terminal connecting to a gate of the first transistor; a mirror resistor set composed of a plurality of transistors in parallel each other and having their source electrode connecting to ground. Each transistor of the mirror resistor set has a ratio of channel width over channel length being m-fold of that of the first transistor, where m, n is any positive numbers. Since gates of the transistors connect to the output terminal of the operational amplifier, each of the transistors therefore has an equivalent resistance Req=(1/nm)R0.
    • 电阻镜电路的电阻可调,具有主电阻器R0,参考电流源端子通过主电阻器R0接地提供电流值I0; 第一晶体管; 电流镜源端子,通过第一晶体管接地提供电流值n I0; 具有连接到第一晶体管的漏极的正端子的运算放大器,连接到主电阻器R0的另一端子的负极端子和连接到第一晶体管的栅极的输出端子; 由多个彼此并联的晶体管组成并且其源电极连接到地的镜电阻器组。 镜面电阻器组的每个晶体管的沟道宽度与沟道长度的比率与第一晶体管的沟道长度的m倍成正比,其中m,n是任何正数。 由于晶体管的栅极连接到运算放大器的输出端,因此每个晶体管具有等效电阻Req =(1 / nm)R0。
    • 3. 发明授权
    • Synchronized data communication on a one-wired bus
    • 在单线总线上同步数据通信
    • US07180886B2
    • 2007-02-20
    • US10153784
    • 2002-05-24
    • Jing-Meng LiuKent HwangChao-Hsuan ChuangCheng-Hsuan Fan
    • Jing-Meng LiuKent HwangChao-Hsuan ChuangCheng-Hsuan Fan
    • H04J3/06H04L12/50
    • H04L25/4923H04L7/06H04L25/4904
    • In a synchronized data communication on a one-wired bus, it transmits and receives a synchronizing signal that segments part of or all proportions of the data signal by use of three electrically distinguishable statuses for the identifier of the synchronizing signal and the logic states of the data signal to increase the endurance of frequency displacement and resist influences of the interference of external conditions, low quality of transmission medium, and limitation of transmission distance and make the reliability and correctness of the signal transmission improve substantially. It is also clearly illustrated the feasibility and simplicity for implementing the one-wired synchronized communication by a plurality of exemplary signal types and a transceiver circuitry.
    • 在单线总线上的同步数据通信中,它发送和接收同步信号,该同步信号通过使用用于同步信号的标识符的三个电可区分状态以及数据信号的逻辑状态来分割数据信号的一部分或全部比例 数据信号增加频率位移的耐久性,抵抗外部条件干扰,传输介质质量差,传输距离限制的影响,使信号传输的可靠性和正确性大大提高。 还清楚地示出了通过多个示例性信号类型和收发器电路来实现单线同步通信的可行性和简单性。
    • 4. 发明授权
    • Inductor equivalent circuit and application thereof
    • 电感等效电路及其应用
    • US06809616B2
    • 2004-10-26
    • US10342183
    • 2003-01-15
    • Jing-Meng LiuKent HwangChao-Hsuan ChuangCheng-Hsuan Fan
    • Jing-Meng LiuKent HwangChao-Hsuan ChuangCheng-Hsuan Fan
    • H03H1100
    • H03H11/485H03H11/48
    • An inductor equivalent circuit is disclosed. The circuit comprises a reference current source, a first current mirror, a second current mirror, two operational amplifiers OP1 and OP2, a capacitor, a first transistor, a second transistor, a mirror resistor set, and a bypass current source in parallel with the capacitor. An input signal is through OP1 and second transistor to control the reference current source. The first mirror current is then feed-back a signal to the first transistor through an OP2. The current signal makes the drain current of the first transistor lags the input voltage signal by 90° due to the capacitor coupled with the first mirror current source. The mirror resistor set can be resistors having one common terminal grounded, and other terminals each, respectively, coupled with the first and the second transistor and the capacitor, or can be composed of transistors and all of them with gate property biased so that the transistors in the mirror resistor set are operated in an ohmic region. The second mirror current provides an output current of the inductor equivalent circuit for next cascade stage.
    • 公开了一种电感器等效电路。 该电路包括参考电流源,第一电流镜,第二电流镜,两个运算放大器OP1和OP2,电容器,第一晶体管,第二晶体管,反射镜电阻器组以及旁路电流源 电容器。 输入信号通过OP1和第二晶体管来控制参考电流源。 然后通过OP2将第一镜电流反馈到第一晶体管。 由于与第一反射镜电流源耦合的电容器,电流信号使得第一晶体管的漏极电流滞留输入电压信号90°。 镜电阻器组可以是具有一个公共端子接地的电阻器,并且其他端子分别与第一和第二晶体管和电容器耦合,或者可以由晶体管组成,并且所有这些端子都具有偏置的栅极特性,使得晶体管 镜面电阻组在欧姆区域工作。 第二镜电流为下一级联级提供电感等效电路的输出电流。
    • 9. 发明授权
    • Trimmer method and device for circuits
    • 微调方法和电路设备
    • US06703885B1
    • 2004-03-09
    • US10245390
    • 2002-09-18
    • Cheng-Hsuan FanJing-Meng Liu
    • Cheng-Hsuan FanJing-Meng Liu
    • H03L500
    • G05F1/56
    • In a trimmer method and device, a reference signal of a target circuit is compared with a test signal, and a binary count output is generated according to result of the comparison. Thereafter, according to logic states of bits of the binary count output, electrical conduction through passive components that are coupled to the target circuit and that correspond respectively to the bits of the binary count output are selectively enabled and disabled so as to adjust the reference signal. The above steps are repeated by varying the binary count output until the reference signal approximates the test signal. Thereafter, fuses coupled to the passive components are melted selectively in a single fuse-melting operation so as to maintain the enabled and disabled states of electrical conduction through the passive components in order to set the reference signal to be approximate to the test signal.
    • 在微调方法和装置中,将目标电路的参考信号与测试信号进行比较,并根据比较结果生成二进制计数输出。 此后,根据二进制计数输出的位的逻辑状态,选择性地使能和禁止耦合到目标电路并且分别对应于二进制计数输出的位的无源分量的电传导,以便调整参考信号 。 通过改变二进制计数输出重复上述步骤,直到参考信号近似于测试信号。 此后,耦合到无源部件的熔丝在单熔丝熔化操作中选择性熔化,以便通过无源部件保持启用和禁用的导电状态,以将参考信号设置为接近测试信号。