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1. 发明申请

US20130033922A1 RESISTIVE-SWITCHING DEVICE CAPABLE OF IMPLEMENTING MULTIARY ADDITION OPERATION AND METHOD FOR MULTIARY ADDITION OPERATION 有权
标题翻译：能够实施多次添加操作的电容式开关装置和用于多次添加操作的方法
公开(公告)号：US20130033922A1
公开(公告)日：2013-02-07
申请号：US13641832
申请日：2011-11-18
申请人： Jinfeng Kang , Feifei Zhang , Bin Gao , Bing Chen , Lifeng Liu , Xiaoyan Liu
发明人： Jinfeng Kang , Feifei Zhang , Bin Gao , Bing Chen , Lifeng Liu , Xiaoyan Liu
IPC分类号： H01L45/00 , G11C11/00
CPC分类号： G11C13/0007 , G11C11/5685 , G11C13/0069 , G11C2013/0073 , G11C2013/0083
摘要： The present disclosure provides a resistive-switching device capable of implementing multiary addition operation and a method for implementing multiary addition operation using the resistive-switching device. The resistive-switching device has a plurality of resistance values each corresponding to a respective data value stored by the resistive-switching device and ranging from a high resistance value to a low resistance value. The data value stored by the resistive-switching device is increased by ‘1’ successively with a series of set pulses having a same pulse width and a same voltage amplitude being applied thereto. The data value stored by the resistive-switching device is set to ‘0’ with a reset pulse being applied thereto, and meanwhile a data value stored by a higher-bit resistive-switching device is increased by ‘1’ with a set pulse being applied thereto. In this way, multiary addition operation is implemented. The operation of the resistive-switching device can implement data storage and the multiary addition operation simultaneously, and thus substantially simplifies the circuit structure. As a result, the data storage can be integrated with calculation.
摘要翻译：本公开提供了一种能够实现多加法运算的电阻式开关装置和使用电阻式开关装置实现多重加法运算的方法。电阻开关器件具有多个电阻值，每个电阻值对应于由电阻开关器件存储的各个数据值，并且从高电阻值到低电阻值。由电阻式开关器件存储的数据值以连续的脉冲宽度与施加相同电压幅度的一系列设定脉冲连续增加1。电阻开关器件存储的数据值被设置为0，并且施加复位脉冲，同时由施加了设定脉冲的高位电阻开关器件存储的数据值增加1。以这种方式，实现多重添加操作。电阻式开关器件的工作可以同时实现数据存储和多重加法运算，从而大大简化了电路结构。因此，数据存储可以与计算集成。

2. 发明申请

US20120284218A1 NEURON DEVICE AND NEURAL NETWORK 有权
标题翻译：神经元设备和神经网络
公开(公告)号：US20120284218A1
公开(公告)日：2012-11-08
申请号：US13502462
申请日：2011-11-03
申请人： Jinfeng Kang , Bin Gao , Feifei Zhang , Bing Chen , Lifeng Liu , Xiaoyan Liu
发明人： Jinfeng Kang , Bin Gao , Feifei Zhang , Bing Chen , Lifeng Liu , Xiaoyan Liu
IPC分类号： G06N3/04 , H01L45/00
CPC分类号： G06N3/063
摘要： A neuron device includes a bottom electrode, a top electrode, and a layer of metal oxide variable resistance material sandwiched between the bottom electrode and the top electrode, in which the neuron device is switched to a normal state upon application of reset pulse, and is switched to an excitation state upon application of stimulus pulses. The neuron device has a comprehensive response to different amplitude, different width of a stimulus voltage pulse and different number of a sequence of stimulus pulses, and provides functionalities of a weighting section and a computing section. The neuron device has a simple structure, excellent scalability, quick speed, low operation voltage, and is compatible with the conventional silicon-based CMOS fabrication process, and thus suitable for mass production. The neuron device is capable of performing many biological functions and complex logic operations.
摘要翻译：神经元装置包括底部电极，顶部电极和夹在底部电极和顶部电极之间的金属氧化物可变电阻材料层，其中神经元装置在施加复位脉冲时切换到正常状态，并且是在施加刺激脉冲时切换到激发状态。神经元装置对刺激电压脉冲的不同幅度，不同宽度和不同数量的刺激脉冲序列具有综合响应，并提供加权部分和计算部分的功能。神经元器件结构简单，可扩展性好，速度快，工作电压低，与传统的硅基CMOS制造工艺兼容，适合批量生产。神经元器件能够执行许多生物学功能和复杂的逻辑运算。

3. 发明授权

US08929123B2 Resistive-switching device capable of implementing multiary addition operation and method for multiary addition operation 有权
标题翻译：能够实现多重加法运算的电阻式开关装置及多次加法运算方法
公开(公告)号：US08929123B2
公开(公告)日：2015-01-06
申请号：US13641832
申请日：2011-11-18
申请人： Jinfeng Kang , Feifei Zhang , Bin Gao , Bing Chen , Lifeng Liu , Xiaoyan Liu
发明人： Jinfeng Kang , Feifei Zhang , Bin Gao , Bing Chen , Lifeng Liu , Xiaoyan Liu
IPC分类号： G11C11/00 , G11C13/00 , G11C11/56
CPC分类号： G11C13/0007 , G11C11/5685 , G11C13/0069 , G11C2013/0073 , G11C2013/0083
摘要： The present disclosure provides a resistive-switching device capable of implementing multiary addition operation and a method for implementing multiary addition operation using the resistive-switching device. The resistive-switching device has a plurality of resistance values each corresponding to a respective data value stored by the resistive-switching device and ranging from a high resistance value to a low resistance value. The data value stored by the resistive-switching device is increased by ‘1’ successively with a series of set pulses having a same pulse width and a same voltage amplitude being applied thereto. The data value stored by the resistive-switching device is set to ‘0’ with a reset pulse being applied thereto, and meanwhile a data value stored by a higher-bit resistive-switching device is increased by ‘1’ with a set pulse being applied thereto. In this way, multiary addition operation is implemented.
摘要翻译：本公开提供了一种能够实现多加法运算的电阻式开关装置和使用电阻式开关装置实现多重加法运算的方法。电阻开关器件具有多个电阻值，每个电阻值对应于由电阻开关器件存储的各个数据值，并且从高电阻值到低电阻值。由电阻式开关器件存储的数据值以相同的脉冲宽度和相同的电压幅度施加一系列设定脉冲连续增加“1”。由施加复位脉冲的电阻开关器件存储的数据值被设定为“0”，同时由高位电阻开关器件存储的数据值增加“1”，设定脉冲为应用于此。以这种方式，实现多重添加操作。

4. 发明授权

US08924321B2 Three-layered neuron devices for neural network with reset voltage pulse 有权
标题翻译：神经元设备和神经网络
公开(公告)号：US08924321B2
公开(公告)日：2014-12-30
申请号：US13502462
申请日：2011-11-03
申请人： Jinfeng Kang , Bin Gao , Feifei Zhang , Bing Chen , Lifeng Liu , Xiaoyan Liu
发明人： Jinfeng Kang , Bin Gao , Feifei Zhang , Bing Chen , Lifeng Liu , Xiaoyan Liu
IPC分类号： G06F15/18 , G06N3/00 , G06N3/063
CPC分类号： G06N3/063
摘要： A neuron device includes a bottom electrode, a top electrode, and a layer of metal oxide variable resistance material sandwiched between the bottom electrode and the top electrode, in which the neuron device is switched to a normal state upon application of reset pulse, and is switched to an excitation state upon application of stimulus pulses. The neuron device has a comprehensive response to different amplitude, different width of a stimulus voltage pulse and different number of a sequence of stimulus pulses, and provides functionalities of a weighting section and a computing section. The neuron device has a simple structure, excellent scalability, quick speed, low operation voltage, and is compatible with the conventional silicon-based CMOS fabrication process, and thus suitable for mass production. The neuron device is capable of performing many biological functions and complex logic operations.
摘要翻译：神经元装置包括底部电极，顶部电极和夹在底部电极和顶部电极之间的金属氧化物可变电阻材料层，其中神经元装置在施加复位脉冲时切换到正常状态，并且是在施加刺激脉冲时切换到激发状态。神经元装置对刺激电压脉冲的不同幅度，不同宽度和不同数量的刺激脉冲序列具有综合响应，并提供加权部分和计算部分的功能。神经元器件结构简单，可扩展性好，速度快，工作电压低，与传统的硅基CMOS制造工艺兼容，适合批量生产。神经元器件能够执行许多生物学功能和复杂的逻辑运算。

5. 发明授权

US08552754B2 Method of testing reliability of semiconductor device 失效
标题翻译：测试半导体器件可靠性的方法
公开(公告)号：US08552754B2
公开(公告)日：2013-10-08
申请号：US13113513
申请日：2011-05-23
申请人： Xiaoyan Liu , Jiaqi Yang , Jinfeng Kang , Jingfeng Yang , Bing Chen
发明人： Xiaoyan Liu , Jiaqi Yang , Jinfeng Kang , Jingfeng Yang , Bing Chen
IPC分类号： G01R31/00
CPC分类号： G01R31/2621 , G01R31/2642
摘要： The invention provides a method of testing reliability of a semiconductor device, wherein the semiconductor device has negative bias temperature instability NBTI. The method comprises steps of: measuring a NBTI curve of a first set of semiconductor devices; measuring 1/f noise power spectrum density and drain current at a predetermined frequency for the first set of the semiconductor devices, under a condition that the first set of the semiconductor devices are biased at a gate electric field; measuring an equivalent oxide thickness EOT of gate dielectric of the first set of the semiconductor devices; measuring 1/f noise power spectrum density and drain current at the predetermined frequency for a second set of semiconductor devices, under a condition that the second set of the semiconductor devices are biased at the gate electric field; measuring an EOT of gate dielectric of the second set of the semiconductor devices; and evaluating a degradation characteristic of the second set of the semiconductor devices by using the NBTI curve of a first set of the semiconductor devices. The method saves the time required for testing the reliability of a large numbers of semiconductor devices, and will not cause damages to the second set of semiconductor devices.
摘要翻译：本发明提供一种测试半导体器件的可靠性的方法，其中半导体器件具有负偏压温度不稳定性NBTI。该方法包括以下步骤：测量第一组半导体器件的NBTI曲线; 在第一组半导体器件被偏置在栅极电场的条件下，测量用于第一组半导体器件的预定频率的1 / f噪声功率谱密度和漏极电流; 测量第一组半导体器件的栅极电介质的等效氧化物厚度EOT; 在第二组半导体器件偏置在栅极电场的条件下，测量第二组半导体器件的预定频率处的1 / f噪声功率谱密度和漏极电流; 测量所述第二组半导体器件的栅极电介质的EOT; 以及通过使用第一组半导体器件的NBTI曲线来评估第二组半导体器件的劣化特性。该方法节省了测试大量半导体器件的可靠性所需的时间，并且不会对第二组半导体器件造成损害。

6. 发明申请

US20120299608A1 METHOD OF TESTING RELIABILITY OF SEMICONDUCTOR DEVICE 失效
标题翻译：测试半导体器件可靠性的方法
公开(公告)号：US20120299608A1
公开(公告)日：2012-11-29
申请号：US13113513
申请日：2011-05-23
申请人： Xiaoyan Liu , Jiaqi Yang , Jinfeng Kang , Jingfeng Yang , Bing Chen
发明人： Xiaoyan Liu , Jiaqi Yang , Jinfeng Kang , Jingfeng Yang , Bing Chen
IPC分类号： G01R31/26
CPC分类号： G01R31/2621 , G01R31/2642
摘要： The invention provides a method of testing reliability of a semiconductor device, wherein the semiconductor device has negative bias temperature instability NBTI. The method comprises steps of: measuring a NBTI curve of a first set of semiconductor devices; measuring 1/f noise power spectrum density and drain current at a predetermined frequency for the first set of the semiconductor devices, under a condition that the first set of the semiconductor devices are biased at a gate electric field; measuring an equivalent oxide thickness EOT of gate dielectric of the first set of the semiconductor devices; measuring 1/f noise power spectrum density and drain current at the predetermined frequency for a second set of semiconductor devices, under a condition that the second set of the semiconductor devices are biased at the gate electric field; measuring an EOT of gate dielectric of the second set of the semiconductor devices; and evaluating a degradation characteristic of the second set of the semiconductor devices by using the NBTI curve of a first set of the semiconductor devices. The method saves the time required for testing the reliability of a large numbers of semiconductor devices, and will not cause damages to the second set of semiconductor devices.
摘要翻译：本发明提供一种测试半导体器件的可靠性的方法，其中半导体器件具有负偏压温度不稳定性NBTI。该方法包括以下步骤：测量第一组半导体器件的NBTI曲线; 在第一组半导体器件被偏置在栅极电场的条件下，测量用于第一组半导体器件的预定频率的1 / f噪声功率谱密度和漏极电流; 测量第一组半导体器件的栅极电介质的等效氧化物厚度EOT; 在第二组半导体器件偏置在栅极电场的条件下，测量第二组半导体器件的预定频率处的1 / f噪声功率谱密度和漏极电流; 测量所述第二组半导体器件的栅极电介质的EOT; 以及通过使用第一组半导体器件的NBTI曲线来评估第二组半导体器件的劣化特性。该方法节省了测试大量半导体器件的可靠性所需的时间，并且不会对第二组半导体器件造成损害。

7. 发明授权

US09707289B2 Biochemically stabilized HIV-1 ENV trimer vaccine 有权
公开(公告)号：US09707289B2
公开(公告)日：2017-07-18
申请号：US13082601
申请日：2011-04-08
申请人： Stephen C. Harrison , Bing Chen , Dan C. Barouch , Joseph P. Nkolola , Michael Scott Seaman
发明人： Stephen C. Harrison , Bing Chen , Dan C. Barouch , Joseph P. Nkolola , Michael Scott Seaman
IPC分类号： A61K39/00 , C12Q1/68 , C07H21/04 , C07K14/005 , A61K39/21 , A61K39/12
CPC分类号： A61K39/21 , A61K39/12 , A61K2039/53 , A61K2039/54 , A61K2039/545 , A61K2039/55566 , A61K2039/575 , C07K14/005 , C12N7/00 , C12N2740/16051 , C12N2740/16122 , C12N2740/16134 , C12N2740/16171
摘要： Stabilized trimers of a clade A strain and a clade C strain of HIV-1 are provided. Broadly neutralizing antisera against HIV-1, methods of making broadly neutralizing antisera against HIV-1, broadly neutralizing vaccines against HIV-1, as well as methods of treating subjects infected with HIV, preventing HIV infection, and inhibiting HIV-mediated activities are also provided.

8. 发明授权

US08968461B1 Concrete mix for electromagnetic wave/pulse shielding 有权
标题翻译：混凝土混合电磁波/脉冲屏蔽
公开(公告)号：US08968461B1
公开(公告)日：2015-03-03
申请号：US13472670
申请日：2012-05-16
申请人： Christopher Tuan , Lim Nguyen , Bing Chen
发明人： Christopher Tuan , Lim Nguyen , Bing Chen
IPC分类号： C04B14/48
CPC分类号： C04B14/022 , C04B14/024 , C04B14/48 , C04B28/04 , C04B40/001 , C04B2111/00258 , H01B1/16 , Y02W30/94 , C04B14/305 , C04B14/308 , C04B18/146 , C04B2103/32
摘要： Conductive concrete mixtures are described that are configured to provide EMP shielding and reflect and/or absorb, for instance, EM waves propagating through the conductive concrete mixture. The conductive concrete mixtures include cement, aggregate, water, metallic conductive material, and conductive carbon particles and/or magnetic material. The conductive material may include steel fibers, and the magnetic material may include taconite aggregate. The conductive concrete mixture may also include graphite powder, silica fume, and/or other supplementary cementitious materials (SCM). The conductive carbon particles may comprise from about zero to twenty-five percent (0-25%) of the conductive concrete mixture by weight and/or the magnetic material may comprise from about zero to fifty percent (0-50%) of the conductive concrete mixture by weight.
摘要翻译：描述了导电混凝土混合物，其被配置为提供EMP屏蔽并且反射和/或吸收例如通过导电混凝土混合物传播的EM波。导电混凝土混合物包括水泥，骨料，水，金属导电材料和导电碳颗粒和/或磁性材料。导电材料可以包括钢纤维，并且磁性材料可以包括铁灰石骨料。导电混凝土混合物还可以包括石墨粉，硅粉和/或其它辅助水泥材料（SCM）。导电碳颗粒可以包含按重量计约0.05％至25％（0-25％）的导电混凝土混合物，和/或磁性材料可包含约0-50％（0-50％）的导电混凝土混合物重量。

9. 发明授权

US08741310B2 Fusion-intermediate state of HIV-1 gp41 targeted by broadly neutralizing antibodies 有权
标题翻译：通过广泛中和抗体靶向的HIV-1 gp41的融合中间状态
公开(公告)号：US08741310B2
公开(公告)日：2014-06-03
申请号：US12869967
申请日：2010-08-27
申请人： Bing Chen , Gary H. Frey , Stephen C. Harrison
发明人： Bing Chen , Gary H. Frey , Stephen C. Harrison
IPC分类号： A61K39/21
CPC分类号： C07K14/005 , A61K39/12 , A61K39/21 , C12N2710/14143 , C12N2740/16122 , C12N2740/16134
摘要： Isolated, antigenic polypeptides including a prehairpin intermediate conformation of gp41 and vectors encoding such polypeptides are provided. Antibodies that bind to a prehairpin intermediate conformation of gp41 and methods of making antibodies a that bind to prehairpin intermediate conformation of gp41 are also provided. Vaccines against a prehairpin intermediate conformation of gp41, as well as methods of treating subjects infected with HIV, preventing HIV infection, and inhibiting HIV-mediated activities are also provided. Methods of screening compounds that bind to an isolated, prehairpin intermediate conformation of gp41 are further provided.
摘要翻译：提供了分离的抗原多肽，包括gp41的前体前体中间体构象和编码这些多肽的载体。还提供了结合gp41的前凝胶中间体构象的抗体和制备抗体a的方法，其与gp41的前凝胶中间构象结合。还提供了针对gp41的前凝胶中间构象的疫苗以及治疗HIV感染者，预防HIV感染和抑制HIV介导活性的方法。还提供了筛选结合gp41的分离的前贴片中间构象的化合物的方法。

10. 发明授权

US08731184B2 Performance testing of echo cancellers using a white noise test signal 有权
标题翻译：使用白噪声测试信号进行回声消除器的性能测试
公开(公告)号：US08731184B2
公开(公告)日：2014-05-20
申请号：US13471984
申请日：2012-05-15
申请人： Bing Chen , James H. James
发明人： Bing Chen , James H. James
IPC分类号： H04M9/08 , H04M3/26
CPC分类号： H04M3/26 , H04B3/23 , H04B3/493
摘要： Test equipment including a signal generator and a method of generating a test signal associated with an overall frequency band are disclosed. Also disclosed is a method of using the test signal to test an echo canceller. The method of generating the test signal includes generating a first time segment associated with a first frequency sub-band of the overall frequency band and generating a second time segment associated with a second frequency sub-band of the overall frequency band. The second frequency sub-band is higher than the first frequency sub-band. The method further includes generating a time gap segment separating the first time segment and the second time segment.
摘要翻译：公开了包括信号发生器和产生与总频带相关联的测试信号的方法的测试设备。还公开了使用测试信号来测试回波消除器的方法。产生测试信号的方法包括产生与整个频带的第一频率子带相关联的第一时间段，并且产生与整个频带的第二频率子带相关联的第二时间段。第二频率子带高于第一频率子带。该方法还包括产生分离第一时间段和第二时间段的时间间隔段。

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