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1. 发明申请

US20050214694A1 Pattern formation method 审中-公开
标题翻译：图案形成方法
公开(公告)号：US20050214694A1
公开(公告)日：2005-09-29
申请号：US11010602
申请日：2004-12-13
申请人： Jin Hong , Hyun-Woo Kim , Myoung-Ho Jung , Gyung-Jin Min
发明人： Jin Hong , Hyun-Woo Kim , Myoung-Ho Jung , Gyung-Jin Min
IPC分类号： H01L21/3065 , G03F7/00 , H01L21/027 , H01L21/311 , H01L21/314 , H01L21/3213 , H01L21/768
CPC分类号： H01L21/31144 , H01L21/0273 , H01L21/0276 , H01L21/3146 , H01L21/32139 , H01L21/76801 , H01L21/76802 , H01L21/76808 , H01L21/76838
摘要： A pattern formation method comprises forming a material layer on a substrate, forming an amorphous carbon layer on the material layer, forming an anti-reflective layer on the amorphous carbon layer, forming a silicon photoresist layer on the anti-reflective layer, forming a silicon photoresist layer pattern by patterning the silicon photoresist layer, etching the anti-reflective layer and the amorphous carbon layer using the silicon photoresist layer pattern as an etch mask to form an amorphous carbon layer pattern, and etching the material layer using the amorphous carbon layer pattern as an etch mask to form a pattern in the material layer.
摘要翻译：图案形成方法包括在基板上形成材料层，在所述材料层上形成无定形碳层，在所述非晶碳层上形成抗反射层，在所述抗反射层上形成硅光致抗蚀剂层，形成硅通过图案化硅光致抗蚀剂层，使用硅光致抗蚀剂层图案蚀刻抗反射层和非晶碳层作为蚀刻掩模以形成无定形碳层图案，并使用无定形碳层图案蚀刻材料层，作为在材料层中形成图案的蚀刻掩模。

2. 发明申请

US20060003268A1 Method of forming semiconductor patterns 审中-公开
标题翻译：形成半导体图案的方法
公开(公告)号：US20060003268A1
公开(公告)日：2006-01-05
申请号：US11155341
申请日：2005-06-17
申请人： Jin Hong , Myoung-Ho Jung , Hyun-Woo Kim
发明人： Jin Hong , Myoung-Ho Jung , Hyun-Woo Kim
IPC分类号： G03F7/36
CPC分类号： H01L21/0273 , H01L21/31138 , H01L21/32139 , H01L29/66795 , H01L29/785
摘要： A method of forming a pattern comprises the steps of stacking an inorganic hard mask layer, an organic mask layer, and an anti-reflecting layer on a substrate where a lower layer is formed, forming a photoresist pattern containing silicon on the anti-reflecting layer, performing an O2 plasma ashing to form a conformal layer of an oxide glass on the photoresist pattern containing silicon and to dry etch the anti-reflecting layer and the organic mask layer to form an anti-reflecting pattern and an organic mask pattern, removing the photoresist pattern, the anti-reflecting pattern, and the organic mask pattern, and etching the lower layer using a pattern of the inorganic hard mask layer as an etch mask.
摘要翻译：形成图案的方法包括以下步骤：在形成下层的基板上堆叠无机硬掩模层，有机掩模层和抗反射层，在抗反射层上形成含有硅的光致抗蚀剂图案执行O 2等离子体灰化以在含有硅的光致抗蚀剂图案上形成氧化物玻璃的保形层，并干燥蚀刻抗反射层和有机掩模层以形成抗反射图案和有机掩模图案，去除光致抗蚀剂图案，抗反射图案和有机掩模图案，并且使用无机硬掩模层的图案作为蚀刻掩模蚀刻下层。

3. 发明授权

US07335455B2 Method of forming an underlayer of a bi-layer resist film and method of fabricating a semiconductor device using the same 有权
标题翻译：形成双层抗蚀剂膜的底层的方法和使用其制造半导体器件的方法
公开(公告)号：US07335455B2
公开(公告)日：2008-02-26
申请号：US10787368
申请日：2004-02-26
申请人： Hyun-Woo Kim , Jin Hong , Myoung-Ho Jung , Sang-Gyun Woo
发明人： Hyun-Woo Kim , Jin Hong , Myoung-Ho Jung , Sang-Gyun Woo
IPC分类号： G03F7/00 , G03F7/004
CPC分类号： G03F7/095 , G03F7/091
摘要： A method of forming an underlayer of a bi-layer resist including forming a blended material by blending a polymer having an aromatic group and a methacrylate polymer, and coating a substrate with the blended material. The blended material coated on the substrate is irradiated to form an underlayer. The polymer having the aromatic group may be a novolac polymer or a naphthalene polymer.
摘要翻译：一种形成双层抗蚀剂的底层的方法，包括通过混合具有芳族基团的聚合物和甲基丙烯酸酯聚合物形成共混材料，并用共混材料涂覆基材。涂布在基材上的混合材料被照射以形成底层。具有芳基的聚合物可以是酚醛清漆聚合物或萘聚合物。

4. 发明申请

US20110059613A1 MASK PATTERN FOR SEMICONDUCTOR DEVICE FABRICATION, METHOD OF FORMING THE SAME, AND METHOD OF FABRICATING FINELY PATTERNED SEMICONDUCTOR DEVICE 失效
标题翻译：用于半导体器件制造的掩模图案，其形成方法以及制造精细图案半导体器件的方法
公开(公告)号：US20110059613A1
公开(公告)日：2011-03-10
申请号：US12946964
申请日：2010-11-16
申请人： Jung-Hwan Hah , Jin Hong , Hyun-Woo Kim , Hata Mitsuhiro , Kolake Mayya Subramanya , Sang-Gyun Woo
发明人： Jung-Hwan Hah , Jin Hong , Hyun-Woo Kim , Hata Mitsuhiro , Kolake Mayya Subramanya , Sang-Gyun Woo
IPC分类号： H01L21/31 , H01L21/20
CPC分类号： G03F7/40 , B82Y30/00 , G03F7/0752 , G03F7/165 , H01L21/0274
摘要： Provided are a mask pattern including a silicon-containing self-assembled molecular layer, a method of forming the same, and a method of fabricating a semiconductor device. The mask pattern includes a resist pattern formed on a semiconductor substrate and the self-assembled molecular layer formed on the resist pattern. The self-assembled molecular layer has a silica network formed by a sol-gel reaction. To form the mask pattern, first, the resist pattern is formed with openings on an underlayer covering the substrate to expose the underlayer to a first width. Then, the self-assembled molecular layer is selectively formed only on a surface of the resist pattern to expose the underlayer to a second width smaller than the first width. The underlayer is etched by using the resist pattern and the self-assembled molecular layer as an etching mask to obtain a fine pattern.
摘要翻译：提供了包括含硅自组装分子层的掩模图案，其形成方法和制造半导体器件的方法。掩模图案包括形成在半导体衬底上的抗蚀剂图案和形成在抗蚀剂图案上的自组装分子层。自组装分子层具有通过溶胶 - 凝胶反应形成的二氧化硅网络。为了形成掩模图案，首先，在覆盖基板的下层上形成抗蚀剂图案，使底层暴露于第一宽度。然后，仅在抗蚀剂图案的表面上选择性地形成自组装分子层，以使底层暴露于小于第一宽度的第二宽度。通过使用抗蚀剂图案和自组装分子层作为蚀刻掩模来蚀刻底层以获得精细图案。

5. 发明授权

US07851125B2 Mask pattern for semiconductor device fabrication, method of forming the same, and method of fabricating finely patterned semiconductor device 失效
标题翻译：用于半导体器件制造的掩模图案，其形成方法以及制造精细图案化的半导体器件的方法
公开(公告)号：US07851125B2
公开(公告)日：2010-12-14
申请号：US11186913
申请日：2005-07-21
申请人： Jung-Hwan Hah , Jin Hong , Hyun-Woo Kim , Hata Mitsuhiro , Kolake Mayya Subramanya , Sang-Gyun Woo
发明人： Jung-Hwan Hah , Jin Hong , Hyun-Woo Kim , Hata Mitsuhiro , Kolake Mayya Subramanya , Sang-Gyun Woo
IPC分类号： G03F7/40 , G03F7/36 , G03F7/20 , G03F7/30 , G03F7/039
CPC分类号： G03F7/40 , B82Y30/00 , G03F7/0752 , G03F7/165 , H01L21/0274
摘要： Provided are a mask pattern including a silicon-containing self-assembled molecular layer, a method of forming the same, and a method of fabricating a semiconductor device. The mask pattern includes a resist pattern formed on a semiconductor substrate and the self-assembled molecular layer formed on the resist pattern. The self-assembled molecular layer has a silica network formed by a sol-gel reaction. To form the mask pattern, first, the resist pattern is formed with openings on an underlayer covering the substrate to expose the underlayer to a first width. Then, the self-assembled molecular layer is selectively formed only on a surface of the resist pattern to expose the underlayer to a second width smaller than the first width. The underlayer is etched by using the resist pattern and the self-assembled molecular layer as an etching mask to obtain a fine pattern.
摘要翻译：提供了包括含硅自组装分子层的掩模图案，其形成方法和制造半导体器件的方法。掩模图案包括形成在半导体衬底上的抗蚀剂图案和形成在抗蚀剂图案上的自组装分子层。自组装分子层具有通过溶胶 - 凝胶反应形成的二氧化硅网络。为了形成掩模图案，首先，在覆盖基板的下层上形成抗蚀剂图案，使底层暴露于第一宽度。然后，仅在抗蚀剂图案的表面上选择性地形成自组装分子层，以使底层暴露于小于第一宽度的第二宽度。通过使用抗蚀剂图案和自组装分子层作为蚀刻掩模来蚀刻底层以获得精细图案。

6. 发明申请

US20060046205A1 Mask pattern for semiconductor device fabrication, method of forming the same, and method of fabricating finely patterned semiconductor device 失效
标题翻译：用于半导体器件制造的掩模图案，其形成方法以及制造精细图案化的半导体器件的方法
公开(公告)号：US20060046205A1
公开(公告)日：2006-03-02
申请号：US11186913
申请日：2005-07-21
申请人： Jung-Hwan Hah , Jin Hong , Hyun-Woo Kim , Hata Mitsuhiro , Kolake Subramanya , Sang-Gyun Woo
发明人： Jung-Hwan Hah , Jin Hong , Hyun-Woo Kim , Hata Mitsuhiro , Kolake Subramanya , Sang-Gyun Woo
IPC分类号： G03F7/00
CPC分类号： G03F7/40 , B82Y30/00 , G03F7/0752 , G03F7/165 , H01L21/0274
摘要： Provided are a mask pattern including a silicon-containing self-assembled molecular layer, a method of forming the same, and a method of fabricating a semiconductor device. The mask pattern includes a resist pattern formed on a semiconductor substrate and the self-assembled molecular layer formed on the resist pattern. The self-assembled molecular layer has a silica network formed by a sol-gel reaction. To form the mask pattern, first, the resist pattern is formed with openings on an underlayer covering the substrate to expose the underlayer to a first width. Then, the self-assembled molecular layer is selectively formed only on a surface of the resist pattern to expose the underlayer to a second width smaller than the first width. The underlayer is etched by using the resist pattern and the self-assembled molecular layer as an etching mask to obtain a fine pattern.
摘要翻译：提供了包括含硅自组装分子层的掩模图案，其形成方法和制造半导体器件的方法。掩模图案包括形成在半导体衬底上的抗蚀剂图案和形成在抗蚀剂图案上的自组装分子层。自组装分子层具有通过溶胶 - 凝胶反应形成的二氧化硅网络。为了形成掩模图案，首先，在覆盖基板的下层上形成抗蚀剂图案，使底层暴露于第一宽度。然后，仅在抗蚀剂图案的表面上选择性地形成自组装分子层，以使底层暴露于小于第一宽度的第二宽度。通过使用抗蚀剂图案和自组装分子层作为蚀刻掩模来蚀刻底层以获得精细图案。

7. 发明授权

US08241837B2 Mask pattern for semiconductor device fabrication, method of forming the same, and method of fabricating finely patterned semiconductor device 失效
标题翻译：用于半导体器件制造的掩模图案，其形成方法以及制造精细图案化的半导体器件的方法
公开(公告)号：US08241837B2
公开(公告)日：2012-08-14
申请号：US12946964
申请日：2010-11-16
申请人： Jung-Hwan Hah , Jin Hong , Hyun-Woo Kim , Hata Mitsuhiro , Kolake Mayya Subramanya , Sang-Gyun Woo
发明人： Jung-Hwan Hah , Jin Hong , Hyun-Woo Kim , Hata Mitsuhiro , Kolake Mayya Subramanya , Sang-Gyun Woo
IPC分类号： G03F7/20 , G03F7/30 , G03F7/36 , G03F7/40
CPC分类号： G03F7/40 , B82Y30/00 , G03F7/0752 , G03F7/165 , H01L21/0274
摘要： Provided are a mask pattern including a silicon-containing self-assembled molecular layer, a method of forming the same, and a method of fabricating a semiconductor device. The mask pattern includes a resist pattern formed on a semiconductor substrate and the self-assembled molecular layer formed on the resist pattern. The self-assembled molecular layer has a silica network formed by a sol-gel reaction. To form the mask pattern, first, the resist pattern is formed with openings on an underlayer covering the substrate to expose the underlayer to a first width. Then, the self-assembled molecular layer is selectively formed only on a surface of the resist pattern to expose the underlayer to a second width smaller than the first width. The underlayer is etched by using the resist pattern and the self-assembled molecular layer as an etching mask to obtain a fine pattern.
摘要翻译：提供了包括含硅自组装分子层的掩模图案，其形成方法和制造半导体器件的方法。掩模图案包括形成在半导体衬底上的抗蚀剂图案和形成在抗蚀剂图案上的自组装分子层。自组装分子层具有通过溶胶 - 凝胶反应形成的二氧化硅网络。为了形成掩模图案，首先，在覆盖基板的下层上形成抗蚀剂图案，使底层暴露于第一宽度。然后，仅在抗蚀剂图案的表面上选择性地形成自组装分子层，以使底层暴露于小于第一宽度的第二宽度。通过使用抗蚀剂图案和自组装分子层作为蚀刻掩模来蚀刻底层以获得精细图案。

8. 发明申请

US20210006044A1 INTEGRATED SEMICONDUCTOR OPTICAL AMPLIFIERS FOR SILICON PHOTONICS 有权
公开(公告)号：US20210006044A1
公开(公告)日：2021-01-07
申请号：US17024342
申请日：2020-09-17
申请人： Jin Hong , Ranjeet Kumar , Meer Nazmus Sakib , Haisheng Rong , Kimchau Nguyen , Mengyuan Huang , Aliasghar Eftekhar , Christian Malouin , Siamak Amiralizadeh Asl , Saeed Fathololoumi , Ling Liao , Yuliya Akulova , Olufemi Dosunmu , Ansheng Liu
发明人： Jin Hong , Ranjeet Kumar , Meer Nazmus Sakib , Haisheng Rong , Kimchau Nguyen , Mengyuan Huang , Aliasghar Eftekhar , Christian Malouin , Siamak Amiralizadeh Asl , Saeed Fathololoumi , Ling Liao , Yuliya Akulova , Olufemi Dosunmu , Ansheng Liu
IPC分类号： H01S5/50 , G02B27/28 , H01S5/026 , H01S5/30
摘要： Embodiments of the present disclosure are directed to a silicon photonics integrated apparatus that includes an input to receive an optical signal, a splitter optically coupled to the input to split the optical signal at a first path and a second path, a polarization beam splitter and rotator (PBSR) optically coupled with the first path or the second path, and a semiconductor optical amplifier (SOA) optically coupled with the first path or the second path and disposed between the splitter and the PBSR. Other embodiments may be described and/or claimed.

9. 发明申请

US20100132779A1 SOLAR CELL AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：太阳能电池及其制造方法
公开(公告)号：US20100132779A1
公开(公告)日：2010-06-03
申请号：US12597496
申请日：2008-05-29
申请人： Jin Hong , Jae-Ho Kim , Yong-Woo Shin
发明人： Jin Hong , Jae-Ho Kim , Yong-Woo Shin
IPC分类号： H01L31/0352 , H01L31/0232 , H01L31/18
CPC分类号： H01L31/035281 , H01L31/03529 , H01L31/0392 , H01L31/056 , H01L31/075 , Y02E10/52 , Y02E10/548
摘要： A solar cell includes a first electrode on a substrate; a plurality of pillars on the first electrode; a semiconductor layer on the first electrode, wherein a surface area of the semiconductor layer is greater than a surface area of the first electrode; and a second electrode over the semiconductor layer.
摘要翻译：太阳能电池包括在基板上的第一电极; 第一电极上的多个柱; 所述第一电极上的半导体层，其中所述半导体层的表面积大于所述第一电极的表面积; 和半导体层上的第二电极。

10. 发明申请

US20100099851A1 SYNTHETIC HYPERGLYCOSYLATED, PROTEASE-RESISTANT POLYPEPTIDE VARIANTS, ORAL FORMULATIONS AND METHODS OF USING THE SAME 审中-公开
公开(公告)号：US20100099851A1
公开(公告)日：2010-04-22
申请号：US12581723
申请日：2009-10-19
申请人： Jin Hong , Scott D. Seiwert , Lawrence M. Blatt
发明人： Jin Hong , Scott D. Seiwert , Lawrence M. Blatt
IPC分类号： C07K14/555
CPC分类号： A61K38/212
摘要： The present invention provides synthetic Type I interferon receptor polypeptide agonists comprising consensus or hybrid Type I interferon receptor polypeptide agonists, containing one or more native or non-native glycosylation sites. The present invention further provides oral formulations of protease-resistant or protease-resistant, hyperglycosylated polypeptide variants, which polypeptide variants lack at least one protease cleavage site found in a parent polypeptide, and thus exhibit increased protease resistance compared to the parent polypeptide, which polypeptide variants further include (1) a carbohydrate moiety covalently linked to at least one non-native glycosylation site not found in the parent protein therapeutic or (2) a carbohydrate moiety covalently linked to at least one native glycosylation site found but not glycosylated in the parent protein therapeutic. The present invention further provides compositions, including oral pharmaceutical compositions, comprising the synthetic Type I interferon receptor polypeptide agonist, the hyperglycosylated polypeptide variant, the protease-resistant polypeptide variant, or the hyperglycosylated, protease-resistant polypeptide variant. The present invention further provides containers, devices, and kits comprising the synthetic Type I interferon receptor polypeptide agonist, the hyperglycosylated polypeptide variant, the protease-resistant polypeptide variant, or the hyperglycosylated, protease-resistant polypeptide variant. The present invention further provides therapeutic methods involving administering an effective amount of an oral pharmaceutical composition comprising a synthetic Type I interferon receptor polypeptide agonist, a hyperglycosylated polypeptide variant, a protease-resistant polypeptide variant, or a hyperglycosylated, protease-resistant polypeptide variant to an individual in need thereof.

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