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    • 4. 发明授权
    • Pad and circuit layout for semiconductor devices
    • 半导体器件的焊盘和电路布局
    • US08916980B2
    • 2014-12-23
    • US13398364
    • 2012-02-16
    • Tiejun DaiKuei Chen Liang
    • Tiejun DaiKuei Chen Liang
    • H01L23/48
    • H01L27/14618H01L27/14632H01L2224/13
    • An apparatus includes an image sensor with a frontside and a backside. The image sensor includes an active circuit region and bonding pads. The active circuit region has a first shape that is substantially rectangular. The substantially rectangular first shape has first chamfered corners. A perimeter of the frontside of the image sensor has a second shape that is substantially rectangular. The second substantially rectangular shape has second chamfered corners. The bonding pads are disposed on the frontside of the image sensor. The bonding pads are disposed between the first chamfered corners and the second chamfered corners. The first shape is disposed inside the second shape.
    • 一种装置包括具有前侧和后侧的图像传感器。 图像传感器包括有源电路区域和接合焊盘。 有源电路区域具有大致矩形的第一形状。 大致矩形的第一形状具有第一倒角。 图像传感器的前侧的周边具有大致矩形的第二形状。 第二基本矩形形状具有第二倒角。 接合焊盘设置在图像传感器的前侧。 接合焊盘设置在第一倒角和第二倒角之间。 第一形状设置在第二形状的内部。
    • 7. 发明申请
    • IMAGE SENSOR WITH INTEGRATED AMBIENT LIGHT DETECTION
    • 具有集成环境光检测的图像传感器
    • US20130187027A1
    • 2013-07-25
    • US13355165
    • 2012-01-20
    • Wenhao QiaoZheng YangTiejun Dai
    • Wenhao QiaoZheng YangTiejun Dai
    • H01L27/146
    • H04N5/2351H04N5/351H04N5/3741H04N5/378
    • An image sensor having an image acquisition mode and an ambient light sensing mode includes a pixel array having pixel cells organized into rows and columns for capturing image data and ambient light data. Readout circuitry is coupled via column bit lines to the pixels cells to read out the image data along the column bit lines. An ambient light detection (“ALD”) unit is selectively coupled to the pixel array to readout the ambient light data and to generate an ambient light signal based on ambient light incident upon the pixel array. Control circuitry is coupled to the pixel array to control time sharing of the pixels cells between the readout circuitry during image acquisition and the ALD unit during ambient light sensing.
    • 具有图像获取模式和环境光感测模式的图像传感器包括具有被组织成用于捕获图像数据和环境光数据的行和列的像素单元的像素阵列。 读出电路通过列位线耦合到像素单元,以沿列位线读出图像数据。 环境光检测(“ALD”)单元选择性地耦合到像素阵列以读出环境光数据,并且基于入射到像素阵列上的环境光产生环境光信号。 控制电路耦合到像素阵列,以在环境光感测期间控制图像采集期间的读出电路与ALD单元之间的像素单元的时间共享。
    • 8. 发明申请
    • Image Sensor with Two Transfer Gate Off Voltage Lines
    • 具有两个传输门关闭电压线的图像传感器
    • US20120120300A1
    • 2012-05-17
    • US12946689
    • 2010-11-15
    • Tiejun Dai
    • Tiejun Dai
    • H04N5/225H01L27/146
    • H04N5/3745H04N5/3577H04N5/359H04N5/376
    • An apparatus of one aspect includes an array of pixels. Each of the pixels includes a photosensitive element and a transfer transistor coupled with the photosensitive element. Each of the transfer transistors has a transfer gate. The apparatus also includes a first transfer gate off voltage supply conductor and a second transfer gate off voltage supply conductor. A circuit is coupled with the first and second transfer gate off voltage supply conductors. The circuit is operable to couple the first transfer gate off voltage supply conductor to transfer gates of a first subset of the pixels of the array. The circuit is also operable to concurrently couple the second transfer gate off voltage supply conductor to transfer gates of a second subset of the pixels of the array.
    • 一个方面的装置包括像素阵列。 每个像素包括光敏元件和与感光元件耦合的转移晶体管。 每个转移晶体管具有传输门。 该装置还包括第一传输栅极截止电压供应导体和第二传输栅极截止电压供应导体。 电路与第一和第二传输栅极截止电压供应导体耦合。 电路可操作以将第一传输栅极截止电压供应导体耦合到阵列的像素的第一子集的传输门。 电路还可操作以同时将第二传输栅极关断电压导体耦合到阵列的像素的第二子集的传输门。
    • 10. 发明申请
    • HYBRID ANALOG-TO-DIGITAL CONVERTER HAVING MULTIPLE ADC MODES
    • 具有多种ADC模式的混合模数转换器
    • US20140008515A1
    • 2014-01-09
    • US13543470
    • 2012-07-06
    • Rui WangLiping DengTiejun Dai
    • Rui WangLiping DengTiejun Dai
    • H03M1/38H03M1/14H01L27/146
    • H03M1/145H03M1/466H03M1/56
    • A hybrid ADC having a successive approximation register (SAR) ADC mode for generating a bit of a digital signal and a ramp ADC mode for generating an additional bit of the digital signal is disclosed. When in the SAR ADC mode, a control circuit is configured to disable a ramp signal generator; disable a counter; and enable a register to control an offset stage to set the magnitude of an offset voltage that is provided to an input of a comparator of the ADC. When in the ramp ADC mode, the control circuit is configured to enable the ramp signal generator to provide a ramp signal to the input of the comparator; enable the counter to begin providing the digital count in response to the output of the comparator; and disable the register so that the offset stage is not providing the offset voltage.
    • 公开了一种具有用于产生数字信号位的逐次逼近寄存器(SAR)ADC模式和用于产生数字信号的附加位的斜坡ADC模式的混合ADC。 当处于SAR ADC模式时,控制电路被配置为禁止斜坡信号发生器; 禁用计数器 并且使能寄存器来控制偏移级以设置提供给ADC的比较器的输入的偏移电压的幅度。 当处于斜坡ADC模式时,控制电路被配置为使得斜坡信号发生器能够向比较器的输入端提供斜坡信号; 使计数器响应于比较器的输出开始提供数字计数; 并禁用寄存器,使偏移级不提供偏移电压。