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1. 发明申请

US20120019167A1 Backlight Control Circuit and Method Thereof 有权
标题翻译：背光控制电路及其方法
公开(公告)号：US20120019167A1
公开(公告)日：2012-01-26
申请号：US13073100
申请日：2011-03-28
申请人： Jian-Kao Chen , Chih Chiang Hsu
发明人： Jian-Kao Chen , Chih Chiang Hsu
IPC分类号： H05B37/02
CPC分类号： H05B33/0842 , G09G3/3406 , G09G2320/0646 , G09G2360/16
摘要： A backlight control circuit and method thereof are provided to control the backlight of a backlight module so as to enhance the dynamic contrast ratio and save power. The backlight control circuit includes an average luminance detection circuit, a luminance distribution detection unit, a pulse width control circuit and a pulse width modulator. The average luminance detection circuit detects the average luminance of a frame which includes a plurality of pixels; the luminance distribution detection unit detects the pixel luminance distribution of the frame; the pulse width control circuit generates a pulse width control signal according to the average luminance and the pixel luminance distribution of the frame; and the pulse width modulator generates a pulse width modulation (PWM) signal according to the pulse width control signal, so as to control the backlight of the backlight module.
摘要翻译：提供背光控制电路及其方法来控制背光模块的背光，以提高动态对比度并节省功率。背光控制电路包括平均亮度检测电路，亮度分布检测单元，脉冲宽度控制电路和脉冲宽度调制器。平均亮度检测电路检测包括多个像素的帧的平均亮度; 亮度分布检测单元检测帧的像素亮度分布; 脉冲宽度控制电路根据帧的平均亮度和像素亮度分布产生脉宽控制信号; 并且脉冲宽度调制器根据脉冲宽度控制信号产生脉冲宽度调制（PWM）信号，以便控制背光模块的背光。

2. 发明授权

US08421361B2 Backlight control circuit and method thereof 有权
标题翻译：背光控制电路及其方法
公开(公告)号：US08421361B2
公开(公告)日：2013-04-16
申请号：US13073100
申请日：2011-03-28
申请人： Jian-Kao Chen , Chih Chiang Hsu
发明人： Jian-Kao Chen , Chih Chiang Hsu
IPC分类号： H05B37/03 , G09G3/36
CPC分类号： H05B33/0842 , G09G3/3406 , G09G2320/0646 , G09G2360/16
摘要： A backlight control circuit and method thereof are provided to control the backlight of a backlight module so as to enhance the dynamic contrast ratio and save power. The backlight control circuit includes an average luminance detection circuit, a luminance distribution detection unit, a pulse width control circuit and a pulse width modulator. The average luminance detection circuit detects the average luminance of a frame which includes a plurality of pixels; the luminance distribution detection unit detects the pixel luminance distribution of the frame; the pulse width control circuit generates a pulse width control signal according to the average luminance and the pixel luminance distribution of the frame; and the pulse width modulator generates a pulse width modulation (PWM) signal according to the pulse width control signal, so as to control the backlight of the backlight module.
摘要翻译：提供背光控制电路及其方法来控制背光模块的背光，以提高动态对比度并节省功率。背光控制电路包括平均亮度检测电路，亮度分布检测单元，脉冲宽度控制电路和脉冲宽度调制器。平均亮度检测电路检测包括多个像素的帧的平均亮度; 亮度分布检测单元检测帧的像素亮度分布; 脉冲宽度控制电路根据帧的平均亮度和像素亮度分布产生脉宽控制信号; 并且脉冲宽度调制器根据脉冲宽度控制信号产生脉冲宽度调制（PWM）信号，以便控制背光模块的背光。

3. 发明申请

US20120026156A1 Display Timing Control Circuit and Method Thereof 有权
标题翻译：显示定时控制电路及其方法
公开(公告)号：US20120026156A1
公开(公告)日：2012-02-02
申请号：US13093931
申请日：2011-04-26
申请人： Jian-Kao Chen , Chih Chiang Hsu
发明人： Jian-Kao Chen , Chih Chiang Hsu
IPC分类号： G09G5/00
CPC分类号： G09G5/005 , G09G5/12 , G09G2340/0407
摘要： A display timing control circuit is capable of rapidly adjusting display timing to achieve frame synchronization. The display timing control circuit includes an output pixel clock generator, a display timing generator, and a clock adjusting unit. The output pixel clock generator generates an output pixel clock signal according to a reference clock signal and a clock divisor. The display timing generator generates a display timing signal and an output vertical reference signal having an output frame rate according to the output pixel clock signal. The clock adjusting unit adjusts the clock divisor according to the output pixel clock signal, the output vertical reference signal, and an input vertical reference signal having an input frame rate.
摘要翻译：显示定时控制电路能够快速调整显示定时以实现帧同步。显示定时控制电路包括输出像素时钟发生器，显示定时发生器和时钟调整单元。输出像素时钟发生器根据参考时钟信号和时钟除数器产生输出像素时钟信号。显示定时发生器产生具有根据输出像素时钟信号的输出帧速率的显示定时信号和输出垂直参考信号。时钟调整单元根据输出像素时钟信号，输出垂直参考信号和具有输入帧速率的输入垂直参考信号调整时钟除数。

4. 发明授权

US09147375B2 Display timing control circuit with adjustable clock divisor and method thereof 有权
标题翻译：显示具有可调节时钟除数的定时控制电路及其方法
公开(公告)号：US09147375B2
公开(公告)日：2015-09-29
申请号：US13093931
申请日：2011-04-26
申请人： Jian-Kao Chen , Chih Chiang Hsu
发明人： Jian-Kao Chen , Chih Chiang Hsu
IPC分类号： G09G5/00 , G09G5/12
CPC分类号： G09G5/005 , G09G5/12 , G09G2340/0407
摘要： A display timing control circuit is capable of rapidly adjusting display timing to achieve frame synchronization. The display timing control circuit includes an output pixel clock generator, a display timing generator, and a clock adjusting unit. The output pixel clock generator generates an output pixel clock signal according to a reference clock signal and a clock divisor. The display timing generator generates a display timing signal and an output vertical reference signal having an output frame rate according to the output pixel clock signal. The clock adjusting unit adjusts the clock divisor according to the output pixel clock signal, the output vertical reference signal, and an input vertical reference signal having an input frame rate.
摘要翻译：显示定时控制电路能够快速调整显示定时以实现帧同步。显示定时控制电路包括输出像素时钟发生器，显示定时发生器和时钟调整单元。输出像素时钟发生器根据参考时钟信号和时钟除数器产生输出像素时钟信号。显示定时发生器产生具有根据输出像素时钟信号的输出帧速率的显示定时信号和输出垂直参考信号。时钟调整单元根据输出像素时钟信号，输出垂直参考信号和具有输入帧速率的输入垂直参考信号调整时钟除数。

5. 发明授权

US07755883B2 Connection structure and data processing apparatus therewith 有权
标题翻译：连接结构和数据处理设备
公开(公告)号：US07755883B2
公开(公告)日：2010-07-13
申请号：US11907211
申请日：2007-10-10
申请人： Chih Chiang Hsu , Chia Cheng Tang , Chien Jung Su
发明人： Chih Chiang Hsu , Chia Cheng Tang , Chien Jung Su
IPC分类号： G06F1/16
CPC分类号： F16B37/043 , G06F1/1616 , G06F1/1662
摘要： The invention provides a connection structure installed in a data processing apparatus. The data processing apparatus includes a keyboard and a base. The keyboard includes a bottom. The base includes a top plate. The connection structure connects the bottom and the top plate. The connection structure includes a mounted boss and a mounting hole. The mounted boss is disposed on the bottom of the keyboard. The mounted boss includes a groove. The mounting hole is disposed on the top plate of the base. The mounting hole includes a protrusion. When the bottom of the keyboard is assembled to the top of the base, the mounted boss would fit into the mounting hole, such that the protrusion is locked with the groove.
摘要翻译：本发明提供一种安装在数据处理装置中的连接结构。数据处理装置包括键盘和基座。键盘包括一个底部。底座包括顶板。连接结构连接底板和顶板。连接结构包括安装的凸台和安装孔。安装的凸台设置在键盘的底部。安装的凸台包括凹槽。安装孔设置在基座的顶板上。安装孔包括突起。当键盘的底部组装到基座的顶部时，安装的凸台将装配到安装孔中，使得突起与凹槽锁定。

6. 发明申请

US20080124189A1 Connection structure and data processing apparatus therewith 有权
标题翻译：连接结构和数据处理设备
公开(公告)号：US20080124189A1
公开(公告)日：2008-05-29
申请号：US11907211
申请日：2007-10-10
申请人： Chih Chiang Hsu , Chia Cheng Tang , Chien Jung Su
发明人： Chih Chiang Hsu , Chia Cheng Tang , Chien Jung Su
IPC分类号： F16B35/00 , F16B13/02
CPC分类号： F16B37/043 , G06F1/1616 , G06F1/1662
摘要： The invention provides a connection structure installed in a data processing apparatus. The data processing apparatus includes a keyboard and a base. The keyboard includes a bottom. The base includes a top plate. The connection structure connects the bottom and the top plate. The connection structure includes a mounted boss and a mounting hole. The mounted boss is disposed on the bottom of the keyboard. The mounted boss includes a groove. The mounting hole is disposed on the top plate of the base. The mounting hole includes a protrusion. When the bottom of the keyboard is assembled to the top of the base, the mounted boss would fit into the mounting hole, such that the protrusion is locked with the groove.
摘要翻译：本发明提供一种安装在数据处理装置中的连接结构。数据处理装置包括键盘和基座。键盘包括一个底部。底座包括顶板。连接结构连接底板和顶板。连接结构包括安装的凸台和安装孔。安装的凸台设置在键盘的底部。安装的凸台包括凹槽。安装孔设置在基座的顶板上。安装孔包括突起。当键盘的底部组装到基座的顶部时，安装的凸台将装配到安装孔中，使得突起与凹槽锁定。

7. 发明授权

US08295407B2 Decoding method and apparatus for infrared remote control commands 有权
标题翻译：用于红外遥控命令的解码方法和装置
公开(公告)号：US08295407B2
公开(公告)日：2012-10-23
申请号：US12541466
申请日：2009-08-14
申请人： Chih Chiang Hsu , Yu-Ming Lin
发明人： Chih Chiang Hsu , Yu-Ming Lin
IPC分类号： H04L27/06
CPC分类号： G08C23/04
摘要： A decoding method and apparatus capable of automatically adjusting a sampling period is provided. The decoding apparatus decodes a serial code including at least one header pulse and a plurality of data pulses. The decoding apparatus includes a detecting unit for detecting the header pulse to generate an initialization signal, a determining unit for determining a sampling period according to the initialization signal and a pulse width of one of the data pulses, and a decoding unit for decoding the data pulses according to the sampling period.
摘要翻译：提供能够自动调整采样周期的解码方法和装置。解码装置对包括至少一个头脉冲和多个数据脉冲的串行码进行解码。解码装置包括：检测单元，用于检测报头脉冲以产生初始化信号;确定单元，用于根据初始化信号和数据脉冲之一的脉冲宽度确定采样周期;以及解码单元，用于解码数据脉冲根据采样周期。

8. 发明申请

US20100141472A1 Decoding Method and Apparatus for Infrared Remote Control Commands 有权
标题翻译：红外遥控命令的解码方法和装置
公开(公告)号：US20100141472A1
公开(公告)日：2010-06-10
申请号：US12541466
申请日：2009-08-14
申请人： Chih Chiang Hsu , Yu-Ming Lin
发明人： Chih Chiang Hsu , Yu-Ming Lin
IPC分类号： G08C19/16
CPC分类号： G08C23/04
摘要： A decoding method and apparatus capable of automatically adjusting a sampling period is provided. The decoding apparatus decodes a serial code including at least one header pulse and a plurality of data pulses. The decoding apparatus includes a detecting unit for detecting the header pulse to generate an initialization signal, a determining unit for determining a sampling period according to the initialization signal and a pulse width of one of the data pulses, and a decoding unit for decoding the data pulses according to the sampling period.
摘要翻译：提供能够自动调整采样周期的解码方法和装置。解码装置对包括至少一个头脉冲和多个数据脉冲的串行码进行解码。解码装置包括：检测单元，用于检测报头脉冲以产生初始化信号;确定单元，用于根据初始化信号和数据脉冲之一的脉冲宽度确定采样周期;以及解码单元，用于解码数据脉冲根据采样周期。

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