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    • 2. 发明授权
    • Optimized division of work among processors in a heterogeneous processing system
    • 在异构处理系统中优化处理器之间的分工
    • US08997071B2
    • 2015-03-31
    • US13608043
    • 2012-09-10
    • Tong ChenJohn K. P. O'BrienZehra N. Sura
    • Tong ChenJohn K. P. O'BrienZehra N. Sura
    • G06F9/45
    • G06F8/451
    • A compiler implemented by a computer performs optimized division of work across heterogeneous processors. The compiler divides source code into code sections and characterizes each of the code sections based on pre-defined criteria. Each of the code sections is characterized as at least one of: allocate to a main processor, allocate to a processing element, allocate to one of a parameterized main processor and a parameterized processing element, and indeterminate. The compiler analyzes side-effects and costs of executing the code sections on allocated processors, and transforms the code sections based on results of the analyzing. The transforming includes re-characterizing the code sections for alternate execution in a runtime environment.
    • 由计算机实现的编译器在异构处理器之间执行优化的分工。 编译器将源代码分为代码段,并根据预定义的标准来表征每个代码段。 每个代码段被表征为以下至少一个:分配给主处理器,分配给处理元件,分配给参数化主处理器和参数化处理元件中的一个,并且不确定。 编译器分析在分配的处理器上执行代码段的副作用和成本,并根据分析结果转换代码段。 转换包括重新表征代码段,以便在运行时环境中进行备用执行。
    • 6. 发明授权
    • Prefetching irregular data references for software controlled caches
    • 预取软件控制缓存的不规则数据引用
    • US08762968B2
    • 2014-06-24
    • US13534794
    • 2012-06-27
    • Tong ChenMarc Gonzalez talladaZehra N. SuraTao Zhang
    • Tong ChenMarc Gonzalez talladaZehra N. SuraTao Zhang
    • G06F9/44
    • G06F8/4442
    • Prefetching irregular memory references into a software controlled cache is provided. A compiler analyzes source code to identify at least one of a plurality of loops that contain an irregular memory reference. The compiler determines if the irregular memory reference within the at least one loop is a candidate for optimization. Responsive to an indication that the irregular memory reference may be optimized, the compiler determines if the irregular memory reference is valid for prefetching. Responsive to an indication that the irregular memory reference is valid for prefetching, a store statement for an address of the irregular memory reference is inserted into the at least one loop. A runtime library call is inserted into a prefetch runtime library for the irregular memory reference. Data associated with the irregular memory reference is prefetched into the software controlled cache when the runtime library call is invoked.
    • 提供了将不规则内存引用预取到软件控制的缓存中。 编译器分析源代码以识别包含不规则存储器引用的多个循环中的至少一个循环。 编译器确定至少一个循环内的不规则存储器引用是否是优化的候选者。 响应于可以优化不规则存储器引用的指示,编译器确定不规则存储器引用是否对预取有效。 响应于不规则存储器引用对于预取有效的指示,将不规则存储器引用的地址的存储语句插入到至少一个循环中。 运行时库调用插入到不规则内存引用的预取运行时库中。 当调用运行时库调用时,与不规则内存引用相关联的数据将被预取到软件控制的缓存中。
    • 8. 发明申请
    • OPTIMIZED DIVISION OF WORK AMONG PROCESSORS IN A HETEROGENEOUS PROCESSING SYSTEM
    • 异构加工系统中处理器的优化工作部分
    • US20140068581A1
    • 2014-03-06
    • US13598780
    • 2012-08-30
    • Tong ChenJohn K.P. O'BrienZehra N. Sura
    • Tong ChenJohn K.P. O'BrienZehra N. Sura
    • G06F9/45
    • G06F8/451
    • A compiler implemented by a computer performs optimized division of work across heterogeneous processors. The compiler divides source code into code sections and characterizes each of the code sections based on pre-defined criteria. Each of the code sections is characterized as at least one of: allocate to a main processor, allocate to a processing element, allocate to one of a parameterized main processor and a parameterized processing element, and indeterminate. The compiler analyzes side-effects and costs of executing the code sections on allocated processors, and transforms the code sections based on results of the analyzing. The transforming includes re-characterizing the code sections for alternate execution in a runtime environment.
    • 由计算机实现的编译器在异构处理器之间执行优化的分工。 编译器将源代码分为代码段,并根据预定义的标准来表征每个代码段。 每个代码段被表征为以下至少一个:分配给主处理器,分配给处理元件,分配给参数化主处理器和参数化处理元件中的一个,并且不确定。 编译器分析在分配的处理器上执行代码段的副作用和成本,并根据分析结果转换代码段。 转换包括重新表征代码段,以便在运行时环境中进行备用执行。