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1. 发明申请

US20050018761A1 Transmitters providing cycle encoded signals 有权
标题翻译：发射机提供循环编码信号
公开(公告)号：US20050018761A1
公开(公告)日：2005-01-27
申请号：US10625945
申请日：2003-07-23
申请人： Jerry Jex , Jed Griffin , Arnaud Forestier , Kersi Vakil , Abhimanyu Kolla
发明人： Jerry Jex , Jed Griffin , Arnaud Forestier , Kersi Vakil , Abhimanyu Kolla
IPC分类号： H04L27/24 , H04B1/38
CPC分类号： H04L25/4904 , H04L25/0272 , H04L27/24
摘要： In some embodiments, the inventions includes a transmitter including a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the encoding signals have a different frequency than others of the encoding signals and some of the encoding signals have a different phase than others of the encoding signals. Data is represented in data time segments of the full cycle encoded signal and no data time segment has more than one cycle of an encoding signal. In some embodiments, a receiver receives the cycle encoded signal and recovers data of the data input signal. Still other embodiments are described and claimed.
摘要翻译：在一些实施例中，本发明包括发射机，其包括用于接收数据输入信号的周期编码电路，并通过连续地连接不同编码信号的部分来响应于此提供全周期编码信号。编码信号中的一些具有与编码信号的其他编码信号不同的频率，并且一些编码信号与编码信号的其它信号具有不同的相位。数据在全周期编码信号的数据时间段中表示，并且没有数据时间段具有多于一个编码信号的周期。在一些实施例中，接收器接收周期编码信号并恢复数据输入信号的数据。还描述和要求保护其他实施例。

2. 发明申请

US20080101505A1 RECEIVERS FOR CYCLE ENCODED SIGNALS 有权
标题翻译：循环编码信号的接收器
公开(公告)号：US20080101505A1
公开(公告)日：2008-05-01
申请号：US11925474
申请日：2007-10-26
申请人： Jed Griffin , Jerry Jex , Arnaud Forestier , Kersi Vakil , Abhimanyu Kolla
发明人： Jed Griffin , Jerry Jex , Arnaud Forestier , Kersi Vakil , Abhimanyu Kolla
IPC分类号： H04L7/00 , H04L27/06
CPC分类号： H04L27/24 , H04L1/06 , H04L25/4904
摘要： In some embodiments, the inventions includes a transmitter including a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the encoding signals have a different frequency than others of the encoding signals and some of the encoding signals have a different phase than others of the encoding signals. Data is represented in data time segments of the full cycle encoded signal and no data time segment has more than one cycle of an encoding signal. In some embodiments, a receiver receives the cycle encoded signal and recovers data of the data input signal.
摘要翻译：在一些实施例中，本发明包括发射机，其包括用于接收数据输入信号的周期编码电路，并通过连续地连接不同编码信号的部分来响应于此提供全周期编码信号。编码信号中的一些具有与编码信号的其他编码信号不同的频率，并且一些编码信号与编码信号的其它信号具有不同的相位。数据在全周期编码信号的数据时间段中表示，并且没有数据时间段具有多于一个编码信号的周期。在一些实施例中，接收器接收周期编码信号并恢复数据输入信号的数据。

3. 发明申请

US20050018779A1 Receivers for cycle encoded signals 有权
标题翻译：接收器用于循环编码信号
公开(公告)号：US20050018779A1
公开(公告)日：2005-01-27
申请号：US10625944
申请日：2003-07-23
申请人： Jed Griffin , Jerry Jex , Arnaud Forestier , Kersi Vakil , Abhimanyu Kolla
发明人： Jed Griffin , Jerry Jex , Arnaud Forestier , Kersi Vakil , Abhimanyu Kolla
IPC分类号： H04L1/06 , H04L25/49 , H04L27/24 , H04L27/00
CPC分类号： H04L27/24 , H04L1/06 , H04L25/4904
摘要： In some embodiments, the inventions include a receiver to receive a full cycle encoded signal in which data is represented in data time segments and no data time segment has more than one cycle. The receiver provides a data output signal responsive to the full cycle encoding signal. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，本发明包括接收器，用于接收全周期编码信号，其中在数据时间段中表示数据，并且没有数据时间段具有多于一个周期。接收机响应于全周期编码信号提供数据输出信号。描述和要求保护其他实施例。

4. 发明申请

US20110116527A1 SELF-CALIBRATING, WIDE-RANGE TEMPERATURE SENSOR 有权
标题翻译：自校准，宽范围温度传感器
公开(公告)号：US20110116527A1
公开(公告)日：2011-05-19
申请号：US12620392
申请日：2009-11-17
申请人： Jed Griffin , Daniel J. Russell
发明人： Jed Griffin , Daniel J. Russell
IPC分类号： G01K15/00
CPC分类号： G01K7/01 , G01K15/005
摘要： A self-calibrating, wide-range temperature sensor includes a current reference, impervious to process and voltage, with the current reference mirrored into two oppositely-sized bipolar transistors or diodes. Duplicate current sources are used with a ratio of geometries between them, such that the larger current biases the smaller bipolar transistor (less cross-sectional area) and the smaller current source biases the larger bipolar transistor (higher cross-sectional area). The current source in conjunction with the differential temperature sensing provides inherent calibration without drift while the differential sensing, from the ratio of geometries in the current paths also increases sensitivity.
摘要翻译：自校准的宽范围温度传感器包括电流参考，不受过程和电压影响，电流参考反映到两个相对大小的双极晶体管或二极管中。使用重复的电流源，它们之间的几何形状的比例，使得较大的电流偏置较小的双极晶体管（较小的横截面积），较小的电流源偏置较大的双极晶体管（较高的横截面积）。结合差分温度感测的电流源提供固有的校准，无漂移，而差分感测，从电流路径中的几何比也增加灵敏度。

5. 发明授权

US07629847B1 Opposing currents differential amplifier 有权
标题翻译：对流电流差动放大器
公开(公告)号：US07629847B1
公开(公告)日：2009-12-08
申请号：US12054187
申请日：2008-03-24
申请人： Jed Griffin
发明人： Jed Griffin
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/45179 , H03F2200/456 , H03F2203/45394 , H03F2203/45481 , H03F2203/45644 , H03F2203/45646 , H03F2203/45674
摘要： An opposing currents (OC) differential amplifier is disclosed that eliminates headroom constraints and other problems associated with conventional differential pair amplifiers with current source biasing. The OC differential amplifier has a higher differential gain and differential gain bandwidth than conventional differential pair amplifiers.
摘要翻译：公开了一种相反电流（OC）差分放大器，其消除了与具有电流源偏置的常规差分对放大器相关联的余量限制和其它问题。 OC差分放大器具有比传统差分对放大器更高的差分增益和差分增益带宽。

6. 发明授权

US07990224B2 Dual reference phase tracking phase-locked loop 有权
标题翻译：双参考相位跟踪锁相环
公开(公告)号：US07990224B2
公开(公告)日：2011-08-02
申请号：US11741100
申请日：2007-04-27
申请人： Jed Griffin
发明人： Jed Griffin
IPC分类号： H03L7/00
CPC分类号： H03L7/091
摘要： A phase-locked loop circuit having a dual-reference input and a phase detector. The dual-reference input is configured to accept both a rising edge of an input clock having a first phase and a falling edge of the input clock having a second phase. The phase detector is coupled to the dual-reference input and is configured to produce a center phase signal based upon and centered in phase between the first and second phases. The phase detector is further configured with a feedback loop to adjust any tracking error and provide a tracking output signal. The phase detector system maintains both a high tracking bandwidth and a bounded jitter amplification based as a result of the dual reference signal. The high tracking bandwidth and the bounded jitter amplification are independent of an applied loop gain.
摘要翻译：具有双参考输入和相位检测器的锁相环电路。双参考输入被配置为接受具有第二相位的输入时钟的第一相位和下降沿的输入时钟的上升沿。相位检测器耦合到双参考输入，并且被配置为基于第一和第二相之间的相位和中心相位产生中心相位信号。相位检测器进一步配置有反馈回路以调整任何跟踪误差并提供跟踪输出信号。相位检测器系统基于双参考信号来维持高跟踪带宽和有界抖动放大。高跟踪带宽和有界抖动放大与应用的环路增益无关。

7. 发明授权

US06400176B1 Constant CMOS driver 失效
标题翻译：恒定CMOS驱动
公开(公告)号：US06400176B1
公开(公告)日：2002-06-04
申请号：US09476425
申请日：1999-12-30
申请人： Jed Griffin , Ernest Khaw
发明人： Jed Griffin , Ernest Khaw
IPC分类号： H03K1716
CPC分类号： H03K19/00361
摘要： According to one aspect of the invention, a circuit is provided that includes a drive stage having an input and output node, and at least one transistor coupled between the two nodes. An upper impedance element coupled at one end to the output node and at another end to an upper supply node is provided. The upper impedance element has a stack of transistors each having a beta matched to a beta of at least one transistor in the drive stage. A lower impedance element coupled at one end to the output node and at another end to a lower supply node is provided. The lower impedance element has a stack of transistors each having a beta matched to the beta of at least one transistor in the drive stage. In another embodiment, a circuit is provided that includes a plurality of transistors coupled in parallel between a supply node and a pre-drive stage. The plurality of transistors each have a gate coupled to a delay select line to control current through the pre-drive stage.
摘要翻译：根据本发明的一个方面，提供一种电路，其包括具有输入和输出节点的驱动级和耦合在两个节点之间的至少一个晶体管。提供了在一端耦合到输出节点并且在另一端耦合到上供电节点的上阻抗元件。上阻抗元件具有每个具有与驱动级中的至少一个晶体管的β匹配的β晶体管的堆叠。提供了在一端耦合到输出节点并在另一端耦合到较低电源节点的较低阻抗元件。较低阻抗元件具有每个晶体管的堆叠，其具有与驱动级中的至少一个晶体管的β匹配的β。在另一个实施例中，提供一种电路，其包括并联在供电节点和预驱动级之间的多个晶体管。多个晶体管各自具有耦合到延迟选择线的栅极，以控制通过预驱动级的电流。

8. 发明申请

US20100271143A1 Current-Controlled Hysteretic Oscillator 有权
标题翻译：电流控制迟滞振荡器
公开(公告)号：US20100271143A1
公开(公告)日：2010-10-28
申请号：US12430760
申请日：2009-04-27
申请人： Jed Griffin , Miguel Gamarra
发明人： Jed Griffin , Miguel Gamarra
IPC分类号： H03B5/12
CPC分类号： H03B5/1228 , H03B2200/0038
摘要： The disclosed current-controlled hysteretic oscillator operates by controlled currents opposing each other in differential pairs to set a controlled hysteresis for improved relaxation oscillations with immunity to phase or frequency error.
摘要翻译：所公开的电流控制迟滞振荡器通过在差分对中彼此相对的受控电流来操作，以设置受控的滞后，以改善对相位或频率误差的抗扰度的松弛振荡。

9. 发明申请

US20060203883A1 Temperature sensing 审中-公开
标题翻译：温度传感
公开(公告)号：US20060203883A1
公开(公告)日：2006-09-14
申请号：US11075491
申请日：2005-03-08
申请人： Jed Griffin
发明人： Jed Griffin
IPC分类号： G01K7/00 , G01K1/00
CPC分类号： G01K7/01
摘要： Temperature sensing circuits are provided herein. In some embodiments, they comprise first and second transistors coupled together in a current mirror configuration and first and second diodes. The first diode is coupled to the first transistor, and the second diode is coupled to the second transistor. A temperature sensing signal is generated between the first and second diodes when the circuit is being operated. Other embodiments are disclosed and/or claimed herein.
摘要翻译：本文提供温度感测电路。在一些实施例中，它们包括以电流镜配置和第一和第二二极管耦合在一起的第一和第二晶体管。第一二极管耦合到第一晶体管，第二二极管耦合到第二晶体管。当电路运行时，在第一和第二二极管之间产生温度感测信号。在此公开和/或要求保护的其它实施例。

10. 发明授权

US06621313B2 High frequency system with duty cycle buffer 有权
公开(公告)号：US06621313B2
公开(公告)日：2003-09-16
申请号：US10277968
申请日：2002-10-23
申请人： Nasser A. Kurd , Jed Griffin
发明人： Nasser A. Kurd , Jed Griffin
IPC分类号： H03B100
CPC分类号： H03L7/18 , G06F1/10 , H03L7/0891 , H03L7/099
摘要： A synchronizing apparatus is provided in a high frequency system. The synchronizing apparatus includes a loop control circuit, a voltage controlled oscillator coupled to the loop control circuit, a matched current amplifier coupled to the voltage controlled oscillator, and a duty cycle control buffer connect to the matched circuit amplifier.

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