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1. 发明授权

US09158727B2 Addressable integrated circuit and method thereof 有权
标题翻译：可寻址集成电路及其方法
公开(公告)号：US09158727B2
公开(公告)日：2015-10-13
申请号：US12771302
申请日：2010-04-30
申请人： Jeremy Gorbold , James Gibbons , Tadhg Creedon , Katherine O'Riordan , John Reidy , John Morrissey
发明人： Jeremy Gorbold , James Gibbons , Tadhg Creedon , Katherine O'Riordan , John Reidy , John Morrissey
IPC分类号： G01R19/175 , G01R19/14 , G06F3/00 , G06F3/01 , G06F13/42 , G06F12/06 , G01R31/36
CPC分类号： G06F13/4247 , G01R31/3658 , G06F12/0661
摘要： An exemplary method and system of addressing an integrated circuit within a daisy chain network. In the exemplary method, the address of the integrated circuit may be initialized to a predetermined initial address. The integrated circuit may receive a command that includes a type identifier and an address field. Based on the type identifier, the type of command may be determined. As a result of the determination, reading the address from the address field. The read address may be stored in a register. The address may be modified, and may be output. Upon receipt of the data or a command, the integrity of the data including data within the received command, may be confirmed by an error checking algorithm.
摘要翻译：在菊花链网络中寻址集成电路的示例性方法和系统。在示例性方法中，可以将集成电路的地址初始化为预定的初始地址。集成电路可以接收包括类型标识符和地址字段的命令。基于类型标识符，可以确定命令的类型。作为决定的结果，从地址字段读取地址。读取地址可以存储在寄存器中。该地址可以被修改，并且可以被输出。在接收到数据或命令时，可以通过错误检查算法来确认包括接收到的命令中的数据的数据的完整性。

2. 发明授权

US07223280B2 Surgical implants and delivery systems therefor 有权
标题翻译：手术植入物及其输送系统
公开(公告)号：US07223280B2
公开(公告)日：2007-05-29
申请号：US10058645
申请日：2002-01-28
申请人： Anthony Walter Anson , Peter William Phillips , John Reidy , Shakeel Qureshi
发明人： Anthony Walter Anson , Peter William Phillips , John Reidy , Shakeel Qureshi
IPC分类号： A61B17/08
CPC分类号： A61B17/0057 , A61B17/12022 , A61B17/12109 , A61B17/12172 , A61B2017/00526 , A61B2017/00575 , A61B2017/00592 , A61B2017/00606 , A61B2017/0061 , A61B2017/00623 , A61F2/0077 , A61F2/01 , A61F2/88 , A61F2002/30092 , A61F2002/30329 , A61F2210/0014 , A61F2220/0025 , A61F2250/0067 , Y10S623/901
摘要： A stent for occluding the human ductus arteriosus comprises a length of wire of shape memory effect or superelastic material which is expandable from a relatively straightened state for introduction into the patient to an occluding state wherein the wire defines an occluding anchor part and a spiral anchor part and a straight linking part connecting the two wherein the wire has a series of turns extending over the cross-sectional area of the occluding anchor part.
摘要翻译：用于闭塞人的动脉导管的支架包括形状记忆效应线或超弹性材料的一段长度，其可以从相对矫直状态扩展以引入患者到阻塞状态，其中线限定阻塞锚固部分和螺旋锚定部分以及连接两者的直线连接部件，其中所述线材具有在所述闭塞锚固部件的横截面上延伸的一系列匝。

3. 发明授权

US06432134B1 Method of producing a surgical implant 有权
标题翻译：生产手术植入物的方法
公开(公告)号：US06432134B1
公开(公告)日：2002-08-13
申请号：US09214683
申请日：1999-08-16
申请人： Anthony Walter Anson , Peter William Phillips , John Reidy , Shakeel Qureshi
发明人： Anthony Walter Anson , Peter William Phillips , John Reidy , Shakeel Qureshi
IPC分类号： A61F206
CPC分类号： A61B17/0057 , A61B17/12022 , A61B17/12109 , A61B17/12172 , A61B2017/00526 , A61B2017/00575 , A61B2017/00592 , A61B2017/00606 , A61B2017/0061 , A61B2017/00623 , A61F2/0077 , A61F2/01 , A61F2/88 , A61F2002/30092 , A61F2002/30329 , A61F2210/0014 , A61F2220/0025 , A61F2250/0067 , Y10S623/901
摘要： A stent for occluding the human ductus arteriosus comprises a length of wire of shape memory effect or superelastic material which is expandable from a relatively straightened state for introduction into the patient to an occluding state wherein the wire defines an occluding anchor part and a spiral anchor part and a straight linking part connecting the two wherein the wire has a series of turns extending over the cross-sectional area of the occluding anchor part.
摘要翻译：用于闭塞人的动脉导管的支架包括形状记忆效应线或超弹性材料的一段长度，其可以从相对矫直状态扩展以引入患者到阻塞状态，其中线限定阻塞锚固部分和螺旋锚定部分以及连接两者的直线连接部件，其中所述线材具有在所述闭塞锚固部件的横截面上延伸的一系列匝。

4. 发明授权

US5619204A Analog-to-digital converter with optional low-power mode 失效
标题翻译：具有可选低功耗模式的模数转换器
公开(公告)号：US5619204A
公开(公告)日：1997-04-08
申请号：US394709
申请日：1995-02-27
申请人： Michael Byrne , Colin Price , John Reidy , Simon Smith
发明人： Michael Byrne , Colin Price , John Reidy , Simon Smith
IPC分类号： H03M1/00 , H03M1/12
CPC分类号： H03M1/002 , H03M1/12
摘要： An IC chip having an analog-to-digital converter together with control circuitry for effecting switchover between normal-power mode and low-power mode. The control circuitry includes a first D-type flip-flop with reset which receives on its "D" input a continuous high signal; on its differential clock inputs the flip-flop receives complementary logic signals derived from the "conversion start" (CONVST) signal applied to one pin of an 8-pin chip. In normal mode, the CONVST signal is a short pulse having an initial negative-going (falling) leading edge, and the flip-flop responds to that leading edge by producing a high Q output (CONVEN). This signals the A/D converter to carry out a conversion. In low-power mode, the CONVST short pulse is positive. The subsequent negative-going (falling) trailing edge of the pulse activates the flip-flop to cause its Q output to go high and turn on the A/D converter. The control circuitry includes a second D-type flip-flop (this one with set) which receives on its D input the CONVST signal. The Q output. of the second flip-flop generates a mode switchover control signal (designated SLEEPB). During low-power mode, established by the use of positive-going CONVST pulses, the low CONVEN signal at the end of conversion clocks the second flip-flop to sample CONVST on its D input, thereby causing the Q output of the second flip-flop (SLEEPB) to go low and switch the A/D converter into low-power status.
摘要翻译：具有模数转换器和控制电路的IC芯片，用于在正常功率模式和低功率模式之间进行切换。控制电路包括具有复位的第一D型触发器，其在其“D”输入端接收连续的高信号; 在其差分时钟输入端，触发器接收从施加到8引脚芯片的一个引脚的“转换开始”（CONVST）信号导出的互补逻辑信号。在正常模式下，CONVST信号是具有初始负向（下降）前沿的短脉冲，并且触发器通过产生高Q输出（CONVEN）来响应该前沿。这将通知A / D转换器进行转换。在低功耗模式下，CONVST短脉冲为正。脉冲的后续负（下降）后沿激活触发器，使其Q输出变为高电平，并打开A / D转换器。该控制电路包括一个第二D型触发器（这个具有一组的触发器），其在其D输入端接收CONVST信号。 Q输出。的第二触发器产生模式切换控制信号（指定为SLEEPB）。在通过使用正向CONVST脉冲建立的低功耗模式期间，转换结束时的低CONVEN信号使第二触发器在其D输入上对CONVST进行采样，从而导致第二触发器的Q输出，触发器（SLEEPB）变为低电平，并将A / D转换器切换到低功耗状态。

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