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1. 发明授权

US06300648B1 Continuous amorphous silicon layer sensors using sealed metal back contact 有权
标题翻译：连续非晶硅层传感器采用密封金属背接触
公开(公告)号：US06300648B1
公开(公告)日：2001-10-09
申请号：US09473579
申请日：1999-12-28
申请人： Ping Mei , Jeng Ping Lu , Francesco Lemmi , Robert A. Street , James B. Boyce
发明人： Ping Mei , Jeng Ping Lu , Francesco Lemmi , Robert A. Street , James B. Boyce
IPC分类号： H01L2904
CPC分类号： H01L29/458 , H01L29/78609 , H01L31/1055
摘要： A method and apparatus for reducing vertical leakage current in a high fill factor sensor array is described. Reduction of vertical leakage current is achieved by eliminating Schottky junction interfaces that occur between metal back contacts and intrinsic amorphous silicon layers. One method of eliminating the Schottky junction uses an extra wide region of N doped amorphous silicon to serve as a buffer between the metal back contact and the intrinsic amorphous silicon layer. Another method of eliminating the Schottky junction completely replaces the metal back contact and the N doped amorphous silicon layer with a substitute material such as N doped poly-silicon.
摘要翻译：描述了用于减少高填充因子传感器阵列中的垂直泄漏电流的方法和装置。通过消除在金属背接触和本征非晶硅层之间发生的肖特基结界面来实现垂直漏电流的减小。消除肖特基结的一种方法使用N掺杂非晶硅的超宽区域作为金属背接触和本征非晶硅层之间的缓冲区。消除肖特基结的另一种方法用诸如N掺杂多晶硅的替代材料完全替代金属背接触和N掺杂非晶硅层。

2. 发明授权

US06288435B1 Continuous amorphous silicon layer sensors using doped poly-silicon back contact 有权
标题翻译：连续非晶硅层传感器采用掺杂多晶硅背接触
公开(公告)号：US06288435B1
公开(公告)日：2001-09-11
申请号：US09473578
申请日：1999-12-28
申请人： Ping Mei , Jeng Ping Lu , Francesco Lemmi , Robert A. Street , James B. Boyce
发明人： Ping Mei , Jeng Ping Lu , Francesco Lemmi , Robert A. Street , James B. Boyce
IPC分类号： H01L31075
CPC分类号： H01L27/14603 , H01L27/14665
摘要： A method and apparatus for reducing vertical leakage current in a high fill factor sensor array is described. Reduction of vertical leakage current is achieved by eliminating Schottky junction interfaces that occur between metal back contacts and intrinsic amorphous silicon layers. One method of eliminating the Schottky junction uses an extra wide region of N doped amorphous silicon to serve as a buffer between the metal back contact and the intrinsic amorphous silicon layer. Another method of eliminating the Schottky junction completely replaces the metal back contact and the N doped amorphous silicon layer with a substitute material such as N doped poly-silicon.
摘要翻译：描述了用于减少高填充因子传感器阵列中的垂直泄漏电流的方法和装置。通过消除在金属背接触和本征非晶硅层之间发生的肖特基结界面来实现垂直漏电流的减小。消除肖特基结的一种方法使用N掺杂非晶硅的超宽区域作为金属背接触和本征非晶硅层之间的缓冲区。消除肖特基结的另一种方法用诸如N掺杂多晶硅的替代材料完全替代金属背接触和N掺杂的非晶硅层。

3. 发明授权

US06384461B1 Dual dielectric structure for suppressing lateral leakage current in high fill factor arrays 有权
标题翻译：用于抑制高填充因子阵列中的横向漏电流的双电介质结构
公开(公告)号：US06384461B1
公开(公告)日：2002-05-07
申请号：US09419293
申请日：1999-10-15
申请人： Jeng Ping Lu , Ping Mei , Francesco Lemmi , Robert A. Street , James B. Boyce
发明人： Jeng Ping Lu , Ping Mei , Francesco Lemmi , Robert A. Street , James B. Boyce
IPC分类号： H01L31075
CPC分类号： H01L27/14665 , H01L27/1463
摘要： A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.
摘要翻译：用于抑制全填充因子图像阵列中的横向漏电流的结构和方法包括双电介质钝化层。第一钝化层包括作为绝缘体的材料，具有低介电常数以最小化触点之间的电容耦合，并且是低应力以防止开裂。第二钝化层包括在第一钝化层上的薄氧化物或氮化物层。

4. 发明授权

US06818535B2 Thin phosphorus nitride film as an n-type doping source used in a laser doping technology 有权
标题翻译：作为用于激光掺杂技术的n型掺杂源的薄磷氮化膜
公开(公告)号：US06818535B2
公开(公告)日：2004-11-16
申请号：US10282265
申请日：2002-10-28
申请人： Jeng Ping Lu , Ping Mei , James B. Boyce
发明人： Jeng Ping Lu , Ping Mei , James B. Boyce
IPC分类号： H01L2100
CPC分类号： H01L29/66765 , H01L21/2254 , H01L29/78669
摘要： An improved method and system for laser doping a semiconductor material is described. In the invention, phosphorous nitride is used as a dopant source. The phosphorous nitride is brought into close proximity with a region of the semiconductor to be doped. A pulse of laser light decomposes the phosphorous nitride and briefly melts the region of semiconductor to be doped to allow incorporation of dopant atoms from the phosphorous nitride into the semiconductor.
摘要翻译：描述了用于激光掺杂半导体材料的改进的方法和系统。在本发明中，使用氮化磷作为掺杂剂源。使磷氮化物与要掺杂的半导体的区域紧密接近。激光的脉冲分解氮化亚氮，并且短暂熔化要掺杂的半导体的区域，以允许将掺杂剂原子从氮化磷引入到半导体中。

5. 发明授权

US06586318B1 Thin phosphorus nitride film as an N-type doping source used in laser doping technology 有权
标题翻译：薄磷氮化膜作为激光掺杂技术中使用的N型掺杂源
公开(公告)号：US06586318B1
公开(公告)日：2003-07-01
申请号：US09473576
申请日：1999-12-28
申请人： Jeng Ping Lu , Ping Mei , James B. Boyce
发明人： Jeng Ping Lu , Ping Mei , James B. Boyce
IPC分类号： H01L2100
CPC分类号： H01L29/66765 , H01L21/2254 , H01L29/78669
摘要： An improved method and system for laser doping a semiconductor material is described. In the invention, phosphorous nitride is used as a dopant source. The phosphorous nitride is brought into close proximity with a region of the semiconductor to be doped. A pulse of laser light decomposes the phosphorous nitride and briefly melts the region of semiconductor to be doped to allow incorporation of dopant atoms from the phosphorous nitride into the semiconductor.
摘要翻译：描述了用于激光掺杂半导体材料的改进的方法和系统。在本发明中，使用氮化磷作为掺杂剂源。使磷氮化物与要掺杂的半导体的区域紧密接近。激光的脉冲分解氮化亚氮，并且短暂熔化要掺杂的半导体的区域，以允许将掺杂剂原子从氮化磷引入到半导体中。

6. 发明授权

US07338833B2 Dual dielectric structure for suppressing lateral leakage current in high fill factor arrays 有权
标题翻译：用于抑制高填充因子阵列中的横向漏电流的双电介质结构
公开(公告)号：US07338833B2
公开(公告)日：2008-03-04
申请号：US10067424
申请日：2002-02-07
申请人： Jeng Ping Lu , Ping Mei , Francesco Lemmi , Robert A. Street , James B. Boyce
发明人： Jeng Ping Lu , Ping Mei , Francesco Lemmi , Robert A. Street , James B. Boyce
IPC分类号： H01L21/00
CPC分类号： H01L27/14665 , H01L27/1463
摘要： A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.
摘要翻译：用于抑制全填充因子图像阵列中的横向漏电流的结构和方法包括双电介质钝化层。第一钝化层包括作为绝缘体的材料，具有低介电常数以最小化触点之间的电容耦合，并且是低应力以防止开裂。第二钝化层包括在第一钝化层上的薄氧化物或氮化物层。

7. 发明授权

US6020223A Method of manufacturing a thin film transistor with reduced parasitic capacitance and reduced feed-through voltage 失效
公开(公告)号：US6020223A
公开(公告)日：2000-02-01
申请号：US959590
申请日：1997-10-29
申请人： Ping Mei , Rene A. Lujan , James B. Boyce , Christopher L. Chua , Michael G. Hack
发明人： Ping Mei , Rene A. Lujan , James B. Boyce , Christopher L. Chua , Michael G. Hack
IPC分类号： H01L21/223 , H01L21/225 , H01L21/266 , H01L21/336 , H01L27/144 , H01L27/146 , H01L29/786 , H01L31/0216 , H01L21/00 , H01L21/84
CPC分类号： H01L29/78696 , H01L21/223 , H01L21/2236 , H01L21/2254 , H01L21/2255 , H01L21/266 , H01L27/1443 , H01L27/14603 , H01L29/66757 , H01L29/66765 , H01L29/78669 , H01L31/02162 , H01L31/02165 , Y10S438/94
摘要： A method of producing an improved thin film transistor structure is provided having no source/gate or drain/gate overlap. A laser-assisted doping technique is applied to fabricate such transistors. A radiation filter is employed, which is transparent to light at the photolithography wavelength, but reflective or opaque at the laser wavelength. Eliminating source/gate and drain/gate overlap significantly reduces or eliminates parasitic capacitance and feed-through voltage between source and gate. Short-channel a-Si:H thin film transistors may be obtained having high field effect mobilities. Improved pixel performance and pixel-to-pixel uniformity is provided.

8. 发明授权

US5733641A Buffered substrate for semiconductor devices 失效
标题翻译：用于半导体器件的缓冲衬底
公开(公告)号：US5733641A
公开(公告)日：1998-03-31
申请号：US656460
申请日：1996-05-31
申请人： David K. Fork , James B. Boyce , Ping Mei , Steve Ready , Richard I. Johnson , Greg B. Anderson
发明人： David K. Fork , James B. Boyce , Ping Mei , Steve Ready , Richard I. Johnson , Greg B. Anderson
IPC分类号： H01L21/02 , H01L21/20 , H01L21/205 , H01L21/336 , H01L27/12 , H01L29/786 , B32B15/00
CPC分类号： H01L21/0237 , H01L21/02488 , H01L21/02532 , H01L21/0262 , H01L21/02675 , Y10S438/967 , Y10T428/24479 , Y10T428/24926 , Y10T428/265
摘要： The invention provides a buffered substrate that includes a substrate, a buffer layer and a silicon layer. The buffer layer is disposed between the substrate and the silicon layer. The buffer layer has a melting point higher than a melting point of the substrate. A polycrystalline silicon layer is formed by crystallizing the silicon layer using a laser beam.
摘要翻译：本发明提供一种缓冲衬底，其包括衬底，缓冲层和硅层。缓冲层设置在基板和硅层之间。缓冲层的熔点高于基板的熔点。通过使用激光束使硅层结晶来形成多晶硅层。

9. 发明授权

US06252215B1 Hybrid sensor pixel architecture with gate line and drive line synchronization 失效
标题翻译：混合传感器像素结构，具有栅极线和驱动线同步
公开(公告)号：US06252215B1
公开(公告)日：2001-06-26
申请号：US09069053
申请日：1998-04-28
申请人： Ping Mei , Andrew J. Moore , Raj B. Apte , Steven E. Ready , Robert A. Street , James B. Boyce
发明人： Ping Mei , Andrew J. Moore , Raj B. Apte , Steven E. Ready , Robert A. Street , James B. Boyce
IPC分类号： H01J4014
CPC分类号： H01L27/14643 , H01L27/14609 , H04N5/3741
摘要： A pixel circuit construction for image sensing includes a photosensor, an amplifier, a selector switch and, and a reset switch. The amplifier may be a single polycrystalline silicon (channel) transistor for high gain. The selector switch may also be a single polycrystalline silicon (channel) transistor for high conductivity. The reset switch may a single amorphous crystalline silicon (channel) transistor for low leakage current. The photosensor and amplifier may be connected to a shared bias line or may be connected to separate bias and drive lines, respectively. The selector and reset switches may be connected to a shared data line or may be connected to separate data and reset lines, respectively. Laser crystallization and rehydrogenation techniques are well suited to obtaining devices described herein. Gate line and drive voltage line synchronization is provided.
摘要翻译：用于图像感测的像素电路结构包括光电传感器，放大器，选择器开关和复位开关。放大器可以是用于高增益的单个多晶硅（沟道）晶体管。选择器开关也可以是用于高导电性的单个多晶硅（沟道）晶体管。复位开关可以是用于低漏电流的单个非晶态硅（沟道）晶体管。光传感器和放大器可以连接到共享偏置线，或者可以分别连接到单独的偏置线和驱动线。选择器和复位开关可以连接到共享数据线，或者可以分别连接到单独的数据和复位线。激光结晶和再氢化技术非常适合于获得本文所述的装置。提供栅极线和驱动电压线同步。

10. 发明授权

US6107641A Thin film transistor with reduced parasitic capacitance and reduced feed-through voltage 失效
标题翻译：具有降低的寄生电容和降低的馈通电压的薄膜晶体管
公开(公告)号：US6107641A
公开(公告)日：2000-08-22
申请号：US927023
申请日：1997-09-10
申请人： Ping Mei , Rene A. Lujan , James B. Boyce , Christopher L. Chua , Michael G. Hack
发明人： Ping Mei , Rene A. Lujan , James B. Boyce , Christopher L. Chua , Michael G. Hack
IPC分类号： H01L21/223 , H01L21/225 , H01L21/266 , H01L21/336 , H01L27/144 , H01L27/146 , H01L29/786 , H01L31/0216 , H01L29/76
CPC分类号： H01L29/78696 , H01L21/223 , H01L21/2236 , H01L21/2254 , H01L21/2255 , H01L21/266 , H01L27/1443 , H01L27/14603 , H01L29/66757 , H01L29/66765 , H01L29/78669 , H01L31/02162 , H01L31/02165 , Y10S438/94
摘要： An improved thin film transistor structure is provided having no source/gate or drain/gate overlap. A laser doping technique is applied to fabricate such transistors. Eliminating source/gate and drain/gate overlap significantly reduces or eliminates parasitic capacitance and feed-through voltage between source and gate. Short-channel a-Si:H thin film transistors may be obtained having high field effect mobilities. Improved pixel performance and pixel-to-pixel uniformity is provided.
摘要翻译：提供了不具有源极/栅极或漏极/栅极重叠的改进的薄膜晶体管结构。应用激光掺杂技术来制造这种晶体管。消除源极/栅极和漏极/栅极重叠显着降低或消除了源极和栅极之间的寄生电容和馈通电压。可以获得具有高场效应迁移率的短沟道a-Si：H薄膜晶体管。提供了改进的像素性能和像素到像素的均匀性。

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