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1. 发明申请

US20140044215A1 Block-Based Crest Factor Reduction 有权
标题翻译：基于块的波峰因子减少
公开(公告)号：US20140044215A1
公开(公告)日：2014-02-13
申请号：US13569148
申请日：2012-08-07
申请人： Jayakrishnan C. Mundarath , Leo G. Dehner , Jayesh H. Kotecha , Peter Z. Rashev
发明人： Jayakrishnan C. Mundarath , Leo G. Dehner , Jayesh H. Kotecha , Peter Z. Rashev
IPC分类号： H04L25/49
CPC分类号： H04L27/2624
摘要： A method and apparatus for a radio base station (200) generates a multicarrier communication signal having a reduced crest factor by processing a block of samples (231) with a peak search window (271) to identify and suppress signal peaks exceeding a power threshold value.
摘要翻译：无线电基站（200）的方法和装置通过用峰值搜索窗口（271）处理采样块（231）来产生具有降低波峰因数的多载波通信信号，以识别和抑制超过功率阈值的信号峰值。

2. 发明授权

US09100253B2 Block-based crest factor reduction 有权
标题翻译：基于块的波峰因数降低
公开(公告)号：US09100253B2
公开(公告)日：2015-08-04
申请号：US13569148
申请日：2012-08-07
申请人： Jayakrishnan C. Mundarath , Leo G. Dehner , Jayesh H. Kotecha , Peter Z. Rashev
发明人： Jayakrishnan C. Mundarath , Leo G. Dehner , Jayesh H. Kotecha , Peter Z. Rashev
IPC分类号： H04L27/26
CPC分类号： H04L27/2624
摘要： A method and apparatus for a radio base station (200) generates a multicarrier communication signal having a reduced crest factor by processing a block of samples (231) with a peak search window (271) to identify and suppress signal peaks exceeding a power threshold value.
摘要翻译：无线电基站（200）的方法和装置通过用峰值搜索窗口（271）处理采样块（231）来产生具有降低波峰因数的多载波通信信号，以识别和抑制超过功率阈值的信号峰值。

3. 发明授权

US08724556B2 Uplink control channel allocation in a communication system and communicating the allocation 有权
标题翻译：通信系统中的上行链路控制信道分配和通信分配
公开(公告)号：US08724556B2
公开(公告)日：2014-05-13
申请号：US11725422
申请日：2007-03-19
申请人： James W. McCoy , Leo G. Dehner , Jayesh H. Kotecha , Jayakrishnan C. Mundarath
发明人： James W. McCoy , Leo G. Dehner , Jayesh H. Kotecha , Jayakrishnan C. Mundarath
IPC分类号： H04W4/00
CPC分类号： H04W72/0413 , H04L1/0003 , H04L5/0055 , H04W28/26 , H04W72/04 , H04W72/1263 , H04W72/1284 , H04W72/14
摘要： Various methods of allocating uplink control channels in a communication system are implemented at a resource scheduler or a user equipment (UE). In one method the scheduler reserves resources for a downlink data channel and signals a corresponding downlink data channel grant and also reserves resources for a persistent uplink control channel for a longer duration than the data channel grant. Signaling overhead associated with a grant for this persistent uplink control channel is reduced over a full dynamic grant. A predetermined rule can be used at the scheduler and at the UE to avoid overhead signaling associated with a grant for this persistent control channel. Predetermined rules at the UE and scheduler can also be used to reserve appropriate resources and select appropriate MCS levels for control information and the control information and uplink data can be transported over a common uplink channel when a time overlap occurs between an uplink data channel and the persistent control channel.
摘要翻译：在资源调度器或用户设备（UE）中实现在通信系统中分配上行链路控制信道的各种方法。在一种方法中，调度器为下行链路数据信道预留资源，并向相应的下行链路数据信道授权发送信号，并为持续上行链路控制信道预留比数据信道授权更长的持续时间的资源。与该持久上行链路控制信道的授权相关联的信令开销通过完全动态授权而减少。可以在调度器和UE处使用预定规则来避免与该持久控制信道的授权相关联的开销信令。 UE和调度器上的预定规则也可以用于保留适当的资源，并为控制信息选择适当的MCS级别，并且当在上行链路数据信道与上行链路数据信道之间发生时间重叠时，控制信息和上行链路数据可以通过公共上行链路信道传输持续控制通道。

4. 发明申请

US20080233964A1 Uplink control channel allocation 有权
标题翻译：上行链路控制信道分配
公开(公告)号：US20080233964A1
公开(公告)日：2008-09-25
申请号：US11725422
申请日：2007-03-19
申请人： James W. McCoy , Leo G. Dehner , Jayesh H. Kotecha , Jayakrishnan C. Mundarath
发明人： James W. McCoy , Leo G. Dehner , Jayesh H. Kotecha , Jayakrishnan C. Mundarath
IPC分类号： H04Q7/20
CPC分类号： H04W72/0413 , H04L1/0003 , H04L5/0055 , H04W28/26 , H04W72/04 , H04W72/1263 , H04W72/1284 , H04W72/14
摘要： Various methods of allocating uplink control channels in a communication system are implemented at a resource scheduler or a user equipment (UE). In one method the scheduler reserves resources for a downlink data channel and signals a corresponding downlink data channel grant and also reserves resources for a persistent uplink control channel for a longer duration than the data channel grant. Signaling overhead associated with a grant for this persistent uplink control channel is reduced over a full dynamic grant. A predetermined rule can be used at the scheduler and at the UE to avoid overhead signaling associated with a grant for this persistent control channel. Predetermined rules at the UE and scheduler can also be used to reserve appropriate resources and select appropriate MCS levels for control information and the control information and uplink data can be transported over a common uplink channel when a time overlap occurs between an uplink data channel and the persistent control channel.
摘要翻译：在资源调度器或用户设备（UE）中实现在通信系统中分配上行链路控制信道的各种方法。在一种方法中，调度器为下行链路数据信道预留资源，并向相应的下行链路数据信道授权发送信号，并为持续上行链路控制信道预留比数据信道授权更长的持续时间的资源。与该持久上行链路控制信道的授权相关联的信令开销通过完全动态授权而减少。可以在调度器和UE处使用预定规则来避免与该持久控制信道的授权相关联的开销信令。 UE和调度器上的预定规则也可以用于保留适当的资源，并为控制信息选择适当的MCS级别，并且当在上行链路数据信道与上行链路数据信道之间发生时间重叠时，控制信息和上行链路数据可以通过公共上行链路信道传输持续控制通道。

5. 发明授权

US10261939B2 Performing lookup table operations on a single-instruction multiple data processor 有权
公开(公告)号：US10261939B2
公开(公告)日：2019-04-16
申请号：US14464134
申请日：2014-08-20
申请人： Leo G. Dehner , Jayakrishnan C. Mundarath , Peter Z. Rashev
发明人： Leo G. Dehner , Jayakrishnan C. Mundarath , Peter Z. Rashev
IPC分类号： G06F15/80 , G06F9/30 , G06F17/10 , G06F9/38 , H04B1/62 , H04L27/36 , H03F1/32 , H04B1/04
摘要： In accordance with at least one embodiment, a processor system is disclosed having a SIMD processor device that has a plurality of subsidiary processing elements that are controlled to process multiple data concurrently. In accordance with at least one embodiment, the SIMD processor is a vector processor (VPU) having a plurality of vector Arithmetic Units (AUs) as subsidiary processing elements, and the VPU executes an instruction to transfer table information from a global memory of the VPU to a plurality of local memories accessible by each AU. The VPU also executes an instruction that results in each processing element performing a table lookup from a table stored at its local memory. In response to the instruction, this table lookup uses a portion of a lookup value to access information from the table, and uses another portion of the lookup information to calculate an interpolated resultant based upon the accessed information.

6. 发明申请

US20160054995A1 SINGLE-INSTRUCTION MULTIPLE DATA PROCESSOR 审中-公开
标题翻译：单指令多数据处理器
公开(公告)号：US20160054995A1
公开(公告)日：2016-02-25
申请号：US14464134
申请日：2014-08-20
申请人： Leo G. Dehner , Jayakrishnan C. Mundarath , Peter Z. Rashev
发明人： Leo G. Dehner , Jayakrishnan C. Mundarath , Peter Z. Rashev
IPC分类号： G06F9/30 , G06F17/10
CPC分类号： G06F9/3001 , G06F9/3004 , G06F9/30043 , G06F9/3887 , G06F17/10 , G06F17/17
摘要： In accordance with at least one embodiment, a processor system is disclosed having a SIMD processor device that has a plurality of subsidiary processing elements that are controlled to process multiple data concurrently. In accordance with at least one embodiment, the SIMD processor is a vector processor (VPU) having a plurality of vector Arithmetic Units (AUs) as subsidiary processing elements, and the VPU executes an instruction to transfer table information from a global memory of the VPU to a plurality of local memories accessible by each AU. The VPU also executes an instruction that results in each processing element performing a table lookup from a table stored at its local memory. In response to the instruction, this table lookup uses a portion of a lookup value to access information from the table, and uses another portion of the lookup information to calculate an interpolated resultant based upon the accessed information.
摘要翻译：根据至少一个实施例，公开了具有SIMD处理器设备的处理器系统，该处理器设备具有被控制以同时处理多个数据的多个辅助处理元件。根据至少一个实施例，SIMD处理器是具有多个向量算术单元（AU）作为辅助处理单元的向量处理器（VPU），并且VPU执行从VPU的全局存储器传送表信息的指令到由每个AU访问的多个本地存储器。 VPU还执行一个指令，导致每个处理元素从存储在其本地存储器中的表执行表查找。响应于该指令，该表查找使用查找值的一部分来访问表中的信息，并且使用查找信息的另一部分基于所访问的信息来计算插值结果。

7. 发明申请

US20090313314A1 TECHNIQUES FOR PERFORMING DISCRETE FOURIER TRANSFORMS ON RADIX-2 PLATFORMS 有权
标题翻译：在RADIX-2平台上执行离散傅立叶变换的技术
公开(公告)号：US20090313314A1
公开(公告)日：2009-12-17
申请号：US12140890
申请日：2008-06-17
申请人： JAYAKRISHNAN C. MUNDARATH , Leo G. Dehner , Kevin B. Traylor
发明人： JAYAKRISHNAN C. MUNDARATH , Leo G. Dehner , Kevin B. Traylor
IPC分类号： G06F17/14
CPC分类号： G06F17/142
摘要： A technique for performing a discrete Fourier transform (DFT) includes storing, in a single-port memory, multiple signal points. A first group of consecutive ones of the multiple signal points are fetched (from a first line of the single-port memory) to a first input register associated with a processor that includes multiple arithmetic units (AUs) that are each configured to perform multiply accumulate (MAC) operations. A second group of consecutive ones of the multiple signal points are then fetched (from a second line of the single-port memory) to a second input register associated with the processor. Selected pairs of the multiple signal points are then loaded (one from each of the first and second input registers for each pair) into the multiple arithmetic units during an initial butterfly stage. Radix-2 butterfly operations are then performed on the selected pairs of the multiple signal points (using the multiple AUs) to provide respective output elements.
摘要翻译：用于执行离散傅里叶变换（DFT）的技术包括在单端口存储器中存储多个信号点。将多个信号点中的连续的多个信号点中的第一组（从单端口存储器的第一行）提取到与包括多个运算单元（AU）的处理器相关联的第一输入寄存器，每个运算单元被配置为执行乘法累积（MAC）操作。然后将多个信号点中的第二组连续的信号点从单端口存储器的第二行提取到与处理器相关联的第二输入寄存器。然后，在初始蝴蝶阶段期间，将多个信号点的所选择的对加载（每对中的每个第一和第二输入寄存器中的一个）分配到多个运算单元中。然后对所选择的多个信号点对（使用多个AU）执行基2蝶形运算，以提供相应的输出元件。

8. 发明授权

US09098121B2 Vector comparator system for finding a peak number 有权
标题翻译：用于寻找峰值的矢量比较系统
公开(公告)号：US09098121B2
公开(公告)日：2015-08-04
申请号：US13746891
申请日：2013-01-22
申请人： Jayakrishnan C. Mundarath , Leo G. Dehner , Eric J. Jackowski
发明人： Jayakrishnan C. Mundarath , Leo G. Dehner , Eric J. Jackowski
IPC分类号： G06F7/00 , G06F7/02
CPC分类号： G06F7/026
摘要： A comparator (231) for determining a peak number, representing a maximum or minimum of a set of numbers, includes a multi-element comparator (232) for comparing different pages of the set of numbers in a page comparison mode to output a candidate set of winning numbers, and for automatically switching to a leaf/tree search of the candidate set of winning numbers in an element comparison mode. Operating in parallel with the multi-element comparator (232), an index generation unit (233) processes flag/sign bits from the multi-element comparator in conjunction with state machine control logic (230) to keep track of the index/indices for the peak value. Upon completion of final stage, the index generation unit returns the absolute index (235) of the peak value.
摘要翻译：用于确定表示一组数字的最大值或最小值的峰值数目的比较器（231）包括：多元素比较器（232），用于比较页面比较模式中的该组数字的不同页面，以输出候选集合并且用于在元素比较模式中自动地切换到候选组的获胜号码的叶/树搜索。索引生成单元（233）与多元素比较器（232）并行操作，结合状态机控制逻辑（230）处理来自多元素比较器的标志/符号位，以跟踪索引/索引峰值。在最终阶段完成时，索引生成单元返回峰值的绝对值（235）。

9. 发明授权

US08271569B2 Techniques for performing discrete fourier transforms on radix-2 platforms 有权
标题翻译：在基数2平台上进行离散傅里叶变换的技术
公开(公告)号：US08271569B2
公开(公告)日：2012-09-18
申请号：US12140890
申请日：2008-06-17
申请人： Jayakrishnan C. Mundarath , Leo G. Dehner , Kevin B. Traylor
发明人： Jayakrishnan C. Mundarath , Leo G. Dehner , Kevin B. Traylor
IPC分类号： G06F15/00
CPC分类号： G06F17/142
摘要： A technique for performing a discrete Fourier transform (DFT) includes storing, in a single-port memory, multiple signal points. A first group of consecutive ones of the multiple signal points are fetched (from a first line of the single-port memory) to a first input register associated with a processor that includes multiple arithmetic units (AUs) that are each configured to perform multiply accumulate (MAC) operations. A second group of consecutive ones of the multiple signal points are then fetched (from a second line of the single-port memory) to a second input register associated with the processor. Selected pairs of the multiple signal points are then loaded (one from each of the first and second input registers for each pair) into the multiple arithmetic units during an initial butterfly stage. Radix-2 butterfly operations are then performed on the selected pairs of the multiple signal points (using the multiple AUs) to provide respective output elements.
摘要翻译：用于执行离散傅里叶变换（DFT）的技术包括在单端口存储器中存储多个信号点。将多个信号点中的连续的多个信号点中的第一组（从单端口存储器的第一行）提取到与包括多个运算单元（AU）的处理器相关联的第一输入寄存器，每个运算单元被配置为执行乘法累积（MAC）操作。然后将多个信号点中的第二组连续的信号点从单端口存储器的第二行提取到与处理器相关联的第二输入寄存器。然后，在初始蝴蝶阶段期间，将多个信号点的所选择的对加载（每对中的每个第一和第二输入寄存器中的一个）分配到多个运算单元中。然后对所选择的多个信号点对（使用多个AU）执行基2蝶形运算，以提供相应的输出元件。

10. 发明申请

US20140207836A1 Vector Comparator System for Finding a Peak Number 有权
标题翻译：用于查找峰值数的矢量比较系统
公开(公告)号：US20140207836A1
公开(公告)日：2014-07-24
申请号：US13746891
申请日：2013-01-22
申请人： Jayakrishnan C. Mundarath , Leo G. Dehner , Eric J. Jackowski
发明人： Jayakrishnan C. Mundarath , Leo G. Dehner , Eric J. Jackowski
IPC分类号： G06F7/544
CPC分类号： G06F7/026
摘要： A comparator (231) for determining a peak number, representing a maximum or minimum of a set of numbers, includes a multi-element comparator (232) for comparing different pages of the set of numbers in a page comparison mode to output a candidate set of winning numbers, and for automatically switching to a leaf/tree search of the candidate set of winning numbers in an element comparison mode. Operating in parallel with the multi-element comparator (232), an index generation unit (233) processes flag/sign bits from the multi-element comparator in conjunction with state machine control logic (230) to keep track of the index/indices for the peak value. Upon completion of final stage, the index generation unit returns the absolute index (235) of the peak value.
摘要翻译：用于确定表示一组数字的最大值或最小值的峰值数目的比较器（231）包括：多元素比较器（232），用于比较页面比较模式中的该组数字的不同页面，以输出候选集合并且用于在元素比较模式中自动地切换到候选组的获胜号码的叶/树搜索。索引生成单元（233）与多元素比较器（232）并行操作，结合状态机控制逻辑（230）处理来自多元素比较器的标志/符号位，以跟踪索引/索引峰值。在最终阶段完成时，索引生成单元返回峰值的绝对值（235）。

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