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    • 1. 发明授权
    • Detecting digital radio signals
    • 检测数字无线电信号
    • US08774328B2
    • 2014-07-08
    • US12894316
    • 2010-09-30
    • Javier ElenesBrian D. GreenMichael R. May
    • Javier ElenesBrian D. GreenMichael R. May
    • H03D1/00
    • H04B1/086H04H20/30H04H60/12H04H2201/18H04L25/03834H04L27/0008H04W52/0229Y02D70/00
    • In one embodiment, a receiver front end circuit can receive and process multiple radio frequency (RF) signals and output downconverted signals corresponding to these signals. In turn, multiple signal processors can be coupled to this front end. Specifically, a first signal processor can receive and process the downconverted signals to output a first signal obtained from content of a first RF signal, and a second signal processor can receive and process the downconverted signals to output a second signal obtained from content of a second RF signal. In addition, the apparatus may include a detection circuit coupled to the receiver front end circuit to detect presence of at least the second signal and enable the second signal processor responsive to the detected presence.
    • 在一个实施例中,接收器前端电路可以接收和处理多个射频(RF)信号并输出​​与这些信号对应的下变频信号。 反过来,多个信号处理器可以耦合到该前端。 具体地,第一信号处理器可以接收并处理下变频信号以输出从第一RF信号的内容获得的第一信号,并且第二信号处理器可以接收并处理下变频信号以输出从第二RF信号的内容获得的第二信号 射频信号。 此外,该装置可以包括耦合到接收器前端电路的检测电路,以检测至少第二信号的存在,并使第二信号处理器能够响应于检测到的存在。
    • 2. 发明申请
    • DETECTING DIGITAL RADIO SIGNALS
    • 检测数字无线电信号
    • US20120082271A1
    • 2012-04-05
    • US12894316
    • 2010-09-30
    • JAVIER ELENESBrian D. GreenMichael R. May
    • JAVIER ELENESBrian D. GreenMichael R. May
    • H04L27/06
    • H04B1/086H04H20/30H04H60/12H04H2201/18H04L25/03834H04L27/0008H04W52/0229Y02D70/00
    • In one embodiment, a receiver front end circuit can receive and process multiple radio frequency (RF) signals and output downconverted signals corresponding to these signals. In turn, multiple signal processors can be coupled to this front end. Specifically, a first signal processor can receive and process the downconverted signals to output a first signal obtained from content of a first RF signal, and a second signal processor can receive and process the downconverted signals to output a second signal obtained from content of a second RF signal. In addition, the apparatus may include a detection circuit coupled to the receiver front end circuit to detect presence of at least the second signal and enable the second signal processor responsive to the detected presence.
    • 在一个实施例中,接收器前端电路可以接收和处理多个射频(RF)信号并输出​​与这些信号对应的下变频信号。 反过来,多个信号处理器可以耦合到该前端。 具体地,第一信号处理器可以接收并处理下变频信号以输出从第一RF信号的内容获得的第一信号,并且第二信号处理器可以接收并处理下变频信号以输出从第二RF信号的内容获得的第二信号 射频信号。 此外,该装置可以包括耦合到接收器前端电路的检测电路,以检测至少第二信号的存在,并使第二信号处理器能够响应于检测到的存在。
    • 7. 外观设计
    • Foldable child height recording panels
    • USD869304S1
    • 2019-12-10
    • US29664480
    • 2018-09-25
    • Michael R. May
    • Michael R. May
    • FIG. 1 is a front view of a foldable child height recording panels; the back view being a mirror image;
      FIG. 2 is a right side view thereof, the left side view being a mirror image;
      FIG. 3 is a lower edge view thereof;
      FIG. 4 is a top edge view thereof;
      FIG. 5 is an isometric view thereof;
      FIG. 6 is an upper detail view of a panel edge from FIG. 5 thereof;
      FIG. 7 is a lower detail view of a panel edge from FIG. 5 thereof;
      FIG. 8 is an isometric view of the panels in a folded position thereof;
      FIG. 9 is a detailed view from FIG. 8 thereof; and,
      FIG. 10 is a front view thereof with a child and measuring lines drawn in broken lines showing the foldable child height recording panels in a condition of use.
      The features drawn in broken lines in FIGS. 1-5, 7, 8, 9, and 10 are an unclaimed hanging ring and unclaimed connecting string. Dash dash dot lines shown in FIG. 10 are unclaimed height markings. Other broken lines shown in FIG. 10 are for purposes of illustrating environmental structure associated with the claimed design in condition of use, and which forms no part of the claimed design.
    • 10. 发明授权
    • Radio receiver, system on a chip integrated circuit and methods for use therewith
    • 无线电接收机,片上系统集成电路及其使用方法
    • US07672403B2
    • 2010-03-02
    • US11287570
    • 2005-11-22
    • Michael R. MayErich Lowe
    • Michael R. MayErich Lowe
    • H03K9/00H04L27/00
    • H03D3/007H03J1/0008
    • A system on a chip integrated circuit includes a first in-phase digital submodule and a first quadrature phase digital submodule such that the first in-phase digital submodule and the first quadrature phase digital submodule are operable to produce at least one output signal based on at least one input signal. A digital clock generator generates a first in-phase digital clock signal having a plurality of first in-phase digital clock cycles over a predetermined period and a first quadrature phase digital clock signal having a plurality of first quadrature phase digital clock cycles over the predetermined period. The plurality of first in-phase digital clock cycles are substantially interleaved with the plurality of first quadrature phase digital clock cycles over the predetermined period.
    • 一种片上集成电路系统包括第一同相数字子模块和第一正交相位数字子模块,使得第一同相数字子模块和第一正交相位数字子模块可操作以基于at产生至少一个输出信号 至少一个输入信号。 数字时钟发生器产生具有在预定周期内具有多个第一同相数字时钟周期的第一同相数字时钟信号和在预定周期内具有多个第一正交相位数字时钟周期的第一正交相位数字时钟信号 。 多个第一同相数字时钟周期在预定周期内与多个第一正交相位数字时钟周期基本交错。