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1. 发明申请

US20070035911A1 Window via capacitors 有权
标题翻译：通过电容窗
公开(公告)号：US20070035911A1
公开(公告)日：2007-02-15
申请号：US11517536
申请日：2006-09-07
申请人： Carl Eggerding , Jason MacNeal , John Galvagni , Andrew Ritter
发明人： Carl Eggerding , Jason MacNeal , John Galvagni , Andrew Ritter
IPC分类号： H01G4/228
CPC分类号： H01G4/30 , H01G4/12 , H01G4/232
摘要： A method of forming a window via capacitor comprises a first step of providing a plurality of interleaved dielectric layers and paired electrode layers to create a multilayered arrangement characterized by top and bottom surfaces and a plurality pf side surfaces. First and second transition layer electrode portions are provided on a top surface of the multilayered arrangement on top of which a cover layer formed to define openings, or windows, therein is provided. The cover layer may be provided before device firing or may be printed on after firing using polymer or glass. Peripheral terminations are subsequently formed on the device periphery to connect selected electrode layers to respective transition layer electrode portions. Via terminations are formed in the cover layer openings, on top of which solder balls may be applied. Some of the terminations may be formed in accordance with various plating techniques as disclosed.
摘要翻译：一种通过电容器形成窗户的方法包括提供多个交错电介质层和成对电极层的第一步骤，以产生以顶表面和底表面以及多个侧表面为特征的多层布置。第一过渡层电极部分和第二过渡层电极部分设置在多层结构的顶表面上，其上形成有限定开口或其中的窗口的覆盖层。覆盖层可以在器件烧制之前提供，或者可以在使用聚合物或玻璃烧制后印刷。随后在器件外围形成外围端子，以将所选择的电极层连接到各自的过渡层电极部分。通孔端子形成在覆盖层开口中，其上可以施加焊球。一些终端可以根据所公开的各种电镀技术形成。

2. 发明申请

US20060133010A1 Window via capacitor 有权
标题翻译：通过电容窗
公开(公告)号：US20060133010A1
公开(公告)日：2006-06-22
申请号：US11338037
申请日：2006-01-23
申请人： Jason MacNeal , John Galvagni , Andrew Ritter
发明人： Jason MacNeal , John Galvagni , Andrew Ritter
IPC分类号： H01G4/228
CPC分类号： H01G4/232 , H01G4/30
摘要： A window via capacitor comprises a stacked multilayer configuration of at least one bottom layer, a plurality of first and second layers, a transition layer and a cover layer. An alternative window via capacitor comprises a stacked configuration of a bottom window layer, a bottom transition layer, a plurality of first and second layers, followed by a top window layer and a top cover layer. Each first and second layer is preferably characterized by a sheet of dielectric material with a respective first or second electrode plate provided thereon. Adjacent first and second electrode plates form opposing active capacitor plates in the multilayer configuration. Portions of each first and second electrode plate extend to and are exposed on selected side portions of the periphery of the window via capacitor. Electrode portions of each transition layer are aligned in respective similar locations to the first and second electrode plates such that peripheral terminations can connect selected electrode portions of a first polarity together and selected portions of the opposing polarity together. In some embodiments, the connection of peripheral terminations to the electrode portions of the transition layer collect the two opposing terminations onto a single planar surface. Window vias may then be formed through windows provided in the cover layers to effect low inductance electrical connection to the active components of the window via capacitor. Solder balls may also be applied to such window vias to yield a capacitor compatible with BGA mounting technology.
摘要翻译：窗口通孔电容器包括至少一个底层，多个第一和第二层，过渡层和覆盖层的堆叠多层结构。通过电容器的替代窗口包括底部窗口层，底部过渡层，多个第一和第二层的层叠构造，其后是顶部窗口层和顶部覆盖层。每个第一层和第二层的特征在于一层电介质材料，其上设有相应的第一或第二电极板。相邻的第一和第二电极板在多层结构中形成相对的有源电容器板。每个第一和第二电极板的部分经由电容器延伸到窗口的周边的选定的侧部并且暴露在窗的周边的选定的侧部。每个过渡层的电极部分在与第一和第二电极板的各自相似的位置中对准，使得外围终端可以将选定的第一极性的电极部分连接在一起并将相对极性的选定部分连接在一起。在一些实施例中，外围终端与过渡层的电极部分的连接将两个相对的终端收集在单个平面表面上。然后可以通过设置在覆盖层中的窗口形成窗口通孔，以通过电容器实现与窗户的有源部件的低电感电连接。焊球也可以应用于这种窗口通孔，以产生与BGA安装技术兼容的电容器。

3. 发明授权

US07170737B2 Window via capacitor 有权
标题翻译：通过电容窗
公开(公告)号：US07170737B2
公开(公告)日：2007-01-30
申请号：US11338037
申请日：2006-01-23
申请人： Jason MacNeal , John L. Galvagni , Andrew P. Ritter
发明人： Jason MacNeal , John L. Galvagni , Andrew P. Ritter
IPC分类号： H01G4/228 , H01G4/06
CPC分类号： H01G4/232 , H01G4/30
摘要： A window via capacitor comprises a stacked multilayer configuration of at least one bottom layer, a plurality of first and second layers, a transition layer and a cover layer. An alternative window via capacitor comprises a stacked configuration of a bottom window layer, a bottom transition layer, a plurality of first and second layers, followed by a top window layer and a top cover layer. Each first and second layer is preferably characterized by a sheet of dielectric material with a respective first or second electrode plate provided thereon. Adjacent first and second electrode plates form opposing active capacitor plates in the multilayer configuration. Portions of each first and second electrode plate extend to and are exposed on selected side portions of the periphery of the window via capacitor. Electrode portions of each transition layer are aligned in respective similar locations to the first and second electrode plates such that peripheral terminations can connect selected electrode portions of a first polarity together and selected portions of the opposing polarity together. In some embodiments, the connection of peripheral terminations to the electrode portions of the transition layer collect the two opposing terminations onto a single planar surface. Window vias may then be formed through windows provided in the cover layers to effect low inductance electrical connection to the active components of the window via capacitor. Solder balls may also be applied to such window vias to yield a capacitor compatible with BGA mounting technology.
摘要翻译：窗口通孔电容器包括至少一个底层，多个第一和第二层，过渡层和覆盖层的堆叠多层结构。通过电容器的替代窗口包括底部窗口层，底部过渡层，多个第一和第二层的层叠构造，其后是顶部窗口层和顶部覆盖层。每个第一层和第二层的特征在于一层电介质材料，其上设有相应的第一或第二电极板。相邻的第一和第二电极板在多层结构中形成相对的有源电容器板。每个第一和第二电极板的部分经由电容器延伸到窗口的周边的选定的侧部并且暴露在窗的周边的选定的侧部。每个过渡层的电极部分在与第一和第二电极板的各自相似的位置中对准，使得外围终端可以将选定的第一极性的电极部分连接在一起并将相对极性的选定部分连接在一起。在一些实施例中，外围终端与过渡层的电极部分的连接将两个相对的终端收集在单个平面表面上。然后可以通过设置在覆盖层中的窗口形成窗口通孔，以通过电容器实现与窗户的有源部件的低电感电连接。焊球也可以应用于这种窗口通孔，以产生与BGA安装技术兼容的电容器。

4. 发明授权

US07067172B2 Component formation via plating technology 有权
标题翻译：通过电镀技术形成组件
公开(公告)号：US07067172B2
公开(公告)日：2006-06-27
申请号：US10829639
申请日：2004-04-22
申请人： Andrew P. Ritter , John L. Galvagni , Jason MacNeal , Robert Heistand, II , Sriram Dattaguru
发明人： Andrew P. Ritter , John L. Galvagni , Jason MacNeal , Robert Heistand, II , Sriram Dattaguru
IPC分类号： B05D5/12 , H01G7/00 , C25D5/02
CPC分类号： H01G4/232 , Y10T29/43 , Y10T29/435
摘要： Improved terminations, interconnection techniques, and inductive element features for multilayer electronic components are formed in accordance with disclosed plating techniques. Monolithic components are provided with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such plated termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. The subject plated terminations are guided and anchored by exposed varying width internal electrode tabs and additional anchor tab portions. Such anchor tabs may be positioned internally or externally relative to a chip structure to nucleate additional metallized plating material. The combination of electrode tabs and anchor tabs may be exposed in respective arrangements to form generally discoidal portions of plated material. Such plated material may ultimately form generally round portions of ball limiting metallurgy (BLM) to which solder balls may be reflowed. The disclosed technology may be utilized with a plurality of monolithic multilayer components, including interdigitated capacitors, multilayer capacitor arrays, and integrated passive components. A variety of different plating techniques and materials may be employed in the formation of the subject self-determining plated terminations and inductive components.
摘要翻译：根据公开的电镀技术形成改进的端接，互连技术和用于多层电子部件的电感元件特征。单片组件设置有电镀端接，从而消除或大大简化了对典型厚膜端接条的需要。这种电镀终端技术消除了许多典型的终端问题，并且能够以更细的间距实现更高数量的终端，这对于较小的电子部件可能是特别有益的。受电镀的终端由暴露的变化宽度的内部电极片和附加的锚定片部分引导和锚定。这种锚定片可以相对于芯片结构位于内部或外部，以使附加的金属化电镀材料成核。电极片和锚定片的组合可以以各自的布置暴露以形成电镀材料的大致盘形部分。这种电镀材料最终可以形成通常圆球形限制冶金（BLM）的圆形部分，焊球可以回流到该部分。所公开的技术可以与多个单片多层组件一起使用，包括交错电容器，多层电容器阵列和集成无源组件。各种不同的电镀技术和材料可用于形成受试者自确定的电镀终端和电感组分。

5. 发明授权

US07016175B2 Window via capacitor 有权
标题翻译：通过电容窗
公开(公告)号：US07016175B2
公开(公告)日：2006-03-21
申请号：US10674906
申请日：2003-09-30
申请人： Jason MacNeal , John L. Galvagni , Andrew P. Ritter
发明人： Jason MacNeal , John L. Galvagni , Andrew P. Ritter
IPC分类号： H01G4/228 , H01G4/06
CPC分类号： H01G4/232 , H01G4/30
摘要： A window via capacitor includes a stacked configuration of at least one bottom layer, a plurality of first and second layers, a transition layer and a cover layer. Alternatively, bottom window and transition layers, a plurality of first and second layers, followed by top window and cover layers are respectively provided. First and second layers are characterized by respective sheets of dielectric material with an electrode plate provided thereon, adjacent pairs of electrode plates forming opposing active capacitor plates. Portions of each electrode plate as well as electrode portions provided on each transition layer are exposed on side portions of the window via capacitor periphery, such that terminations can connect respective first and second polarity electrodes together. Window vias may then be formed through windows provided in the cover layers to effect low inductance electrical connection to the active components of the window via capacitor.
摘要翻译：窗通孔电容器包括至少一个底层，多个第一和第二层，过渡层和覆盖层的层叠构型。或者，分别提供底窗和过渡层，多个第一层和第二层，其次是顶窗和覆盖层。第一层和第二层的特征在于具有设置在其上的电极板的相应的介电材料片，相邻的电极板对形成相对的有源电容器板。每个电极板的部分以及设置在每个过渡层上的电极部分经由电容器周边暴露在窗口的侧部，使得端子可以将相应的第一和第二极性电极连接在一起。然后可以通过设置在覆盖层中的窗口形成窗口通孔，以通过电容器实现与窗户的有源部件的低电感电连接。

6. 发明授权

US07573698B2 Window via capacitors 有权
标题翻译：通过电容窗
公开(公告)号：US07573698B2
公开(公告)日：2009-08-11
申请号：US11517536
申请日：2006-09-07
申请人： Carl L. Eggerding , Jason MacNeal , John L. Galvagni , Andrew P. Ritter
发明人： Carl L. Eggerding , Jason MacNeal , John L. Galvagni , Andrew P. Ritter
IPC分类号： H01G4/228 , H01G4/06
CPC分类号： H01G4/30 , H01G4/12 , H01G4/232
摘要： A method of forming a window via capacitor comprises a first step of providing a plurality of interleaved dielectric layers and paired electrode layers to create a multilayered arrangement characterized by top and bottom surfaces and a plurality pf side surfaces. First and second transition layer electrode portions are provided on a top surface of the multilayered arrangement on top of which a cover layer formed to define openings, or windows, therein is provided. The cover layer may be provided before device firing or may be printed on after firing using polymer or glass. Peripheral terminations are subsequently formed on the device periphery to connect selected electrode layers to respective transition layer electrode portions. Via terminations are formed in the cover layer openings, on top of which solder balls may be applied. Some of the terminations may be formed in accordance with various plating techniques as disclosed.
摘要翻译：一种通过电容器形成窗户的方法包括提供多个交错电介质层和成对电极层的第一步骤，以产生以顶表面和底表面以及多个侧表面为特征的多层布置。第一过渡层电极部分和第二过渡层电极部分设置在多层结构的顶表面上，其上形成有限定开口或其中的窗口的覆盖层。覆盖层可以在器件烧制之前提供，或者可以在使用聚合物或玻璃烧制后印刷。随后在器件外围形成外围端子，以将所选择的电极层连接到各自的过渡层电极部分。通孔端子形成在覆盖层开口中，其上可以施加焊球。一些终端可以根据所公开的各种电镀技术形成。

7. 发明授权

US07161794B2 Component formation via plating technology 有权
标题翻译：通过电镀技术形成组件
公开(公告)号：US07161794B2
公开(公告)日：2007-01-09
申请号：US10900787
申请日：2004-07-28
申请人： John L. Galvagni , Jason MacNeal , Andrew P. Ritter , Robert Heistand, II , Sriram Dattaguru
发明人： John L. Galvagni , Jason MacNeal , Andrew P. Ritter , Robert Heistand, II , Sriram Dattaguru
IPC分类号： H01G4/228 , H01G2/20
CPC分类号： H01G4/232 , Y10T29/43 , Y10T29/435
摘要： Improved terminations, interconnection techniques, and inductive element features for multilayer electronic components are formed in accordance with disclosed plating techniques. Monolithic components are provided with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such plated termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. The subject plated terminations are guided and anchored by exposed varying width internal electrode tabs and additional anchor tab portions. Such anchor tabs may be positioned internally or externally relative to a chip structure to nucleate additional metallized plating material. The combination of electrode tabs and anchor tabs may be exposed in respective arrangements to form generally discoidal portions of plated material. Such plated material may ultimately form generally round portions of ball limiting metallurgy (BLM) to which solder balls may be reflowed. The disclosed technology may be utilized with a plurality of monolithic multilayer components, including interdigitated capacitors, multilayer capacitor arrays, and integrated passive components. A variety of different plating techniques and materials may be employed in the formation of the subject self-determining plated terminations and inductive components.
摘要翻译：根据公开的电镀技术形成改进的端接，互连技术和用于多层电子部件的电感元件特征。单片组件设置有电镀端接，从而消除或大大简化了对典型厚膜端接条的需要。这种电镀终端技术消除了许多典型的终端问题，并且能够以更细的间距实现更高数量的终端，这对于较小的电子部件可能是特别有益的。受电镀的终端由暴露的变化宽度的内部电极片和附加的锚定片部分引导和锚定。这种锚定片可以相对于芯片结构位于内部或外部，以使附加的金属化电镀材料成核。电极片和锚定片的组合可以以各自的布置暴露以形成电镀材料的大致盘形部分。这种电镀材料最终可以形成通常圆球形限制冶金（BLM）的圆形部分，焊球可以回流到该部分。所公开的技术可以与多个单片多层组件一起使用，包括交错电容器，多层电容器阵列和集成无源组件。各种不同的电镀技术和材料可用于形成受试者自确定的电镀终端和电感组分。

8. 发明授权

US06982863B2 Component formation via plating technology 有权
公开(公告)号：US06982863B2
公开(公告)日：2006-01-03
申请号：US10409036
申请日：2003-04-08
申请人： John L. Galvagni , Jason MacNeal , Andrew P. Ritter , Robert Heistand, II , Sriram Dattaguru
发明人： John L. Galvagni , Jason MacNeal , Andrew P. Ritter , Robert Heistand, II , Sriram Dattaguru
IPC分类号： H01G4/228 , H01G4/32
CPC分类号： H01G4/232 , Y10T29/43 , Y10T29/435
摘要： Improved terminations, interconnection techniques, and inductive element features for multilayer electronic components are formed in accordance with disclosed plating techniques. Monolithic components are provided with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such plated termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. The subject plated terminations are guided and anchored by exposed varying width internal electrode tabs and additional anchor tab portions. Such anchor tabs may be positioned internally or externally relative to a chip structure to nucleate additional metallized plating material. The combination of electrode tabs and anchor tabs may be exposed in respective arrangements to form generally discoidal portions of plated material. Such plated material may ultimately form generally round portions of ball limiting metallurgy (BLM) to which solder balls may be reflowed. The disclosed technology may be utilized with a plurality of monolithic multilayer components, including interdigitated capacitors, multilayer capacitor arrays, and integrated passive components. A variety of different plating techniques and materials may be employed in the formation of the subject self-determining plated terminations and inductive components.

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