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1. 发明授权

US5658442A Target and dark space shield for a physical vapor deposition system 失效
标题翻译：用于物理气相沉积系统的靶和暗空间屏蔽
公开(公告)号：US5658442A
公开(公告)日：1997-08-19
申请号：US612053
申请日：1996-03-07
申请人： James Van Gogh , Fernand Dorleans , Christopher Hagerty , Mark Lloyd , Howard Tang , Siyaun Yang , R. Steve West
发明人： James Van Gogh , Fernand Dorleans , Christopher Hagerty , Mark Lloyd , Howard Tang , Siyaun Yang , R. Steve West
IPC分类号： C23C14/34 , H01J37/34
CPC分类号： H01J37/3441 , C23C14/3407 , H01J37/3408 , H01J37/3423 , H01J37/3447
摘要： The disadvantages heretofore associated with the prior art are overcome by the present invention of an improved target for a physical deposition (PVD) system. The improved target has a portion of the target side wall the overhangs and shadows the side wall of the target thus preventing material from depositing on the edge. To further reduce contaminant generation, the improved target is combined with an improved dark space shield having a first end and a second end, where the second end conventionally supports a collimator and the first end has an inner surface that is substantially vertical.
摘要翻译：迄今与现有技术相关的缺点由本发明克服了用于物理沉积（PVD）系统的改进目标。改进的目标具有目标侧壁的一部分突出并且影响目标的侧壁，从而防止材料沉积在边缘上。为了进一步减少污染物产生，改进的目标与具有第一端和第二端的改进的暗空间屏蔽结合，其中第二端通常支撑准直器，并且第一端具有基本垂直的内表面。

2. 发明授权

US06271592B1 Sputter deposited barrier layers 失效
标题翻译：溅射沉积的阻挡层
公开(公告)号：US06271592B1
公开(公告)日：2001-08-07
申请号：US09370088
申请日：1999-08-06
申请人： Edwin Kim , Michael Nam , Chris Cha , Gongda Yao , Sophia Lee , Fernand Dorleans , Gene Y. Kohara , Jianming Fu
发明人： Edwin Kim , Michael Nam , Chris Cha , Gongda Yao , Sophia Lee , Fernand Dorleans , Gene Y. Kohara , Jianming Fu
IPC分类号： H01L2348
CPC分类号： H01L21/76856 , C23C14/0641 , C23C14/0676 , C23C14/083 , C23C14/185 , C23C14/32 , H01L21/28518 , H01L21/2855 , H01L21/76843 , H01L21/76846 , H01L21/76855
摘要： The present disclosure pertains to our discovery that depositing various film layers in a particular order using a combination of Ion Metal Plasma (IMP) and traditional sputter deposition techniques with specific process conditions results in a barrier layer structure which provides excellent barrier properties and allows for metal/conductor filling of contact sizes down to 0.25 micron and smaller without junction spiking. Specifically, the film layers are deposited on a substrate in the following order: (a) a first layer of a barrier metal (M), deposited by IMP sputter deposition; (b) a second layer of an oxygen-stuffed barrier metal (MOx), an oxygen-stuffed nitride of a barrier metal (MNOx), or a combination thereof; (c) a third layer of a nitride of a barrier metal (MNx), deposited by IMP sputter deposition of the barrier metal in the presence of nitrogen; and (d) a fourth, wetting layer of a barrier metal, deposited by traditional sputter deposition. The first layer of barrier metal can optionally be annealed to form a silicide of the barrier metal (MSi2) in order to reduce contact resistance and interdiffusion of the silicon and metal/conductor which may result form overetching of contacts. An additional layer of barrier metal can optionally be deposited between the second oxygen-stuffed layer and the third barrier metal nitride layer in order to further improve the barrier properties of the barrier layer structure and to provide for better metal/conductor fill. A thin layer of metal/conductor may be deposited on the walls of the contact via by “long throw” sputter deposition prior to filling the via with metal/conductor in order to provide more uniform fill. The optimum process conditions for sputter deposition of the barrier layer structure of the invention are disclosed herein.
摘要翻译：本公开涉及我们的发现，使用离子金属等离子体（IMP）和具有特定工艺条件的传统溅射沉积技术的组合以特定顺序沉积各种膜层导致阻挡层结构，其提供优异的阻隔性能并允许金属 /导体填充接触尺寸低至0.25微米及更小，无接头尖峰。具体地，以下列顺序将膜层沉积在衬底上：（a）通过IMP溅射沉积沉积的第一层阻挡金属（M）; （b）第二层氧填充阻隔金属（MOx），阻挡金属（MNOx）的氧气氮化物或其组合; （c）通过在氮气存在下通过IMP溅射沉积阻挡金属而沉积的阻挡金属（MNx）的氮化物的第三层; 和（d）通过传统溅射沉积沉积的阻挡金属的第四润湿层。阻挡金属的第一层可以任意地退火以形成阻挡金属（MSi2）的硅化物，以便降低可能导致触点过蚀刻的硅和金属/导体的接触电阻和相互扩散。可以可选地在第二氧填充层和第三阻挡金属氮化物层之间沉积另外的阻挡金属层，以便进一步改善阻挡层结构的阻挡性能并提供更好的金属/导体填充。在通过金属/导体填充通孔之前，可以通过“长抛”溅射沉积将薄的金属/导体层沉积在接触孔的壁上，以便提供更均匀的填充。本文公开了本发明的阻挡层结构的溅射沉积的最佳工艺条件。

3. 发明授权

US5985759A Oxygen enhancement of ion metal plasma (IMP) sputter deposited barrier layers 失效
标题翻译：离子金属等离子体（IMP）的氧增强溅射沉积的阻挡层
公开(公告)号：US5985759A
公开(公告)日：1999-11-16
申请号：US28946
申请日：1998-02-24
申请人： Edwin Kim , Michael Nam , Chris Cha , Gongda Yao , Sophia Lee , Fernand Dorleans , Gene Y. Kohara , Jianming Fu
发明人： Edwin Kim , Michael Nam , Chris Cha , Gongda Yao , Sophia Lee , Fernand Dorleans , Gene Y. Kohara , Jianming Fu
IPC分类号： C23C14/06 , C23C14/08 , C23C14/18 , C23C14/32 , H01L21/285 , H01L21/768 , H01L21/4763
CPC分类号： H01L21/76856 , C23C14/0641 , C23C14/0676 , C23C14/083 , C23C14/185 , C23C14/32 , H01L21/2855 , H01L21/76843 , H01L21/76846 , H01L21/28518 , H01L21/76855
摘要： The present disclosure pertains to our discovery that depositing various film layers in a particular order using a combination of Ion Metal Plasma (IMP) and traditional sputter deposition techniques with specific process conditions results in a barrier layer structure which provides excellent barrier properties and allows for metal/conductor filling of contact sizes down to 0.25 micron and smaller without junction spiking. Specifically, the film layers are deposited on a substrate in the following order: (a) a first layer of a barrier metal (M), deposited by IMP sputter deposition; (b) a second layer of an oxygen-stuffed barrier metal (MOx), an oxygen-stuffed nitride of a barrier metal (MNOx), or a combination thereof; (c) a third layer of a nitride of a barrier metal (MN.sub.x), deposited by IMP sputter deposition of the barrier metal in the presence of nitrogen; and (d) a fourth, wetting layer of a barrier metal, deposited by traditional sputter deposition. The first layer of barrier metal can optionally be annealed to form a silicide of the barrier metal (MSi.sub.2) in order to reduce contact resistance and interdiffusion of the silicon and metal/conductor which may result form overetching of contacts. An additional layer of barrier metal can optionally be deposited between the second oxygen-stuffed layer and the third barrier metal nitride layer in order to further improve the barrier properties of the barrier layer structure and to provide for better metal/conductor fill. A thin layer of metal/conductor may be deposited on the walls of the contact via by "long throw" sputter deposition prior to filling the via with metal/conductor in order to provide more uniform fill. The optimum process conditions for sputter deposition of the barrier layer structure of the invention are disclosed herein.
摘要翻译：本公开涉及我们的发现，使用离子金属等离子体（IMP）和具有特定工艺条件的传统溅射沉积技术的组合以特定顺序沉积各种膜层导致阻挡层结构，其提供优异的阻隔性能并允许金属 /导体填充接触尺寸低至0.25微米及更小，无接头尖峰。具体地，以下列顺序将膜层沉积在衬底上：（a）通过IMP溅射沉积沉积的第一层阻挡金属（M）; （b）第二层氧填充阻隔金属（MOx），阻挡金属（MNOx）的氧气氮化物或其组合; （c）通过在氮气存在下通过IMP溅射沉积阻挡金属而沉积的阻挡金属（MNx）的氮化物的第三层; 和（d）通过传统溅射沉积沉积的阻挡金属的第四润湿层。阻挡金属的第一层可以任意地退火以形成阻挡金属（MSi2）的硅化物，以便降低可能导致触点过蚀刻的硅和金属/导体的接触电阻和相互扩散。可以可选地在第二氧填充层和第三阻挡金属氮化物层之间沉积另外的阻挡金属层，以便进一步改善阻挡层结构的阻挡性能并提供更好的金属/导体填充。在通过金属/导体填充通孔之前，可以通过“长抛”溅射沉积将薄的金属/导体层沉积在接触孔的壁上，以便提供更均匀的填充。本文公开了本发明的阻挡层结构的溅射沉积的最佳工艺条件。

4. 发明授权

US06448657B1 Structure for reducing junction spiking through a wall surface of an overetched contact via 失效
公开(公告)号：US06448657B1
公开(公告)日：2002-09-10
申请号：US09692911
申请日：2000-10-19
申请人： Fernand Dorleans
发明人： Fernand Dorleans
IPC分类号： H01L2941
CPC分类号： H01L21/76843 , H01L21/2855 , H01L21/76805 , H01L21/76831 , H01L21/76876 , H01L21/76877 , H01L23/485 , H01L2924/0002 , H01L2924/00
摘要： The present invention pertains to a semiconductor device microstructure, and to a method of forming that microstructure, which reduces or prevents junction spiking and to a method of forming that microstructure. In particular, a semiconductor contact microstructure comprises a feature which includes a silicon base and at least one sidewall extending upward from the silicon base. The sidewall includes a silicon portion in contact with the silicon base, where the height of the silicon portion of the sidewall above the silicon base is typically less than about 0.5 &mgr;m. The sidewall also includes at least one portion which comprises a first dielectric material which is in contact with (and typically extends upward from) the silicon portion of the sidewall. Overlying at least the silicon portion of the sidewall is a layer of a second dielectric material, preferably silicon oxide. Typically, a diffusion barrier layer overlies the silicon base, the layer of second dielectric material, and at least part of the sidewall portion which is comprised of the first dielectric material. The method comprises the steps of: a) providing a semiconductor device feature which includes a silicon base and at least one sidewall extending upward from the silicon base, where the sidewall includes at least one silicon portion in contact with the silicon base, and another portion comprising a first dielectric material which is in contact with the silicon portion of the sidewall; and b) creating a layer of a second dielectric material, preferably silicon oxide, over the at least one silicon sidewall portion. The method may include additional steps: c) sputter etching to remove dielectric material from the surface of the silicon base; and d) applying a diffusion barrier material over the silicon base, the layer of second dielectric material, and at least a portion of the sidewall comprising the first dielectric material. Typically, both the first and second dielectric materials are silicon oxide.

5. 发明授权

US5599725A Method for fabricating a MOS transistor with two-layer inverse-T tungsten gate structure 失效
标题翻译：用于制造具有双层逆T钨栅极结构的MOS晶体管的方法
公开(公告)号：US5599725A
公开(公告)日：1997-02-04
申请号：US346210
申请日：1994-11-22
申请人： Fernand Dorleans , Liang-Choo Hsia , Louis L. C. Hsu , Gerald R. Larsen , Geraldine C. Schwartz
发明人： Fernand Dorleans , Liang-Choo Hsia , Louis L. C. Hsu , Gerald R. Larsen , Geraldine C. Schwartz
IPC分类号： H01L29/43 , H01L21/225 , H01L21/28 , H01L21/3213 , H01L21/336 , H01L29/78 , H01L21/8234
CPC分类号： H01L29/66575 , H01L21/2256 , H01L21/28079 , H01L21/28114 , H01L21/32134 , H01L21/32136 , H01L29/6656
摘要： The present invention is directed to a unique method for fabricating a silicon based MOS transistor having an inverse-T refractory metal gate structure. The gate fabricated according to this invention comprises a main CVD tungsten portion and a lower sputtered tungsten portion outwardly extending from the bottom of the CVD portion such that a cross section of the gate appears as an inverted "T". A Cl.sub.2 /O.sub.2 plasma etch is used to etch the CVD tungsten layer and a chemical etch is used to etch the sputtered tungsten layer to form the gate electrode. It has been discovered that sputtered tungsten is more resistant to Cl.sub.2 /O.sub.2 reactive ion etch than is CVD tungsten. The sputtered tungsten layer acts as a shield to protect the underlying gate oxide layer from ion damage throughout the fabrication process.
摘要翻译：本发明涉及一种用于制造具有逆T难熔金属栅极结构的硅基MOS晶体管的独特方法。根据本发明制造的门包括主CVD钨部分和从CVD部分的底部向外延伸的下溅射钨部分，使得栅极的横截面呈现为倒置的“T”。使用Cl2 / O2等离子体蚀刻来蚀刻CVD钨层，并且使用化学蚀刻来蚀刻溅射的钨层以形成栅电极。已经发现，溅射钨比CVD钨更耐Cl2 / O2反应离子蚀刻。溅射的钨层用作屏蔽，以在整个制造过程中保护底层的栅极氧化物层免受离子损伤。

6. 发明授权

US5763851A Slotted RF coil shield for plasma deposition system 失效
标题翻译：用于等离子体沉积系统的开槽RF线圈屏蔽
公开(公告)号：US5763851A
公开(公告)日：1998-06-09
申请号：US676599
申请日：1996-07-03
申请人： John Forster , Aihua Chen , Howard Grunes , Robert B. Lowrance , Ralf Hofmann , Zheng Xu , Fernand Dorleans
发明人： John Forster , Aihua Chen , Howard Grunes , Robert B. Lowrance , Ralf Hofmann , Zheng Xu , Fernand Dorleans
IPC分类号： H01J37/32 , B23K10/00
CPC分类号： H01J37/32477 , H01J37/321 , Y10S156/916
摘要： A coil shield assembly for an RF field coil in a plasma processing system includes a first shield positioned inside the coil. The first shield has a central opening substantially surrounding a central space of a processing chamber in which the plasma is maintained. At least one slot is formed in the first shield and extends therethrough. A barrier is positioned between the first shield and the coil and spaced apart from the first shield near the at least one slot. The slot permits an RF signal from the coil to couple with the plasma, and the first shield and the barrier are structured and arranged to prevent plasma ions or sputtered material from bombarding the coil by a direct path from the central space and through the at least one slot.
摘要翻译：用于等离子体处理系统中的RF场线圈的线圈屏蔽组件包括位于线圈内部的第一屏蔽件。第一屏蔽件具有基本上围绕处理室的中心空间的中心开口，其中维持等离子体。在第一屏蔽件中形成至少一个槽，并延伸穿过其中。屏障位于第一屏蔽和线圈之间，并且在靠近至少一个槽的位置处与第一屏蔽隔开。该槽允许来自线圈的RF信号与等离子体耦合，并且第一屏蔽和屏障被构造和布置成防止等离子体离子或溅射材料通过从中心空间的直接路径至少通过至少一个槽

7. 发明授权

US5633522A CMOS transistor with two-layer inverse-T tungsten gate 失效
标题翻译： CMOS晶体管具有双层反T钨栅极
公开(公告)号：US5633522A
公开(公告)日：1997-05-27
申请号：US648457
申请日：1996-05-15
申请人： Fernand Dorleans , Liang-Choo Hsia , Louis L. C. Hsu , Gerald R. Larsen , Geraldine C. Schwartz
发明人： Fernand Dorleans , Liang-Choo Hsia , Louis L. C. Hsu , Gerald R. Larsen , Geraldine C. Schwartz
IPC分类号： H01L29/43 , H01L21/225 , H01L21/28 , H01L21/3213 , H01L21/336 , H01L29/78 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113
CPC分类号： H01L29/66575 , H01L21/2256 , H01L21/28079 , H01L21/28114 , H01L21/32134 , H01L21/32136 , H01L29/6656
摘要： The present invention is directed to a unique silicon based MOS transistor having an inverse-T refractory metal gate structure. The gate fabricated according to this invention comprises a main CVD tungsten portion and a lower sputtered tungsten portion outwardly extending from the bottom of the CVD portion such that a cross section of the gate appears as an inverted "T". A Cl.sub.2 /O.sub.2 plasma etch is used to etch the CVD tungsten layer and a chemical etch is used to etch the sputtered tungsten layer to form the gate electrode. It has been discovered that sputtered tungsten is more resistant to Cl.sub.2 /O.sub.2 reactive ion etch than is CVD tungsten. The sputtered tungsten layer acts as a shield to protect the underlying gate oxide layer from ion damage throughout the fabrication process.
摘要翻译：本发明涉及一种具有逆T难熔金属栅极结构的独特的硅基MOS晶体管。根据本发明制造的门包括主CVD钨部分和从CVD部分的底部向外延伸的下溅射钨部分，使得栅极的横截面呈现为倒置的“T”。使用Cl2 / O2等离子体蚀刻来蚀刻CVD钨层，并且使用化学蚀刻来蚀刻溅射的钨层以形成栅电极。已经发现，溅射钨比CVD钨更耐Cl2 / O2反应离子蚀刻。溅射的钨层用作屏蔽，以在整个制造过程中保护底层的栅极氧化物层免受离子损伤。

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