会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明申请
    • SCANNING SYSTEM FOR LIDAR
    • 激光雷达扫描系统
    • US20100053715A1
    • 2010-03-04
    • US12447937
    • 2007-10-30
    • James O'NeillWilliam T. MooreKevin WilliamsRobert Bruce
    • James O'NeillWilliam T. MooreKevin WilliamsRobert Bruce
    • G02B26/12G02B26/10
    • G02B26/105G01S7/4817
    • The present invention relates to a scanning system optimized for lidar that includes a nodding mirror, a rotary electromagnetic drive, a rotary optical encoder, and control circuitry. The rotary electromagnetic drive includes a yoke incorporating a permanent magnet, and an arm having a coil at one end of the arm. The coil is enclosed within the yoke, and an opposite end of the arm is coupled to the nodding mirror, such that movement of the coil within the yoke in response to a current causes the nodding mirror to rotate. The rotary optical encoder produces an output signal in response to rotation of the nodding mirror, which serves as feedback to the control circuitry. The control circuitry adjusts the current provided to the rotary electromagnetic drive in response to the output signal, such that the nodding mirror rotates in a reference scan pattern.
    • 本发明涉及一种针对激光雷达优化的扫描系统,其包括点头镜,旋转电磁驱动器,旋转光学编码器和控制电路。 旋转电磁驱动器包括一个包含永磁体的磁轭和一个在臂的一端具有线圈的臂。 线圈被包围在轭内,并且臂的相对端联接到点头镜,使得响应于电流使线圈在轭内的运动导致点头镜旋转。 旋转光学编码器响应于点控反射镜的旋转而产生输出信号,其作为对控制电路的反馈。 控制电路响应于输出信号调节提供给旋转电磁驱动器的电流,使得点头镜以参考扫描图案旋转。
    • 2. 发明授权
    • Scanning system for lidar
    • 激光雷达扫描系统
    • US08072663B2
    • 2011-12-06
    • US12447937
    • 2007-10-30
    • James O'NeillWilliam T. MooreKevin WilliamsRobert Bruce
    • James O'NeillWilliam T. MooreKevin WilliamsRobert Bruce
    • G02B26/08
    • G02B26/105G01S7/4817
    • The present invention relates to a scanning system optimized for lidar that includes a nodding mirror, a rotary electromagnetic drive, a rotary optical encoder, and control circuitry. The rotary electromagnetic drive includes a yoke incorporating a permanent magnet, and an arm having a coil at one end of the arm. The coil is enclosed within the yoke, and an opposite end of the arm is coupled to the nodding mirror, such that movement of the coil within the yoke in response to a current causes the nodding mirror to rotate. The rotary optical encoder produces an output signal in response to rotation of the nodding mirror, which serves as feedback to the control circuitry. The control circuitry adjusts the current provided to the rotary electromagnetic drive in response to the output signal, such that the nodding mirror rotates in a reference scan pattern.
    • 本发明涉及一种针对激光雷达优化的扫描系统,其包括点头镜,旋转电磁驱动器,旋转光学编码器和控制电路。 旋转电磁驱动器包括一个包含永磁体的磁轭和一个在臂的一端具有线圈的臂。 线圈被包围在轭内,并且臂的相对端联接到点头镜,使得响应于电流使线圈在轭内的运动导致点头镜旋转。 旋转光学编码器响应于点控反射镜的旋转而产生输出信号,其作为对控制电路的反馈。 控制电路响应于输出信号调节提供给旋转电磁驱动器的电流,使得点头镜以参考扫描图案旋转。
    • 3. 发明授权
    • Computer having multiple address ports, each having logical address
translation with base and limit memory management
    • 具有多个地址端口的计算机,每个地址端口具有基本的逻辑地址转换和限制存储器管理
    • US6012135A
    • 2000-01-04
    • US347964
    • 1994-12-01
    • George W LeedomWilliam T. Moore
    • George W LeedomWilliam T. Moore
    • G06F12/02G06F12/00
    • G06F12/0292
    • Method and apparatus for a logical address translator which translates a logical address into a physical address in a computer. The computer includes a plurality of address ports. Each address port includes a logical address translator, which includes a plurality of segment-register sets. Each segment-register set holds values which specify address boundaries and translation mapping of a corresponding logical segment. A segment detector is coupled to the plurality of segment-register sets, wherein the segment detector operates to determine whether the logical address is within the specified address boundaries of the logical segment. An address mapper is coupled to the plurality of segment-register sets, wherein the address mapper operates to translate the logical address into a physical address. A translation controller is connected to the segment detector and the address translator, wherein the translation controller operates to output the physical address if the segment detector determines that the logical address is within the specified address boundaries of the logical segment. One embodiment of the segment-register set includes a base address, a limit address, and a physical mapping bias. One embodiment of the computer includes a plurality of address ports, wherein each address port includes a logical address translator.
    • 逻辑地址转换器的方法和装置,其将逻辑地址转换成计算机中的物理地址。 计算机包括多个地址端口。 每个地址端口包括逻辑地址转换器,其包括多个段寄存器集合。 每个段寄存器组保存指定相应逻辑段的地址边界和转换映射的值。 段检测器耦合到多个段寄存器集合,其中段检测器操作以确定逻辑地址是否在逻辑段的指定地址边界内。 地址映射器耦合到多个段寄存器集合,其中地址映射器操作以将逻辑地址转换为物理地址。 翻译控制器连接到段检测器和地址转换器,其中如果段检测器确定逻辑地址在逻辑段的指定地址边界内,则翻译控制器操作以输出物理地址。 段寄存器集合的一个实施例包括基地址,限制地址和物理映射偏置。 计算机的一个实施例包括多个地址端口,其中每个地址端口包括逻辑地址转换器。
    • 5. 发明授权
    • Apparatus and method for improved vector processing to support extended-length integer arithmetic
    • 用于改进矢量处理以支持扩展长整数运算的装置和方法
    • US06295597B1
    • 2001-09-25
    • US09132205
    • 1998-08-11
    • David ResnickWilliam T. Moore
    • David ResnickWilliam T. Moore
    • G06F1500
    • G06F7/505G06F7/50G06F15/8076G06F2207/386
    • An apparatus and a method for extended-precision vector arithmetic capable of extremely long precision (i.e., precision to as many bits as a user desires or is limited to due to memory, disk-storage, or other resource constraints). Vector carry-out bits can be used as vector carry-in bits for successive operations. In performing add or subtract operations on integers that are longer than the word size of the computer, the operands a broken into word-sized parts which are used as operands. A vector of long-integer numbers is thus broken into a series of sub-vectors, each having word-sized elements. Vector add or subtract operations are performed successively on the sub-vectors, starting with the lowest-order sub-vectors. Carry-out (or borrow-out) bits from a first vector operation are used as carry-in (or borrow-in) bits for a successive vector operation. In one embodiment, instructions are added to the instruction set of a vector processor to assist in propagating carry (or borrow) bits between components of long operands, and to assist users in accessing and controlling the carry (or borrow) bits.
    • 一种用于扩展精度矢量运算的装置和方法,其能够非常长的精度(即,精度达到用户期望的位数或由于存储器,磁盘存储或其他资源约束而被限制)。 向量进位位可用作连续操作的向量进位位。 在对长于计算机的字大小的整数执行加法或减法操作时,操作数被分解成用作操作数的字大小的部分。 因此,长整数的向量被分解成一系列子向量,每个子向量具有字大小的元素。 在子向量上连续执行矢量加减运算,从最低阶子向量开始。 从第一个矢量运算的进位(或借出)位用作连续矢量运算的进位(或借位)位。 在一个实施例中,将指令添加到向量处理器的指令集中以辅助在长操作数的组件之间传播进位(或借位)位,并且帮助用户访问和控制进位(或借位)位。
    • 6. 发明授权
    • Associative scalar data cache with write-through capabilities for a
vector processor
    • 关联标量数据缓存,具有向量处理器的直写功能
    • US5717895A
    • 1998-02-10
    • US348056
    • 1994-12-01
    • George W. LeedomWilliam T. Moore
    • George W. LeedomWilliam T. Moore
    • G06F12/08
    • G06F9/3013G06F12/0875G06F12/0888G06F9/30109G06F9/30138G06F9/3824
    • Method and apparatus for a scalar data cache in a scalar/vector supercomputer. The scalar data cache comprises a cache array and a cache controller. The cache array comprises a plurality of cache frames; each cache frame comprises a plurality of cache lines; and each cache line comprises a plurality of data words. The cache controller performs a broadside compare of the reference address against all addresses held in the cache, and translates the reference address into a cache-array address. For each cache line, there is a corresponding cache-line validity indication which is set "valid" only when every data word in the cache line contains valid data. A cache-line validity comparator operates to provide a cache-line-hit indication if a data word requested is in a valid cache line. A cache-load controller is described for loading data from a common memory into every data word of a cache line and for marking the cache line "valid". For at least one of the plurality of scalar registers, a cache accessor is described for providing fetch access to the data words in the cache array, and for providing write-through-cache capability to the data words in the cache array.
    • 标量/向量超级计算机中的标量数据缓存的方法和装置。 标量数据高速缓存包括高速缓存阵列和高速缓存控制器。 高速缓存阵列包括多个缓存帧; 每个缓存帧包括多个高速缓存行; 并且每个高速缓存行包括多个数据字。 高速缓存控制器执行参考地址与保存在高速缓存中的所有地址的宽边比较,并将参考地址转换为高速缓存阵列地址。 对于每个高速缓存行,只有当高速缓存行中的每个数据字都包含有效数据时,才有一个对应的高速缓存线有效性指示被设置为“有效”。 如果请求的数据字在有效的高速缓存行中,则高速缓存行有效性比较器用于提供高速缓存行命中指示。 描述了缓存负载控制器,用于将数据从公共存储器加载到高速缓存行的每个数据字中,并用于标记高速缓存行“有效”。 对于多个标量寄存器中的至少一个,描述了高速缓存存取器,用于提供对高速缓存阵列中的数据字的取出访问,以及用于向缓存阵列中的数据字提供直写缓存能力。
    • 7. 发明授权
    • Imaging apparatus
    • 成像设备
    • US4924094A
    • 1990-05-08
    • US27978
    • 1987-03-19
    • William T. Moore
    • William T. Moore
    • H04N5/33
    • H04N5/33
    • Conventional scanners used in thermal imagers scan the image along curved lines rather than straight lines, resulting in image curvature in the display. The invention eliminates this by processing the video signal from the scanner to compose an output video signal which represents scanning along straight lines (18) across the image. The output signal is composed of a number of successive portions (A to F) each derived from a different line or lines of the video signal provided by the scanner.
    • 热成像仪中使用的常规扫描仪沿着曲线而不是直线扫描图像,导致显示屏中的图像曲率。 本发明通过处理来自扫描仪的视频信号来消除这一点,以构成一个输出视频信号,该输出视频信号表示跨越图像的直线(18)的扫描。 输出信号由多个连续部分(A至F)组成,每个部分由扫描器提供的视频信号的不同行或行导出。