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1. 发明申请

US20150162381A1 ADDRESSABLE SIOX MEMORY ARRAY WITH INCORPORATED DIODES 有权
标题翻译：可寻址的存储器阵列与入射二极管
公开(公告)号：US20150162381A1
公开(公告)日：2015-06-11
申请号：US14240973
申请日：2012-08-27
申请人： James M. Tour , Jun Yao , Jian Lin , Gunuk Wang , Krishna Palem
发明人： James M. Tour , Jun Yao , Jian Lin , Gunuk Wang , Krishna Palem
IPC分类号： H01L27/24 , H01L29/66 , H01L45/00
CPC分类号： H01L27/2463 , H01L27/2409 , H01L29/66136 , H01L29/66143 , H01L29/8611 , H01L29/8613 , H01L29/872 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/1608 , H01L45/1616 , H01L45/1625 , H01L45/1675
摘要： Various embodiments of the resistive memory cells and arrays discussed herein comprise: (1) a first electrode; (2) a second electrode; (3) resistive memory material; and (4) a diode. The resistive memory material is selected from the group consisting of SiOx, SiOxH, SiOxNy, SiOxNyH, SiOxCz, SiOxCzH, and combinations thereof, wherein each of x, y and z are equal or greater than 1 or equal or less than 2. The diode may be any suitable diode, such as n-p diodes, p-n diodes, and Schottky diodes.
摘要翻译：本文讨论的电阻式存储器单元和阵列的各种实施例包括：（1）第一电极; （2）第二电极; （3）电阻记忆材料; 和（4）二极管。电阻性存储材料选自SiOx，SiOxH，SiOxNy，SiOxNyH，SiOxCz，SiOxCzH及其组合，其中x，y和z各自等于或大于1或等于或小于2.二极管可以是任何合适的二极管，例如np二极管，pn二极管和肖特基二极管。

2. 发明申请

US20160276411A1 ADDRESSABLE SIOX MEMORY ARRAY WITH INCORPORATED DIODES 审中-公开
标题翻译：可寻址的存储器阵列与入射二极管
公开(公告)号：US20160276411A1
公开(公告)日：2016-09-22
申请号：US15171196
申请日：2016-06-02
申请人： James M. Tour , Jun Yao , Jian Lin , Gunuk Wang , Krishna Palem
发明人： James M. Tour , Jun Yao , Jian Lin , Gunuk Wang , Krishna Palem
IPC分类号： H01L27/24 , H01L29/872 , H01L29/861 , H01L45/00
CPC分类号： H01L27/2463 , H01L27/2409 , H01L29/66136 , H01L29/66143 , H01L29/8611 , H01L29/8613 , H01L29/872 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/1608 , H01L45/1616 , H01L45/1625 , H01L45/1675
摘要： Various embodiments of the resistive memory cells and arrays discussed herein comprise: (1) a first electrode; (2) a second electrode; (3) resistive memory material; and (4) a diode. The resistive memory material is selected from the group consisting of SiOx, SiOxNy, SiOxNyH, SiOxCz, SiOxCzH, and combinations thereof, wherein each of x, y and z are equal or greater than 1 or equal or less than 2. The diode may be any suitable diode, such as n-p diodes, p-n diodes, and Schottky diodes.
摘要翻译：本文讨论的电阻式存储器单元和阵列的各种实施例包括：（1）第一电极; （2）第二电极; （3）电阻记忆材料; 和（4）二极管。电阻性存储材料选自SiO x，SiO x N y，SiO x N y H，SiO x C z，SiO x C z H及其组合，其中x，y和z中的每一个等于或大于1或等于或小于2.二极管可以是任何合适的二极管，例如np二极管，pn二极管和肖特基二极管。

3. 发明授权

US09385163B2 Addressable SiOX memory array with incorporated diodes 有权
标题翻译：可寻址的SiOX存储器阵列，并入二极管
公开(公告)号：US09385163B2
公开(公告)日：2016-07-05
申请号：US14240973
申请日：2012-08-27
申请人： James M. Tour , Jun Yao , Jian Lin , Gunuk Wang , Krishna Palem
发明人： James M. Tour , Jun Yao , Jian Lin , Gunuk Wang , Krishna Palem
IPC分类号： H01L45/02 , H01L27/24 , H01L45/00 , H01L29/66 , H01L29/861 , H01L29/872
CPC分类号： H01L27/2463 , H01L27/2409 , H01L29/66136 , H01L29/66143 , H01L29/8611 , H01L29/8613 , H01L29/872 , H01L45/04 , H01L45/1233 , H01L45/1253 , H01L45/145 , H01L45/1608 , H01L45/1616 , H01L45/1625 , H01L45/1675
摘要： Various embodiments of the resistive memory cells and arrays discussed herein comprise: (1) a first electrode; (2) a second electrode; (3) resistive memory material; and (4) a diode. The resistive memory material is selected from the group consisting of SiOx, SiOxH, SiOxNy, SiOxNyH, SiOxCz, SiOxCzH, and combinations thereof, wherein each of x, y and z are equal to or greater than 1 and equal to or less than 2. The diode may be any suitable diode, such as n-p diodes, p-n diodes, and Schottky diodes.
摘要翻译：本文讨论的电阻式存储器单元和阵列的各种实施例包括：（1）第一电极; （2）第二电极; （3）电阻记忆材料; 和（4）二极管。电阻性存储材料选自SiO x，SiO x H，SiO x N y，SiO x N y H，SiO x C z，SiO x C z H及其组合，其中x，y和z各自等于或大于1且等于或小于2。二极管可以是任何合适的二极管，例如np二极管，pn二极管和肖特基二极管。

4. 发明申请

US20200256679A2 CAMERA-BASED POSITIONING SYSTEM USING LEARNING 审中-公开
公开(公告)号：US20200256679A2
公开(公告)日：2020-08-13
申请号：US16327900
申请日：2017-08-28
申请人： Anshumali Shrivastava , Chen Luo , Krishna Palem , Yongshik Moon , Soonhyun Noh , Daedong Park , Seongsoo Hong
发明人： Anshumali Shrivastava , Chen Luo , Krishna Palem , Yongshik Moon , Soonhyun Noh , Daedong Park , Seongsoo Hong
IPC分类号： G01C21/20 , G06T7/73 , G06K9/62 , G06N20/00 , G06F16/51 , G06F16/532
摘要： A device, system, and methods are described to perform machine-learning camera-based indoor mobile positioning. The indoor mobile positioning may utilize inexact computing, wherein a small decrease in accuracy is used to obtain significant computational efficiency. Hence, the positioning may be performed using a smaller memory overhead at a faster rate and with lower energy cost than previous implementations. The positioning may not involve any communication (or data transfer) with any other device or the cloud, providing privacy and security to the device. A hashing-based image matching algorithm may be used which is cheaper, both in energy and computation cost, over existing state-of-the-art matching techniques. This significant reduction allows end-to-end computation to be performed locally on the mobile device. The ability to run the complete algorithm on the mobile device may eliminate the need for the cloud, resulting in a privacy-preserving localization algorithm by design since network communication with other devices may not be required.

5. 发明申请

US20050240787A1 Probabilistic and introverted switching to conserve energy in a digital system 有权
标题翻译：概率和内向的转换，以节省数字系统的能量
公开(公告)号：US20050240787A1
公开(公告)日：2005-10-27
申请号：US11115651
申请日：2005-04-27
申请人： Krishna Palem , Suresh Cheemalavagu , Pinar Korkmaz , Bilge Akgul
发明人： Krishna Palem , Suresh Cheemalavagu , Pinar Korkmaz , Bilge Akgul
IPC分类号： G06F1/26 , G06F1/32
CPC分类号： G06F1/32
摘要： A processor having binary switches is configured to operate at a predetermined probability value that the logical value of each switch is correct. A supply voltage is coupled to the binary switches. A randomized signal detector is configured to detect a randomized signal, which may be amplified to a predetermined level if the randomized signal is low. A computing element outputs a probabilistic binary bit having a 0 or 1 with a predetermined probability value of being correct in correspondence with the supply voltage and/or an amplification level of a noise signal. Subsequently, an application executed by the processor receives the probabilistic binary bit for one or more additional operations. By operating on the probabilistic binary bits instead of conventional deterministic bits, the processor consumes less energy and completes its execution faster. For battery-powered portable electronic devices, use of processor configured for probabilistic binary bits substantially lengthens battery life.
摘要翻译：具有二进制开关的处理器被配置为以每个开关的逻辑值正确的预定概率值运行。电源电压耦合到二进制开关。随机化信号检测器被配置为检测随机化信号，如果随机信号为低，则其可被放大到预定水平。计算元件根据噪声信号的电源电压和/或放大电平输出具有0或1的概率二进制位，其中预定概率值是正确的。随后，由处理器执行的应用接收一个或多个附加操作的概率二进制位。通过对概率二进制位进行操作而不是传统的确定性位，处理器消耗更少的能量并更快地完成其执行。对于电池供电的便携式电子设备，使用配置为概率二进制位的处理器可大大延长电池寿命。

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