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1. 发明申请

US20160086852A1 PROXIMITY CONTACT COVER RING FOR PLASMA DICING 审中-公开
标题翻译：用于等离子体定位的接头盖
公开(公告)号：US20160086852A1
公开(公告)日：2016-03-24
申请号：US14491856
申请日：2014-09-19
申请人： James M. Holden , Alexander N. Lerner , Ajay Kumar , Aparna Iyer , Alan Hiroshi Ouye
发明人： James M. Holden , Alexander N. Lerner , Ajay Kumar , Aparna Iyer , Alan Hiroshi Ouye
IPC分类号： H01L21/78 , H01J37/32 , H01L21/67 , H01L21/683 , H01L21/3065 , H01L21/308
摘要： Methods of and carriers for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a cover ring for protecting a carrier and substrate assembly during an etch process includes an inner opening having a diameter smaller than the diameter of a substrate of the carrier and substrate assembly. An outer frame surrounds the inner opening. The outer frame has a bevel for accommodating an outermost portion of the substrate of the carrier and substrate assembly.
摘要翻译：描述了半导体晶片切割的方法和载体，每个晶片具有多个集成电路。在一个示例中，用于在蚀刻工艺期间保护载体和基底组件的盖环包括直径小于载体和基底组件的基底的直径的内部开口。外框围绕内开口。外框架具有用于容纳载体和基底组件的基底的最外部分的斜面。

2. 发明申请

US20160133519A1 TRANSFER ARM FOR FILM FRAME SUBSTRATE HANDLING DURING PLASMA SINGULATION OF WAFERS 审中-公开
标题翻译：用于膜片等离子体处理的薄膜框架基底处理的转移臂
公开(公告)号：US20160133519A1
公开(公告)日：2016-05-12
申请号：US14536318
申请日：2014-11-07
申请人： James M. Holden , Alexander N. Lerner , Ajay Kumar , Brad Eaton , Aparna Iyer
发明人： James M. Holden , Alexander N. Lerner , Ajay Kumar , Brad Eaton , Aparna Iyer
IPC分类号： H01L21/78 , H01L21/677 , H01L21/67 , H01L21/683 , H01L21/3065 , H01L21/308
摘要： Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a plasma etch apparatus includes a plasma etch chamber. The plasma etch chamber includes a plasma source disposed in an upper region of the plasma etch chamber, a cathode assembly disposed below the plasma source, and a support pedestal for supporting a substrate carrier below the plasma source. The plasma etch apparatus also includes a transfer chamber coupled to the plasma etch chamber. The transfer chamber includes a transfer arm for supporting a substantial portion of a dicing tape of the substrate carrier, the transfer arm configured to transfer a sample from the support pedestal following an etch singulation process.
摘要翻译：对具有多个集成电路的各晶片的切割半导体晶片的方法和装置进行说明。在一个示例中，等离子体蚀刻装置包括等离子体蚀刻室。等离子体蚀刻室包括设置在等离子体蚀刻室的上部区域中的等离子体源，设置在等离子体源下方的阴极组件和用于在等离子体源下方支撑衬底载体的支撑座。等离子体蚀刻装置还包括耦合到等离子体蚀刻室的传送室。传送室包括用于支撑基板载体的切割带的主要部分的传送臂，传送臂被配置为在蚀刻切割处理之后从支撑基座传送样品。

3. 发明授权

US08999816B1 Pre-patterned dry laminate mask for wafer dicing processes 有权
标题翻译：用于晶片切割工艺的预先图案化的干式层压板
公开(公告)号：US08999816B1
公开(公告)日：2015-04-07
申请号：US14256429
申请日：2014-04-18
申请人： James M. Holden , Aparna Iyer , Brad Eaton , Ajay Kumar
发明人： James M. Holden , Aparna Iyer , Brad Eaton , Ajay Kumar
IPC分类号： H01L21/00 , H01L21/78
CPC分类号： H01L21/78
摘要： Approaches for protecting a wafer during plasma etching wafer dicing processes are described. In an example, a method of dicing a semiconductor wafer with a front surface having a plurality of integrated circuits thereon involves laminating a pre-patterned mask on the front surface of the semiconductor wafer. The pre-patterned mask covers the integrated circuits and exposes streets between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the streets to singulate the integrated circuits. The pre-patterned mask protects the integrated circuits during the plasma etching.
摘要翻译：描述了在等离子体蚀刻晶片切割工艺期间保护晶片的方法。在一个实例中，一种在其上具有多个集成电路的前表面上切割半导体晶片的方法包括在半导体晶片的前表面上层压预先图案化的掩模。预先图案化的掩模覆盖集成电路并暴露在集成电路之间的街道。该方法还包括通过街道对半导体晶片进行等离子体蚀刻以对集成电路进行分离。预先图案化的掩模在等离子体蚀刻期间保护集成电路。

4. 发明授权

US09299614B2 Method and carrier for dicing a wafer 有权
标题翻译：用于切割晶片的方法和载体
公开(公告)号：US09299614B2
公开(公告)日：2016-03-29
申请号：US14538126
申请日：2014-11-11
申请人： James M. Holden , Brad Eaton , Aparna Iyer , Ajay Kumar
发明人： James M. Holden , Brad Eaton , Aparna Iyer , Ajay Kumar
IPC分类号： H01L21/78 , H01L21/3065 , H01L21/308 , H01L21/66 , B23Q3/18 , H01L21/304 , H01L21/683 , H01L21/67
CPC分类号： H01L21/78 , B23Q3/18 , H01L21/3043 , H01L21/3065 , H01L21/308 , H01L21/67207 , H01L21/6836 , H01L22/26 , H01L2221/68327 , H01L2221/68377
摘要： Methods of and carriers for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a carrier for supporting a wafer or substrate in an etch process includes a frame having a perimeter surrounding an inner opening. The carrier also includes a tape coupled to the frame and disposed below the inner opening of the frame, the tape comprising an etch stop layer disposed above a support layer.
摘要翻译：描述了半导体晶片切割的方法和载体，每个晶片具有多个集成电路。在一个示例中，用于在蚀刻工艺中支撑晶片或衬底的载体包括具有围绕内部开口的周边的框架。载体还包括耦合到框架并且布置在框架的内部开口下方的带，该带包括设置在支撑层上方的蚀刻停止层。

5. 发明申请

US20150162244A1 METHOD AND CARRIER FOR DICING A WAFER 有权
标题翻译：用于定位波形的方法和载体
公开(公告)号：US20150162244A1
公开(公告)日：2015-06-11
申请号：US14538126
申请日：2014-11-11
申请人： James M. Holden , Brad Eaton , Aparna Iyer , Ajay Kumar
发明人： James M. Holden , Brad Eaton , Aparna Iyer , Ajay Kumar
IPC分类号： H01L21/78 , H01L21/308 , B23Q3/18 , H01L21/66 , H01L21/67 , H01L21/3065 , H01L21/683
CPC分类号： H01L21/78 , B23Q3/18 , H01L21/3043 , H01L21/3065 , H01L21/308 , H01L21/67207 , H01L21/6836 , H01L22/26 , H01L2221/68327 , H01L2221/68377
摘要： Methods of and carriers for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a carrier for supporting a wafer or substrate in an etch process includes a frame having a perimeter surrounding an inner opening. The carrier also includes a tape coupled to the frame and disposed below the inner opening of the frame, the tape comprising an etch stop layer disposed above a support layer.
摘要翻译：描述了半导体晶片切割的方法和载体，每个晶片具有多个集成电路。在一个示例中，用于在蚀刻工艺中支撑晶片或衬底的载体包括具有围绕内部开口的周边的框架。载体还包括耦合到框架并且布置在框架的内部开口下方的带，该带包括设置在支撑层上方的蚀刻停止层。

6. 发明申请

US20150303111A1 DICING WAFERS HAVING SOLDER BUMPS ON WAFER BACKSIDE 有权
标题翻译：具有背面底部的焊接金属柱的抛光轮
公开(公告)号：US20150303111A1
公开(公告)日：2015-10-22
申请号：US14543747
申请日：2014-11-17
申请人： Wei-Sheng Lei , James S. Papanu , Aparna Iyer , Brad Eaton , Ajay Kumar
发明人： Wei-Sheng Lei , James S. Papanu , Aparna Iyer , Brad Eaton , Ajay Kumar
IPC分类号： H01L21/78 , H01L21/3065 , H01L21/268
CPC分类号： H01L21/78 , H01L21/268 , H01L21/3065 , H01L21/6836 , H01L24/05 , H01L24/13 , H01L24/16 , H01L25/0657 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/0401 , H01L2224/05568 , H01L2224/0557 , H01L2224/13025 , H01L2224/16145 , H01L2224/16225 , H01L2224/94 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06565 , H01L2924/12041 , H01L2224/11 , H01L2924/00
摘要： Approaches for hybrid laser scribe and plasma etch dicing process for a wafer having backside solder bumps are described. For example, a method of dicing a semiconductor wafer having integrated circuits on a front side thereof and corresponding arrays of metal bumps on a backside thereof involves applying a dicing tape to the backside of the semiconductor wafer, the dicing tape covering the arrays of metal bumps. The method also involves, subsequently, forming a mask on the front side of the semiconductor wafer, the mask covering the integrated circuits. The method also involves forming scribe lines on the front side of the semiconductor wafer with a laser scribing process, the scribe lines formed in the mask and between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits, the mask protecting the integrated circuits during the plasma etching.
摘要翻译：描述了具有背面焊料凸块的晶片的混合激光划片和等离子体蚀刻切割工艺的方法。例如，在其前侧具有集成电路的半导体晶片的切割方法和背面的金属凸块的相应阵列包括在半导体晶片的背面施加切割带，该切割带覆盖金属凸块的阵列。该方法还包括在半导体晶片的正面上形成掩模，该掩模覆盖集成电路。该方法还涉及通过激光划线工艺在半导体晶片的正面上形成刻划线，在掩模中形成划线并在集成电路之间。该方法还包括通过划线等离子体蚀刻半导体晶片以对集成电路进行分离，掩模在等离子体蚀刻期间保护集成电路。

7. 发明申请

US20150011073A1 LASER SCRIBING AND PLASMA ETCH FOR HIGH DIE BREAK STRENGTH AND SMOOTH SIDEWALL 审中-公开
标题翻译：激光切割和等离子体蚀刻用于高切割强度和平滑面
公开(公告)号：US20150011073A1
公开(公告)日：2015-01-08
申请号：US14293227
申请日：2014-06-02
申请人： Wei-Sheng Lei , Tong Liu , Madhava Rao Yalamanchili , Brad Eaton , Aparna Iyer , Ajay Kumar
发明人： Wei-Sheng Lei , Tong Liu , Madhava Rao Yalamanchili , Brad Eaton , Aparna Iyer , Ajay Kumar
IPC分类号： H01L21/78 , H01L21/3065 , H01L21/67 , H01L21/308
CPC分类号： H01L21/78 , H01L21/3065 , H01L21/3086 , H01L21/67207
摘要： In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation. The laser scribe process may be used to cleanly remove a mask layer, organic and inorganic dielectric layers, and device layers. The laser etch process may then be terminated upon exposure of, or partial etch of, the wafer or substrate. In embodiments, a hybrid plasma etching approach is employed to dice the wafers where an isotropic etch is employed to improve the die sidewall following an anisotropic etch with a plasma based on a combination of NF3 and CF4. The isotropic etch removes anisotropic etch byproducts, roughness, and/or scalloping from the anisotropically etched die sidewalls after die singulation.
摘要翻译：在实施例中，实施涉及初始激光划片和随后的等离子体蚀刻的混合晶片或衬底切割工艺用于裸片切割。激光划片工艺可用于清洁地去除掩模层，有机和无机介电层以及器件层。然后可以在曝光或部分蚀刻晶片或衬底时终止激光蚀刻工艺。在实施例中，使用混合等离子体蚀刻方法来对晶片进行骰子，其中采用各向同性蚀刻来改善基于NF 3和CF 4的组合的等离子体的各向异性蚀刻之后的管芯侧壁。各向同性蚀刻在单片切割之后从各向异性蚀刻的模具侧壁去除各向异性蚀刻副产物，粗糙度和/或扇贝。

8. 发明授权

US08859397B2 Method of coating water soluble mask for laser scribing and plasma etch 有权
标题翻译：用于激光划线和等离子体蚀刻的水溶性掩模涂层方法
公开(公告)号：US08859397B2
公开(公告)日：2014-10-14
申请号：US13917508
申请日：2013-06-13
申请人： Wei-Sheng Lei , Brad Eaton , Aparna Iyer , Todd Egan , Madhava Rao Yalamanchili , Ajay Kumar
发明人： Wei-Sheng Lei , Brad Eaton , Aparna Iyer , Todd Egan , Madhava Rao Yalamanchili , Ajay Kumar
IPC分类号： H01L21/00 , H01L21/311 , H01L21/308 , H01L21/3065 , H01L21/78
CPC分类号： H01L21/82 , H01L21/3065 , H01L21/308 , H01L21/3081 , H01L21/31127 , H01L21/78
摘要： Methods of using a hybrid mask composed of a first water soluble film layer and a second water-soluble layer for wafer dicing using laser scribing and plasma etch described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a hybrid mask above the semiconductor wafer. The hybrid mask is composed of a first water-soluble layer disposed on the integrated circuits, and a second water-soluble layer disposed on the first water-soluble layer. The method also involves patterning the hybrid mask with a laser scribing process to provide a patterned hybrid mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also involves etching the semiconductor wafer through the gaps in the patterned hybrid mask to singulate the integrated circuits.
摘要翻译：使用由第一水溶性薄膜层和第二水溶性层组成的晶片切割的激光划线和等离子体蚀刻的方法。在一个示例中，对具有多个集成电路的半导体晶片进行切割的方法包括在半导体晶片上形成混合掩模。混合掩模由设置在集成电路上的第一水溶性层和设置在第一水溶性层上的第二水溶性层组成。该方法还包括用激光划线工艺图案化混合掩模，以提供具有间隙的图案化混合掩模，暴露集成电路之间的半导体晶片的区域。该方法还包括通过图案化混合掩模中的间隙蚀刻半导体晶片以对集成电路进行分离。

9. 发明申请

US20140179084A1 WAFER DICING FROM WAFER BACKSIDE 有权
标题翻译： WAFER从WAFER BACKSIDE开始
公开(公告)号：US20140179084A1
公开(公告)日：2014-06-26
申请号：US14095824
申请日：2013-12-03
申请人： Wei-Sheng Lei , Brad Eaton , Aparna Iyer , Saravjeet Singh , Madhava Rao Yalamanchili , Ajay Kumar
发明人： Wei-Sheng Lei , Brad Eaton , Aparna Iyer , Saravjeet Singh , Madhava Rao Yalamanchili , Ajay Kumar
IPC分类号： H01L21/822
CPC分类号： H01L21/822 , B23K26/0624 , B23K26/18 , B23K26/364 , B23K26/40 , B23K2103/172 , B23K2103/50 , H01L21/3081 , H01L21/6836 , H01L21/78 , H01L2221/68327 , H01L2221/6834
摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. For example, a method includes applying a protection tape to a wafer front side, the wafer having a dicing tape attached to the wafer backside. The dicing tape is removed from the wafer backside to expose a die attach film disposed between the wafer backside and the dicing tape. Alternatively, if no die attach film is initially disposed between the wafer backside and the dicing tape, a die attach film is applied to the wafer backside at this operation. A water soluble mask is applied to the wafer backside. Laser scribing is performed on the wafer backside to cut through the mask, the die attach film and the wafer, including all layers included within the front side and backside of the wafer. A plasma etch is performed to treat or clean surfaces of the wafer exposed by the laser scribing. A wafer backside cleaning is performed and a second dicing tape is applied to the wafer backside. The protection tape is the removed from the wafer front side.
摘要翻译：对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。例如，一种方法包括将保护带施加到晶片正面，所述晶片具有附接到晶片背面的切割带。切割胶带从晶片背面去除，以露出设置在晶片背面和切割胶带之间的管芯附着膜。或者，如果在晶片背面和切割带之间不设置管芯附着膜，则在该操作中将芯片附着膜施加到晶片背面。将水溶性掩模施加到晶片背面。在晶片背面进行激光划线，以切割掩模，芯片附着膜和晶片，包括包括在晶片的正面和背面内的所有层。执行等离子体蚀刻以处理或清洁由激光划线暴露的晶片的表面。执行晶片背面清洁，并且将第二切割带施加到晶片背面。保护带从晶片正面去除。

10. 发明申请

US20150279739A1 DICING PROCESSES FOR THIN WAFERS WITH BUMPS ON WAFER BACKSIDE 有权
标题翻译：用于在背面放置波纹的薄膜的定位方法
公开(公告)号：US20150279739A1
公开(公告)日：2015-10-01
申请号：US14226038
申请日：2014-03-26
申请人： Wei-Sheng Lei , James S. Papanu , Aparna Iyer , Brad Eaton , Ajay Kumar
发明人： Wei-Sheng Lei , James S. Papanu , Aparna Iyer , Brad Eaton , Ajay Kumar
IPC分类号： H01L21/78 , H01L23/544
CPC分类号： H01L21/78 , H01L21/3065 , H01L21/6835 , H01L21/6836 , H01L23/544 , H01L2221/68327 , H01L2221/6834 , H01L2223/54426 , H01L2223/5446 , H01L2224/11 , H01L2224/16145 , H01L2224/16225
摘要： Approaches for front side laser scribe plus backside bump formation and laser scribe and plasma etch dicing process are described. For example, a method of dicing a semiconductor wafer having integrated circuits on a front side thereof involves forming first scribe lines on the front side, between the integrated circuits, with a first laser scribing process. The method also involves forming arrays of metal bumps on a backside of the semiconductor wafer, each array corresponding to one of the integrated circuits. The method also involves forming second scribe lines on the backside, between the arrays of metal bumps, with a second laser scribing process, wherein the second scribe lines are aligned with the first scribe lines. The method also involves plasma etching the semiconductor wafer through the second scribe lines to singulate the integrated circuits.
摘要翻译：描述了用于前侧激光划片加背面凸块形成和激光划线和等离子体蚀刻切割工艺的方法。例如，在前侧具有集成电路的半导体晶片的切割方法包括在第一激光划线工序之间，在集成电路之间的正面侧形成第一划线。该方法还涉及在半导体晶片的背面形成金属凸块阵列，每个阵列对应于一个集成电路。该方法还涉及在金属凸块阵列之间的背侧，第二激光划线工艺之间形成第二刻划线，其中第二刻划线与第一划刻线对准。该方法还包括通过第二划线等离子体蚀刻半导体晶片以对集成电路进行分离。

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