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1. 发明授权

US4523299A Message transmitting system for reproduction machines and copiers 失效
标题翻译：复印机和复印机的信息发送系统
公开(公告)号：US4523299A
公开(公告)日：1985-06-11
申请号：US421019
申请日：1982-09-21
申请人： James M. Donohue , Robert E. Markle , George E. Mager , Stephen P. Wilczek
发明人： James M. Donohue , Robert E. Markle , George E. Mager , Stephen P. Wilczek
IPC分类号： G03G21/00 , G03G15/00 , G08C15/00 , G08C15/06 , H04N1/00 , H04N1/32 , G06F9/00
CPC分类号： G03G15/50
摘要： A copy reproduction machine is subdivided into discrete operating modules and coupled together by a shared communication line over which operating messages from and to the modules are transmitted. Each module includes a receiver for intercepting and capturing messages bearing the module's address and a transmitter for transmitting messages from the module and addressed to other modules over the shared communication line.
摘要翻译：复制再现机被细分为离散操作模块，并通过共享通信线路耦合在一起，通过该通信线路发送来自模块和向模块的操作消息。每个模块包括用于拦截和捕获携带模块地址的消息的接收机，以及用于从模块发送消息并通过共享通信线路寻址到其他模块的发射机。

2. 发明授权

US4195352A Split programmable logic array 失效
标题翻译：分割可编程逻辑阵列
公开(公告)号：US4195352A
公开(公告)日：1980-03-25
申请号：US814054
申请日：1977-07-08
申请人： George K. Tu , George E. Mager , Lamar T. Baker , Robert E. Markle
发明人： George K. Tu , George E. Mager , Lamar T. Baker , Robert E. Markle
IPC分类号： H03K19/177 , G06F9/00 , H03K19/08 , H03K19/34
CPC分类号： H03K19/17716
摘要： A mask programmable logic array (PLA) for producing a particular digital output given a certain digital input. The input signals to the PLA first pass through a series of AND gates resulting in a predetermined number of product terms being formed. The product signals then pass through a set of OR gates to become the final output signals. In the subject invention, the AND gates and OR gates are implemented through the use of NOR-NOR logic. A first set of NOR gates is implemented in an array to receive input signals and to produce product terms. A second and third set of NOR gates form two arrays. These two arrays are then located on either side of the first array to receive selected product signals in order to produce final output signals. In effect the OR portion of the PLA has been split into two arrays.TABLE OF CONTENTSSubjectBackground of the InventionSummary of the InventionBrief Description of the DrawingsDetailed Description of the Preferred EmbodimentThe System Block DiagramMicroprocessor Unit Pin DesignationsClock and Timing SignalsSystem TimingThe ROMThe Stack AreaThe RAM AreaElimination of Race Conditions in the RAMThe ALU and ControlTime Slot End PredictorThe CROMBit Manipulation SchemeData Pad Input/OutputPrecharged Data Line DriverBus ControlTest CircuitrySplit PLA ControlThe S-CounterDetails of Logic BlocksThe MOS/LSI ChipThe Chip Test FunctionsThe Instruction Set
摘要翻译：面罩可编程逻辑阵列（PLA），用于产生给定一定数字输入的特定数字输出。到PLA的输入信号首先通过一系列AND门，产生预定数量的产品项。然后，产品信号通过一组或门以成为最终的输出信号。在本发明中，AND门和OR门通过使用NOR-NOR逻辑来实现。第一组NOR门在阵列中实现以接收输入信号并产生产品术语。第二组和第三组NOR门形成两个阵列。然后，这两个阵列位于第一阵列的任一侧，以接收选定的产品信号，以产生最终的输出信号。实际上，PLA的OR部分已经分成两个阵列。

3. 发明授权

US4144561A Chip topography for MOS integrated circuitry microprocessor chip 失效
公开(公告)号：US4144561A
公开(公告)日：1979-03-13
申请号：US813902
申请日：1977-07-08
申请人： George K. Tu , Lamar T. Baker , Robert E. Markle , George E. Mager
发明人： George K. Tu , Lamar T. Baker , Robert E. Markle , George E. Mager
IPC分类号： G06F15/78 , H01L27/02 , G06F1/00 , G06F9/00
CPC分类号： H01L27/0207
摘要： The chip topography of an MOS microprocessor chip. The chip architecture includes an internal data bus and an internal address bus. Input/output circuitry is located along the top edge of the chip and is coupled to the data bus. Output circuitry is located along the bottom edge and coupled to the address bus. A program storage area which includes a ROM is located in the lower left hand corner of the chip. The ROM contains instruction words for defining the operation of the microprocessor. A data storage area which includes a RAM is located in the upper left hand corner of the chip and is coupled to the data bus. An ALU area is located to the right of the data storage area and is coupled to the data bus for performing arithmetic and logic operations on data. A condition decode ROM located in the approximate center of the chip is coupled to the data bus and is used for decoding a condition field of an instruction word received from the ROM. A bus control area is located in the upper right hand corner of the chip. A programmed control area is located between the ALU area and the bus control area in the upper right hand portion of the chip and is coupled to the data bus for receiving instruction words from the program storage area and for generating commands which define the operation of the microprocessor in response to the instruction words. A clock/T-counter is located in the lower right hand corner and is used for synchronizing data signal flow in the micrprocessor. A stack area is located in the lower right hand portion of the chip. Within this stack area are various registers located from top to bottom as follows; write X circuitry, an X register a stack array, stack read/write circuitry, a memory address register, and an incrementer. A stack control is located between the aforementioned stack circuitry and the right hand edge. In addition, a RAM decode is located between the RAM and the left hand edge, a ROM column decode is located between the ROM and the bottom edge, and a ROM row decode is located between the ROM and the stack area.

4. 发明授权

US4609613A Permanent reproductions and formation method therefor 失效
标题翻译：永久性复制品及其形成方法
公开(公告)号：US4609613A
公开(公告)日：1986-09-02
申请号：US595631
申请日：1984-03-29
申请人： George R. Cogar , Robert E. Markle
发明人： George R. Cogar , Robert E. Markle
IPC分类号： G03F1/54 , G03C5/00 , G03C7/00
CPC分类号： G03F1/54
摘要： Permanent gray-scale reproductions including half-tone images. A refractory background region bears refractory thin-film dichroic filter means patterned to conform to the reproduced half-tone image. Preferred background region materials include metals, semiconductors, and ceramics; the thin-film materials are preferably oxides or nitrides of metals and semiconductors. If the refractory materials are appropriately selected, the reproductions are highly resistant to chemical and thermal deterioration and should have useful lives in the hundreds of thousands of years.
摘要翻译：永久的灰度级复制品，包括半色调图像。难熔背景区域具有耐火薄膜二向色滤光片装置，其被图案化以符合再现的半色调图像。优选的背景区域材料包括金属，半导体和陶瓷; 薄膜材料优选为金属和半导体的氧化物或氮化物。如果适当选择耐火材料，则复制品对化学和热变质具有很高的抵抗力，并应在数十万年的使用寿命中使用。

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