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    • 1. 发明申请
    • Noise reduction in color digital images using pyramid decomposition
    • 彩色数字图像使用金字塔分解降噪
    • US20050134734A1
    • 2005-06-23
    • US10738658
    • 2003-12-17
    • James AdamsJohn HamiltonFrances Williams
    • James AdamsJohn HamiltonFrances Williams
    • G06T5/00G09G5/00
    • G06T5/002G06T2207/10024G06T2207/20016
    • A method of removing noise from a color digital image, including receiving an original color digital image including a plurality of pixels represented in a primary-color space; producing at least one residual digital image and at least one base digital image from the original color digital image, the base digital image having a lower spatial resolution then the original color digital image; producing a noise reduced base digital image by removing noise from the residual image and the base digital image with a noise reduction filter and combining the noise reduced base digital image with the noise reduced residual image to produce a reconstructed digital image having reduced noise; transforming the reconstructed digital image into a luminance-chrominance color space; repeating the above process to produce a reconstructed luminance-chrominance digital image; and transforming the reconstructed luminance-chrominance digital image into a noise reduced digital image in the original primary color space.
    • 一种从彩色数字图像中去除噪声的方法,包括接收包括在原色空间中表示的多个像素的原始彩色数字图像; 从原始彩色数字图像产生至少一个残留数字图像和至少一个基本数字图像,基本数字图像具有较低的空间分辨率,然后是原始彩色数字图像; 通过利用降噪滤波器从残留图像和基本数字图像中去除噪声来产生噪声降低的基本数字图像,并将噪声降低的基本数字图像与噪声减小的残余图像组合以产生具有降低的噪声的重建数字图像; 将重建的数字图像变换为亮度色度色彩空间; 重复上述过程以产生重建的亮度色度数字图像; 并将重建的亮度色度数字图像变换成原始原色空间中的降噪数字图像。
    • 3. 发明申请
    • Extended dynamic range image sensor capture using an array of fast and slow pixels
    • 使用快速和慢速像素阵列扩展动态范围图像传感器捕获
    • US20050140804A1
    • 2005-06-30
    • US10747593
    • 2003-12-29
    • James AdamsJohn Hamilton
    • James AdamsJohn Hamilton
    • H04N5/202H04N9/04
    • H04N9/045
    • A method of extending the dynamic range of an imaging sensor including providing an image sensor having fast and slow pixels, wherein the fast pixels have a higher response to light exposure than the slow pixels; setting the dynamic range of the fast and slow pixels such that over an intermediate exposure range both fast and slow pixels produce an accurate representation of scene exposure but have different associated gains, while over a lower exposure range slow pixels produce a noise dominated signal, and over a higher exposure range fast pixels produce a saturated signal; and extending the dynamic range of the image sensor by adaptively adjusting higher exposure signals produced by fast pixels in response to higher exposure signals produced by slow pixels and by adaptively adjusting lower exposure signals produced by slow pixels in response to lower exposure signals produced by fast pixels.
    • 一种扩展成像传感器的动态范围的方法,包括提供具有快速和慢速像素的图像传感器,其中快速像素比慢像素具有比曝光更高的响应; 设置快速和慢速像素的动态范围,使得在快速和慢速像素的中间曝光范围内产生场景曝光的精确表示但具有不同的相关增益,而在较低曝光范围内,慢像素产生噪声主导信号,以及 在更高的曝光范围内,快速像素产生饱和信号; 并且响应于由慢像素产生的更高的曝光信号自适应地调节由快速像素产生的较高曝光信号并且通过响应由快速像素产生的较低曝光信号自适应地调整由慢像素产生的较低曝光信号来扩展图像传感器的动态范围 。
    • 5. 发明授权
    • Method and system for processing pixels utilizing scoreboarding
    • 使用记分板处理像素的方法和系统
    • US08854384B2
    • 2014-10-07
    • US12953756
    • 2010-11-24
    • Gary KeallGiles EdkinsEben UptonJames Adams
    • Gary KeallGiles EdkinsEben UptonJames Adams
    • G06T1/00G06F9/38G06T11/40G06F15/78G06F9/52
    • G06F15/7807G06F9/3857G06F9/522G06T11/40Y02D10/12Y02D10/13
    • In a graphics processing device, a plurality of processors write fragment shading results for order-dependent data to a buffer, according to the order in which the data is received. Fragment shading results for order-neutral data is written to the buffer one batch at a time. The order-dependent data comprises spatially overlapping data. Order-neutral data may not overlap. A scheduler controls the order of reception of one batch of data at a time by the processors. The order for receiving the order-dependent data may be determined. The plurality of processors may process the data in parallel. A writing order for writing results to a buffer from the processing in parallel, may be enforced. A portion of the processors may be instructed to wait before writing results to the buffer in a specified order. Processors signal when writing results to the buffer is complete.
    • 在图形处理装置中,多个处理器根据接收到数据的顺序将针对订单的数据写入缓冲器的片段着色结果。 一次性将批次中性数据的片段阴影结果写入缓冲区。 依赖于顺序的数据包括空间重叠的数据。 订单中性数据可能不重叠。 调度器一次由处理器控制一批数据的接收顺序。 可以确定接收订单相关数据的顺序。 多个处理器可以并行处理数据。 可以执行从处理并行写入结果到缓冲器的写入顺序。 可以指示处理器的一部分以指定的顺序将结果写入缓冲器之前等待。 当缓冲区写入结果完成时,处理器发出信号。
    • 6. 发明申请
    • ACTIVE HEAD RESTRAINT WITH SELF RESETTING MECHANISM
    • 具有自复位机构的活动头限制
    • US20080197681A1
    • 2008-08-21
    • US12105694
    • 2008-04-18
    • A. Mangala M. JayasuriyaJames AdamsMichael RussickMark LippmanZbigniew Orzelski
    • A. Mangala M. JayasuriyaJames AdamsMichael RussickMark LippmanZbigniew Orzelski
    • B60N2/42
    • B60N2/865B60N2/838B60N2/888
    • An apparatus includes a seat back having an outer surface that selectively contacts a seat occupant and a head restraint extending from the seat back that has a head restraint portion that selectively contacts the seat occupant. The head restraint portion is moveable between a forward position and a rearward position. The apparatus also includes a head restraint control assembly having an actuator, a lock mechanism, and a lock mechanism resetting device. The actuator transfers an actuation force to the head restraint portion for initiating movement of the head restraint portion from the rearward position to the forward position. The lock mechanism selectively restrains the headrest portion from moving from the forward position to the rearward position. The lock mechanism will restrain the headrest portion from moving from the forward position to the rearward position in a first actuation event and selectively reset by action of the lock mechanism resetting device in order to restrain the headrest portion from moving from the forward position to the rearward position in a second actuation event. The lock mechanism resetting device will reset the lock mechanism without manipulation from an outside source.
    • 一种装置包括座椅靠背,其具有选择性地接触座椅乘员的外表面和从座椅靠背延伸的头枕,所述头枕具有选择性地接触座椅乘员的头部保护部分。 头枕部分可在前进位置和后方位置之间移动。 该装置还包括具有致动器,锁定机构和锁定机构复位装置的头枕控制组件。 致动器将致动力传递到头部保护部分,以使头部约束部分从后部位置向前移动。 锁定机构选择性地限制头枕部分从前部位置向后移动。 锁定机构将在第一致动事件中将头枕部分从前部位置移动到后方位置,并通过锁定机构复位装置的动作选择性地复位,以便限制头枕部分从前部位置向后移动 在第二致动事件中的位置。 锁定机构复位装置将重新设置锁定机构,而无需外部来源操作。
    • 9. 发明申请
    • Self-Contained Avionics Sensing And Flight Control System For Small Unmanned Aerial Vehicle
    • 用于小型无人机的自包含航空电子传感和飞行控制系统
    • US20070069083A1
    • 2007-03-29
    • US11422984
    • 2006-06-08
    • Qamar ShamsMichael LoganRobert FoxMelanie FoxJohn InghamSean LaughterTheodore KuhnJames AdamsWalter Babel
    • Qamar ShamsMichael LoganRobert FoxMelanie FoxJohn InghamSean LaughterTheodore KuhnJames AdamsWalter Babel
    • G05D1/00
    • G05D1/101
    • A self-contained avionics sensing and flight control system is provided for an unmanned aerial vehicle (UAV). The system includes sensors for sensing flight control parameters and surveillance parameters, and a Global Positioning System (GPS) receiver. Flight control parameters and location signals are processed to generate flight control signals. A Field Programmable Gate Array (FPGA) is configured to provide a look-up table storing sets of values with each set being associated with a servo mechanism mounted on the UAV and with each value in each set indicating a unique duty cycle for the servo mechanism associated therewith. Each value in each set is further indexed to a bit position indicative of a unique percentage of a maximum duty cycle for the servo mechanism associated therewith. The FPGA is further configured to provide a plurality of pulse width modulation (PWM) generators coupled to the look-up table. Each PWM generator is associated with and adapted to be coupled to one of the servo mechanisms.
    • 为无人机(UAV)提供独立的航空电子感测和飞行控制系统。 该系统包括用于感测飞行控制参数和监视参数的传感器,以及全球定位系统(GPS)接收器。 飞行控制参数和位置信号被处理以产生飞行控制信号。 现场可编程门阵列(FPGA)被配置为提供存储各组值的查找表,其中每组与安装在UAV上的伺服机构相关联,并且每组中的每个值表示伺服机构的唯一占空比 相关联。 每组中的每个值进一步被索引到指示与其相关联的伺服机构的最大占空比的唯一百分比的位位置。 FPGA还被配置为提供耦合到查找表的多个脉宽调制(PWM)发生器。 每个PWM发生器与伺服机构中的一个相关联并且适于耦合到其中一个伺服机构。