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    • 4. 发明申请
    • HOST APPARATUS, IMAGE SCANNING APPARATUS, IMAGE SCANNING METHODS THEREOF AND COMPUTER READABLE RECORDING MEDIUM
    • 主机装置,图像扫描装置,图像扫描方法及计算机可读记录介质
    • US20130016408A1
    • 2013-01-17
    • US13547678
    • 2012-07-12
    • Jae-kyu Lee
    • Jae-kyu Lee
    • H04N1/46H04N1/04
    • H04N1/40075
    • A host apparatus includes a display unit configured to display a user interface (UI) window for an image scanning apparatus, a control unit configured to elevate and determine an optical scanning resolution of the image scanning apparatus according to Moire-related information when a scanning resolution is input and a Moire removing function is selected, in the UI window, and control the image scanning apparatus to perform a scanning operation according to the determined optical scanning resolution, a communication interface unit configured to receive a scanned image scanned with the optical scanning resolution in the image scanning apparatus, a filtering unit configured to remove a halftoning screen pattern from the received scanned image, and a sampling unit configured to down-sample the filtered scanned image with the input scanning resolution.
    • 主机装置包括:显示单元,被配置为显示用于图像扫描装置的用户界面(UI)窗口;控制单元,被配置为当扫描分辨率时根据莫尔相关信息提升和确定图像扫描设备的光学扫描分辨率 在UI窗口中选择莫尔去除功能,并且根据所确定的光学扫描分辨率控制图像扫描装置执行扫描操作;通信接口单元,被配置为接收以光学扫描分辨率扫描的扫描图像 在图像扫描装置中,滤波单元被配置为从接收到的扫描图像中去除半色调屏幕图案,以及采样单元,被配置为以输入的扫描分辨率对经滤波的扫描图像进行下采样。
    • 5. 发明授权
    • Semiconductor device reducing junction leakage current and narrow width effect
    • 半导体器件减少结漏电流和窄幅度效应
    • US06740954B2
    • 2004-05-25
    • US10357017
    • 2003-02-03
    • Jae-kyu Lee
    • Jae-kyu Lee
    • H01L2900
    • H01L29/1033H01L21/76235H01L21/76237
    • A semiconductor device for reducing junction leakage current and mitigating the narrow width effect, and a fabrication method thereof, are provided. The semiconductor device includes a semiconductor substrate in which an active region and an isolation region including a trench are formed, a spacer which is formed on both sidewalls of the trench, a channel stop impurity region which is self-aligned by the spacer and locally formed only at the lower portion of the isolation region, an isolation insulating layer in which the trench is buried, and a gate pattern which is formed on the isolation insulating layer and the active region. When the channel stop impurity region is formed only at the lower portion of the isolation region, isolation characteristics between unit cells can be improved, and also, a junction leakage current can be reduced. Further, the present invention can reduce a narrow width effect, in which a threshold voltage rapidly decreases as a channel width becomes narrower, owing to the formation of the channel stop impurity region on the edges of the active region.
    • 提供了用于减少结漏电流并减轻窄宽度效应的半导体器件及其制造方法。 半导体器件包括其中形成有源区和包括沟槽的隔离区的半导体衬底,形成在沟槽的两个侧壁上的间隔物,通过间隔物自对准并且局部形成的沟道阻挡杂质区 仅在隔离区域的下部,隔离绝缘层,沟槽被埋入其中,以及形成在隔离绝缘层和有源区上的栅极图案。 当通道阻挡杂质区只形成在隔离区的下部时,能够提高单位电池之间的隔离特性,并且还可以降低结漏电流。 此外,由于在有源区域的边缘上形成沟道截止杂质区域,本发明可以减小阈值电压随着沟道宽度变窄而急剧减小的窄宽度效应。
    • 7. 发明授权
    • Method for fabricating a semiconductor device reducing junction leakage current and narrow width effect
    • 制造半导体器件的方法,减少结漏电流和窄宽度效应
    • US06537888B2
    • 2003-03-25
    • US09870298
    • 2001-05-30
    • Jae-kyu Lee
    • Jae-kyu Lee
    • H01L2176
    • H01L29/1033H01L21/76235H01L21/76237
    • A semiconductor device for reducing junction leakage current and mitigating the narrow width effect, and a fabrication method thereof, are provided. The semiconductor device includes a semiconductor substrate in which an active region and an isolation region including a trench are formed, a spacer which is formed on both sidewalls of the trench, a channel stop impurity region which is self-aligned by the spacer and locally formed only at the lower portion of the isolation region, an isolation insulating layer in which the trench is buried, and a gate pattern which is formed on the isolation insulating layer and the active region. When the channel stop impurity region is formed only at the lower portion of the isolation region, isolation characteristics between unit cells can be improved, and also, a junction leakage current can be reduced. Further, the present invention can reduce a narrow width effect, in which a threshold voltage rapidly decreases as a channel width becomes narrower, owing to the formation of the channel stop impurity region on the edges of the active region.
    • 提供了用于减少结漏电流并减轻窄宽度效应的半导体器件及其制造方法。 半导体器件包括其中形成有源区和包括沟槽的隔离区的半导体衬底,形成在沟槽的两个侧壁上的间隔物,通过间隔物自对准并且局部形成的沟道阻挡杂质区 仅在隔离区域的下部,隔离绝缘层,沟槽被埋入其中,以及形成在隔离绝缘层和有源区上的栅极图案。 当通道阻挡杂质区只形成在隔离区的下部时,能够提高单位电池之间的隔离特性,并且还可以降低结漏电流。 此外,由于在有源区域的边缘上形成沟道截止杂质区域,本发明可以减小阈值电压随着沟道宽度变窄而急剧减小的窄宽度效应。