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    • 2. 发明申请
      US20090154736A1 APPARATUS FOR GENERATING DIRECTIONAL SOUND AND MOBILE TERMINAL USING THE SAME 审中-公开
    • APPARATUS FOR GENERATING DIRECTIONAL SOUND AND MOBILE TERMINAL USING THE SAME
    • 用于产生方向声和移动终端的装置
    • US20090154736A1
    • 2009-06-18
    • US12240128
    • 2008-09-29
    • Sung Q Lee , Jae Woo Lee , Hye Jin Kim , Sang Kyun Lee , Kang Ho Park , Jong Dae Kim
    • Sung Q Lee , Jae Woo Lee , Hye Jin Kim , Sang Kyun Lee , Kang Ho Park , Jong Dae Kim
    • H04R5/02
    • H04R1/323 , H04R3/12 , H04R2201/403 , H04R2499/11
    • Provided are an apparatus for generating directional sound and a mobile terminal using the apparatus. The apparatus includes a signal controller for dividing and generating a reference signal into signals having three or more levels and phases, a first signal processor and a second signal processor for controlling a first signal and a second signal having levels and phases canceling each other among the signals generated from the signal controller, a central signal processor for controlling a signal having the same level and phase as the reference signal among the signals generated from the signal controller, a first speaker array and a second speaker array for converting signals output from the first signal processor and the second signal processor into sound signals and outputting the sound signals, and a central speaker for converting a signal output from the central signal processor into a sound signal and outputting the sound signal, and arranged between the first speaker array and the second speaker array.
    • 提供了一种用于产生定向声音的装置和使用该装置的移动终端。 该装置包括信号控制器，用于将参考信号分成并产生具有三个或多个电平和相位的信号;第一信号处理器和第二信号处理器，用于控制第一信号;以及第二信号， 从信号控制器产生的信号，用于控制与信号控制器产生的信号中具有与基准信号相同的电平和相位的信号的中央信号处理器，第一扬声器阵列和第二扬声器阵列，用于转换从第一 信号处理器和第二信号处理器转换成声音信号并输出​​声音信号;以及中央扬声器，用于将从中央信号处理器输出的信号转换为声音信号并输出​​声音信号，并且布置在第一扬声器阵列与第二扬声器阵列之间 扬声器阵列。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
    • 6. 发明申请
      US20080233675A1 METHOD OF FABRICATING NANO-WIRE ARRAY 失效
    • METHOD OF FABRICATING NANO-WIRE ARRAY
    • 制作纳米线阵列的方法
    • US20080233675A1
    • 2008-09-25
    • US11927881
    • 2007-10-30
    • Hong Yeol Lee , Seung Eon Moon , Eun Kyoung Kim , Jong Hyurk Park , Kang Ho Park , Jong Dae Kim , Gyu Tae Kim , Jae Woo Lee , Hye Yeon Ryu , Jung Hwan Huh
    • Hong Yeol Lee , Seung Eon Moon , Eun Kyoung Kim , Jong Hyurk Park , Kang Ho Park , Jong Dae Kim , Gyu Tae Kim , Jae Woo Lee , Hye Yeon Ryu , Jung Hwan Huh
    • H01L21/00
    • H01L29/0673 , H01L21/76289 , H01L27/1225 , H01L29/0665 , H01L29/24 , H01L29/66969 , H01L29/7869 , Y10S977/762
    • Provided is a method of fabricating a nano-wire array, including the steps of: depositing a nano-wire solution, which contains nano-wires, on a substrate; forming a first etch region in a stripe shape on the substrate and then patterning the nano-wires; forming drain and source electrode lines parallel to each other with the patterned nano-wires interposed therebetween; forming a plurality of drain electrodes which have one end connected to the drain electrode line and contact at least one of the nano-wires, and forming a plurality of source electrodes, which have one end connected to the source electrode line and contact the nano-wires that contact the drain electrodes; forming a second etch region between pairs of the drain and source electrodes so as to prevent electrical contacts between the pairs of the drain and source electrodes; forming an insulating layer on the substrate; and forming a gate electrode between the drain and source electrodes contacting the nano-wires on the insulating layer. Accordingly, even in an unparallel structure of nano-wires to electrode lines, a large scale nano-wire array is practicable and applicable to an integrated circuit or display unit with nano-wire alignment difficulty, as well as to device applications using flexible substrates.
    • 提供一种制造纳米线阵列的方法，包括以下步骤：在衬底上沉积包含纳米线的纳米线溶液; 在衬底上形成带状的第一蚀刻区域，然后对纳米线进行构图; 形成彼此平行的漏极和源极电极线，其间插入图案化的纳米线; 形成多个漏电极，所述多个漏电极的一端连接到所述漏电极线并接触所述纳米线中的至少一个，并且形成多个源电极，所述多个源电极的一端连接到所述源电极线并接触所述纳米线， 接触漏电极的电线; 在所述漏极和源极电极之间形成第二蚀刻区域，以防止所述漏极和源极电极之间的电接触; 在所述基板上形成绝缘层; 以及在与绝缘层上的纳米线接触的漏极和源电极之间形成栅电极。 因此，即使在纳米线与电极线的不平行结构中，大规模的纳米线阵列也是可行的并且适用于具有纳米线对准困难的集成电路或显示单元以及使用柔性基板的器件应用。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
    • 9. 发明授权
      US07846786B2 Method of fabricating nano-wire array 失效
    • Method of fabricating nano-wire array
    • 制造纳米线阵列的方法
    • US07846786B2
    • 2010-12-07
    • US11927881
    • 2007-10-30
    • Hong Yeol Lee , Seung Eon Moon , Eun Kyoung Kim , Jong Hyurk Park , Kang Ho Park , Jong Dae Kim , Gyu Tae Kim , Jae Woo Lee , Hye Yeon Ryu , Jung Hwan Huh
    • Hong Yeol Lee , Seung Eon Moon , Eun Kyoung Kim , Jong Hyurk Park , Kang Ho Park , Jong Dae Kim , Gyu Tae Kim , Jae Woo Lee , Hye Yeon Ryu , Jung Hwan Huh
    • H01L21/00 , H01L21/16 , H01L29/06 , H01L27/088
    • H01L29/0673 , H01L21/76289 , H01L27/1225 , H01L29/0665 , H01L29/24 , H01L29/66969 , H01L29/7869 , Y10S977/762
    • Provided is a method of fabricating a nano-wire array, including the steps of: depositing a nano-wire solution, which contains nano-wires, on a substrate; forming a first etch region in a stripe shape on the substrate and then patterning the nano-wires; forming drain and source electrode lines parallel to each other with the patterned nano-wires interposed therebetween; forming a plurality of drain electrodes which have one end connected to the drain electrode line and contact at least one of the nano-wires, and forming a plurality of source electrodes, which have one end connected to the source electrode line and contact the nano-wires that contact the drain electrodes; forming a second etch region between pairs of the drain and source electrodes so as to prevent electrical contacts between the pairs of the drain and source electrodes; forming an insulating layer on the substrate; and forming a gate electrode between the drain and source electrodes contacting the nano-wires on the insulating layer. Accordingly, even in an unparallel structure of nano-wires to electrode lines, a large scale nano-wire array is practicable and applicable to an integrated circuit or display unit with nano-wire alignment difficulty, as well as to device applications using flexible substrates.
    • 提供一种制造纳米线阵列的方法，包括以下步骤：在衬底上沉积包含纳米线的纳米线溶液; 在衬底上形成带状的第一蚀刻区域，然后对纳米线进行构图; 形成彼此平行的漏极和源极电极线，其间插入图案化的纳米线; 形成多个漏电极，所述多个漏电极的一端连接到所述漏电极线并接触所述纳米线中的至少一个，并且形成多个源电极，所述多个源电极的一端连接到所述源电极线并接触所述纳米线， 接触漏电极的电线; 在所述漏极和源极电极之间形成第二蚀刻区域，以防止所述漏极和源极电极之间的电接触; 在所述基板上形成绝缘层; 以及在与绝缘层上的纳米线接触的漏极和源电极之间形成栅电极。 因此，即使在纳米线与电极线的不平行结构中，大规模的纳米线阵列也是可行的并且适用于具有纳米线对准困难的集成电路或显示单元以及使用柔性基板的器件应用。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Espacenet 法律信息 同族专利 专利引用
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