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    • 2. 发明授权
    • Fault detection circuit
    • 故障检测电路
    • US07449912B2
    • 2008-11-11
    • US11627730
    • 2007-01-26
    • Kelly Jean PrachtSamuel M. BabbJack Lavier
    • Kelly Jean PrachtSamuel M. BabbJack Lavier
    • G01R31/36
    • G01R31/40
    • Power supplies are disclosed herein. One embodiment of a power supply comprises a first input and a second input, wherein the first input and the second input are connectable to a pulse width modulation controller and wherein a pulse width modulation signal is outputable from the pulse width modulation controller. A power stage connected to the first input and the second input. A first comparator having a first comparator first input is connected to the first input and a first comparator second input connected to the output of the power stage. A change of voltage at the output of the first comparator constitutes a difference in phase between the first input and the output of the power stage.
    • 这里公开了电源。 电源的一个实施例包括第一输入和第二输入,其中第一输入和第二输入可连接到脉宽调制控制器,并且其中可从脉宽调制控制器输出脉宽调制信号。 连接到第一输入和第二输入的功率级。 具有第一比较器第一输入的第一比较器连接到第一输入端,第一比较器第二输入端连接到功率级的输出。 在第一比较器的输出处的电压变化构成功率级的第一输入和输出之间的相位差。
    • 3. 发明申请
    • Failure detection in a voltage regulator
    • 电压调节器故障检测
    • US20080239593A1
    • 2008-10-02
    • US11729646
    • 2007-03-29
    • Jack LavierSamuel M. BabbKelly Jean Pracht
    • Jack LavierSamuel M. BabbKelly Jean Pracht
    • H02H7/00G01R31/02
    • G01R31/40H02M1/32H02M3/156H02M2001/0012
    • A control logic detects voltage regulator failure in a power supply. The control logic comprises first and second lines configured for respective connection to a controller node and a phase node of a voltage regulator, a delay element coupled to the first line configured to delay signals at the controller node into alignment with signals at the phase node, and a level detector coupled to the second line configured to convert the signals at the phase node into at least two digital representations indicative of respective signal thresholds. A logic compares timing of the delayed signals with the digital representations and detects occurrence of a voltage regulator fault based on the timing comparison.
    • 控制逻辑检测电源中的稳压器故障。 控制逻辑包括被配置用于相应连接到控制器节点和电压调节器的相位节点的第一和第二线路,耦合到第一线路的延迟元件,其配置成将控制器节点处的信号延迟与相位节点处的信号对准, 以及耦合到所述第二线路的电平检测器,其被配置为将所述相位节点处的信号转换成指示相应信号阈值的至少两个数字表示。 逻辑将延迟信号的定时与数字表示进行比较,并且基于定时比较来检测电压调节器故障的发生。
    • 4. 发明授权
    • Failure detection in a voltage regulator
    • 电压调节器故障检测
    • US07692910B2
    • 2010-04-06
    • US11729646
    • 2007-03-29
    • Jack LavierSamuel M. BabbKelly Jean Pracht
    • Jack LavierSamuel M. BabbKelly Jean Pracht
    • H02H3/08H02H9/02G05J1/569G05J1/573
    • G01R31/40H02M1/32H02M3/156H02M2001/0012
    • A control logic detects voltage regulator failure in a power supply. The control logic comprises first and second lines configured for respective connection to a controller node and a phase node of a voltage regulator, a delay element coupled to the first line configured to delay signals at the controller node into alignment with signals at the phase node, and a level detector coupled to the second line configured to convert the signals at the phase node into at least two digital representations indicative of respective signal thresholds. A logic compares timing of the delayed signals with the digital representations and detects occurrence of a voltage regulator fault based on the timing comparison.
    • 控制逻辑检测电源中的稳压器故障。 控制逻辑包括被配置用于相应连接到控制器节点和电压调节器的相位节点的第一和第二线路,耦合到第一线路的延迟元件,其配置成将控制器节点处的信号延迟与相位节点处的信号对准, 以及耦合到所述第二线路的电平检测器,其被配置为将所述相位节点处的信号转换成指示相应信号阈值的至少两个数字表示。 逻辑将延迟信号的定时与数字表示进行比较,并且基于定时比较来检测电压调节器故障的发生。
    • 5. 发明申请
    • Fault Detection Circuit
    • 故障检测电路
    • US20080180108A1
    • 2008-07-31
    • US11627730
    • 2007-01-26
    • Kelly Jean PrachtSamuel M. BabbJack Lavier
    • Kelly Jean PrachtSamuel M. BabbJack Lavier
    • G01R31/08
    • G01R31/40
    • Power supplies are disclosed herein. One embodiment of a power supply comprises a first input and a second input, wherein the first input and the second input are connectable to a pulse width modulation controller and wherein a pulse width modulation signal is outputable from the pulse width modulation controller. A power stage connected to the first input and the second input. A first comparator having a first comparator first input is connected to the first input and a first comparator second input connected to the output of the power stage. A change of voltage at the output of the first comparator constitutes a difference in phase between the first input and the output of the power stage.
    • 这里公开了电源。 电源的一个实施例包括第一输入和第二输入,其中第一输入和第二输入可连接到脉宽调制控制器,并且其中可从脉宽调制控制器输出脉宽调制信号。 连接到第一输入和第二输入的功率级。 具有第一比较器第一输入的第一比较器连接到第一输入端,第一比较器第二输入端连接到功率级的输出。 在第一比较器的输出处的电压变化构成功率级的第一输入和输出之间的相位差。