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1. 发明授权

US4516039A Logic circuit utilizing a current switch circuit having a non-threshold transfer characteristic 失效
标题翻译：利用具有非阈值传递特性的电流开关电路的逻辑电路
公开(公告)号：US4516039A
公开(公告)日：1985-05-07
申请号：US343379
申请日：1982-01-27
申请人： Isokazu Matsuzaki , Akira Yamagiwa , Yutaka Watanabe , Takashi Matsumoto , Katsumi Yabe
发明人： Isokazu Matsuzaki , Akira Yamagiwa , Yutaka Watanabe , Takashi Matsumoto , Katsumi Yabe
IPC分类号： H03K19/086 , H03K19/013
CPC分类号： H03K19/086
摘要： A logic circuit (FIGS. 4A, 5A and 6A) comprises a current switch circuit (FIG. 4A) which has a non-threshold transfer characteristic (FIG. 4B), operates in non-saturation region, and is suited to a high speed operation.The current switch circuit is formed by a pair of transistors (6 or 7, and 8), one of which (6 or 7) receives an input signal at its base, and the other (8) has its base and collector connected in d.c. coupling to each other. The pair of transistors are connected with a common constant current source (9) at their emitters, deliver an output from their collectors, and are so biased as to operate in the non-saturation region.In the current switch circuit, due to the d.c. coupling between the base and the collector of the other transistor (8), the voltage level of the collector changes linearly in accordance with the input signal of the current switch circuit. This allows for a transfer characteristic having no threshold and a very small delay time between the input signal and the output signal. Moreover, the operation of transistors in the non-saturation region makes possible a logical operation which is high in speed and short in delay time.
摘要翻译：逻辑电路（图4A，5A和6A）包括具有非阈值传递特性的电流开关电路（图4A）（图4B），在非饱和区域中工作，并且适合于高速操作。电流开关电路由一对晶体管（6或7和8）形成，其中一个晶体管（6或7）在其基极接收输入信号，另一个（8）的基极和集电极连接成直流。相互耦合。该对晶体管在其发射极处与公共恒流源（9）连接，从其集电极输出输出，并被偏置以在非饱和区域中工作。在当前的开关电路中，由于直流耦合在另一个晶体管（8）的基极和集电极之间，集电极的电压根据电流开关电路的输入信号线性变化。这允许在输入信号和输出信号之间没有阈值和非常小的延迟时间的传输特性。此外，在非饱和区域中的晶体管的操作使得可能的速度高和延迟时间短的逻辑运算。

2. 发明授权

US07911224B2 Signal transmitting device suited to fast signal transmission 失效
标题翻译：信号传输设备适合快速信号传输
公开(公告)号：US07911224B2
公开(公告)日：2011-03-22
申请号：US12116541
申请日：2008-05-07
申请人： Toshitsugu Takekuma , Ryoichi Kurihara , Akira Yamagiwa
发明人： Toshitsugu Takekuma , Ryoichi Kurihara , Akira Yamagiwa
IPC分类号： H03K19/003
CPC分类号： H04L25/0298 , G06F13/4072 , G06F13/4086 , H04B3/02 , H04L25/0278 , H04L25/028 , H04L25/0292 , H05K1/0216 , H05K1/0237 , H05K1/14
摘要： A signal transmitting circuit includes a circuit block having a driving circuit and an intra-block transmission line for transmitting a signal from the driving circuit, a circuit block having a receiving circuit and an intra-block transmission line for transmitting the signal to said receiving circuit, and a main interblock transmission line for propagating a signal between the driving and receiving circuit blocks. The inter-block transmission line is terminated by a resistor having substantially the same impedance as the interblock transmission line. The intra-block transmission lines are provided with a resistance element having a resistance substantially equal to a value derived by subtracting half of an impedance of the inter-block transmission line from an impedance of the intra-block transmission line, to lower signal amplitude and suppress reflections of a signal at branch points along the main interblock transmission line, thereby enabling a high-speed signal transfer.
摘要翻译：信号发送电路包括具有用于发送来自驱动电路的信号的驱动电路和块内传输线路的电路块，具有接收电路的电路块和用于将信号发送到所述接收电路的块内传输线路以及用于在驱动和接收电路块之间传播信号的主块间传输线。块间传输线由具有与块间传输线基本上相同阻抗的电阻端接。块内传输线路设置有电阻元件，其电阻基本上等于通过将块间传输线路的阻抗的一半从块内传输线路的阻抗减去一半到更低的信号幅度，抑制沿着主块间传输线的分支点处的信号的反射，从而实现高速信号传送。

3. 发明授权

US07123048B2 Signal transmitting device suited to fast signal transmission 有权
公开(公告)号：US07123048B2
公开(公告)日：2006-10-17
申请号：US11049663
申请日：2005-02-04
申请人： Toshitsuqu Takekuma , Ryoichi Kurihara , Akira Yamagiwa
发明人： Toshitsuqu Takekuma , Ryoichi Kurihara , Akira Yamagiwa
IPC分类号： H03K17/16
CPC分类号： H04L25/0298 , G06F13/4072 , G06F13/4086 , H04B3/02 , H04L25/0278 , H04L25/028 , H04L25/0292 , H05K1/0216 , H05K1/0237 , H05K1/14
摘要： A signal transmitting circuit includes a circuit block having a driving circuit and an intra-block transmission line for transmitting a signal from the driving circuit, a circuit block having a receiving circuit and an intra-block transmission line for transmitting the signal to said receiving circuit, and a main interblock transmission line for propagating a signal between the driving and receiving circuit blocks. The inter-block transmission line is terminated by a resistor having substantially the same impedance as the interblock transmission line. The intra-block transmission lines are provided with a resistance element having a resistance substantially equal to a value derived by subtracting half of an impedance of the inter-block transmission line from an impedance of the intra-block transmission line, to lower signal amplitude and suppress reflections of a signal at branch points along the main interblock transmission line, thereby enabling a high-speed signal transfer.

4. 发明申请

US20050088200A1 Signal transmitting device suited to fast signal transmission 失效
公开(公告)号：US20050088200A1
公开(公告)日：2005-04-28
申请号：US10989279
申请日：2004-11-17
申请人： Toshitsugu Takekuma , Ryoichi Kurihara , Akira Yamagiwa
发明人： Toshitsugu Takekuma , Ryoichi Kurihara , Akira Yamagiwa
IPC分类号： G06F3/00 , G06F12/00 , G06F13/16 , G06F13/40 , G11C11/401 , H03K19/0175 , H04B3/02 , H04L25/02 , H05K1/02 , H05K1/14 , H03K19/003
CPC分类号： H04L25/0298 , G06F13/4072 , G06F13/4086 , H04B3/02 , H04L25/0278 , H04L25/028 , H04L25/0292 , H05K1/0216 , H05K1/0237 , H05K1/14
摘要： A signal transmitting circuit includes a circuit block having a driving circuit and an intra-block transmission line for transmitting a signal from the driving circuit, a circuit block having a receiving circuit and an intra-block transmission line for transmitting the signal to said receiving circuit, and a main interblock transmission line for propagating a signal between the driving and receiving circuit blocks. The inter-block transmission line is terminated by a resistor having substantially the same impedance as the interblock transmission line. The intra-block transmission lines are provided with a resistance element having a resistance substantially equal to a value derived by subtracting half of an impedance of the inter-block transmission line from an impedance of the intra-block transmission line, to lower signal amplitude and suppress reflections of a signal at branch points along the main interblock transmission line, thereby enabling a high-speed signal transfer.

5. 发明授权

US06780677B2 Process for mounting electronic device and semiconductor device 失效
公开(公告)号：US06780677B2
公开(公告)日：2004-08-24
申请号：US10224339
申请日：2002-08-21
申请人： Satoshi Imasu , Ikuo Yoshida , Tetsuya Hayashida , Akira Yamagiwa , Shinobu Takeura
发明人： Satoshi Imasu , Ikuo Yoshida , Tetsuya Hayashida , Akira Yamagiwa , Shinobu Takeura
IPC分类号： H01L2144
CPC分类号： H05K1/111 , H01L21/563 , H01L23/13 , H01L23/24 , H01L23/49811 , H01L23/5383 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/105 , H01L2224/05567 , H01L2224/05571 , H01L2224/05573 , H01L2224/05624 , H01L2224/1134 , H01L2224/13111 , H01L2224/13116 , H01L2224/13144 , H01L2224/16225 , H01L2224/16237 , H01L2224/29111 , H01L2224/2919 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/49109 , H01L2224/73103 , H01L2224/73203 , H01L2224/73204 , H01L2224/73265 , H01L2224/81191 , H01L2224/83101 , H01L2224/83191 , H01L2224/83192 , H01L2225/1023 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01073 , H01L2924/01079 , H01L2924/0132 , H01L2924/014 , H01L2924/15153 , H01L2924/1517 , H01L2924/15174 , H01L2924/15311 , H01L2924/1579 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/30105 , H01L2924/351 , H05K1/0271 , H05K1/114 , H05K3/3436 , H05K3/4007 , H05K3/4602 , H05K2201/0133 , H05K2201/091 , H05K2201/09472 , H05K2201/09536 , H05K2201/0959 , H05K2201/10674 , H05K2203/1581 , Y02P70/611 , H01L2924/00014 , H01L2224/13099 , H01L2924/00012 , H01L2924/01082 , H01L2924/00
摘要： An electronic device comprising a semiconductor chip which is fixed to the mounting face of a wiring board through an adhesive and in which external terminals are electrically connected with electrode pads of the wiring board through bump electrodes. Recesses are formed in the electrode pads, and in the recesses the electrode pads and the bump electrodes are connected. The electrode pads are formed over the surface of a soft layer, and the recesses are formed by elastic deformation of the electrode pads and the soft layer.

6. 发明授权

US06766404B1 Branch bus system for inter-LSI data transmission 失效
标题翻译：分支总线系统，用于LSI间数据传输
公开(公告)号：US06766404B1
公开(公告)日：2004-07-20
申请号：US09568055
申请日：2000-05-10
申请人： Hideki Osaka , Akira Yamagiwa , Kenichi Ishibashi
发明人： Hideki Osaka , Akira Yamagiwa , Kenichi Ishibashi
IPC分类号： G06F100
CPC分类号： H04L25/0278 , G06F13/4077
摘要： A fast transfer bus system capable of fast data transfer with no reflection at branch points. Four LSIs having constant-impedance interfaces are connected via two variable resistors each having three signal terminals. A variable impedance LSI is connected between these variable resistors. When the LSIs connected to the variable resistor do not work as a bus driver, three variable resistance elements in each variable resistor are set to have a value of ⅓ of the characteristic impedance Zo of connection lines, and are connected in a Y-letter shape. When one of LSIs connected to the variable resistor works as a bus driver, the values of the variable resistance elements are set to low impedance or Zo.
摘要翻译：快速传输总线系统，能够快速传输数据，在分支点无反射。具有恒定阻抗接口的四个LSI通过两个可变电阻器连接，每个可变电阻器具有三个信号端子。可变阻抗LSI连接在这些可变电阻之间。当连接到可变电阻器的LSI不能用作总线驱动器时，每个可变电阻器中的三个可变电阻元件被设置为连接线的特性阻抗Zo的1/3，并且以Y- 字母形状。当连接到可变电阻器的LSI中的一个作为总线驱动器工作时，可变电阻元件的值被设置为低阻抗或Zo。

7. 发明授权

US06441638B2 Bus system and circuit board 失效
标题翻译：总线系统和电路板
公开(公告)号：US06441638B2
公开(公告)日：2002-08-27
申请号：US09215456
申请日：1998-12-17
申请人： Hideki Osaka , Shinichi Suzuki , Akira Yamagiwa , Toshiro Takahashi
发明人： Hideki Osaka , Shinichi Suzuki , Akira Yamagiwa , Toshiro Takahashi
IPC分类号： H03K1716
CPC分类号： G06F13/4086
摘要： A bus system with an improved propagation velocity, comprising main lines, and a plurality of stub lines provided on a one-to-one correspondence with a plurality of modules, and connecting the corresponding modules to the main lines.
摘要翻译：具有改善的传播速度的总线系统，包括主线，以及与多个模块一一对应地提供的多个短截线，并将相应的模块连接到主线。

8. 发明授权

US5666302A Simultaneous bidirectional transmission apparatus for transmitting and receiving differential signals 失效
标题翻译：用于发送和接收差分信号的同时双向传输装置
公开(公告)号：US5666302A
公开(公告)日：1997-09-09
申请号：US496195
申请日：1995-06-28
申请人： Akira Tanaka , Kenichi Ishibashi , Akira Yamagiwa , Takehisa Hayashi
发明人： Akira Tanaka , Kenichi Ishibashi , Akira Yamagiwa , Takehisa Hayashi
IPC分类号： H04L5/14 , H04B1/58 , H04B3/20 , H04L25/02 , G06G7/02
CPC分类号： H04B1/58 , H04B1/583 , H04B1/586
摘要： A simultaneous bidirectional transmission apparatus for transmitting and receiving differential signals solves a generation of pulse noise problem in the receiving circuit due to the inversion of the output of the transmission circuit. For a pair of input/output devices connected together by transmission lines, each input/output device has a differential transmitting circuit, a differential receiving circuit and six resistors. The output of the transmitting circuit does not affect an input to the receiving circuit, and the receiving circuit receives only the output of the transmitting circuit of the other input/output device. The resistors, a passive element circuit and the output resistance of the transmitting circuit form, in combination, a waveform shaping filter and a matching terminating circuit.
摘要翻译：用于发送和接收差分信号的同时双向传输装置由于传输电路的输出反转而解决接收电路中的脉冲噪声问题的产生。对于通过传输线连接在一起的一对输入/输出设备，每个输入/输出设备具有差分发射电路，差分接收电路和六个电阻器。发送电路的输出不影响到接收电路的输入，接收电路仅接收另一个输入/输出装置的发送电路的输出。电阻器，无源元件电路和发射电路的输出电阻组合形成波形整形滤波器和匹配终端电路。

9. 发明授权

US5548226A Fast transmission line implemented with receiver, driver, terminator and IC arrangements 失效
标题翻译：用接收器，驱动器，终端器和IC布置实现快速传输线
公开(公告)号：US5548226A
公开(公告)日：1996-08-20
申请号：US269352
申请日：1994-06-30
申请人： Toshitsugu Takekuma , Ryoichi Kurihara , Akira Yamagiwa
发明人： Toshitsugu Takekuma , Ryoichi Kurihara , Akira Yamagiwa
IPC分类号： G06F3/00 , G06F12/00 , G06F13/16 , G06F13/40 , G11C11/401 , H03K19/0175 , H04B3/02 , H04L25/02 , H05K1/02 , H05K1/14 , H03K17/16
CPC分类号： H04L25/0298 , G06F13/4072 , G06F13/4086 , H04B3/02 , H04L25/0278 , H04L25/028 , H04L25/0292 , H05K1/0216 , H05K1/0237 , H05K1/14
摘要： A signal transmitting circuit includes one or more circuit blocks having a driving circuit and an intra-block transmission line for transmitting a signal produced by the driving circuit, one or more circuit blocks having a receiving circuit and an intra-block transmission line for transmitting the signal to said receiving circuit, and a main interblock transmission line for propagating a signal between both of the driving and receiving circuit blocks. Inter-block transmission line is terminated at one or two ends by one or two resistors having substantially the same impedance as the interblock transmission line itself. Each of the intra-block transmission line is provided with a resistance element having a resistance equal to or close to a value derived by subtracting a half of an impedance of the inter-block transmission line from an impedance of the intra-block transmission line, to lower signal amplitude and suppress reflections of a signal at branch points along the main interblock transmission line, thereby enabling a high-speed signal transfer.
摘要翻译：信号发送电路包括一个或多个具有驱动电路和块内传输线的电路块，用于发送由驱动电路产生的信号，一个或多个电路块具有接收电路和块内传输线，用于发送信号到所述接收电路，以及主块间传输线，用于在两个驱动和接收电路块之间传播信号。块间传输线在一或两端由一个或两个具有与块间传输线本身基本上相同的阻抗的电阻终止。块内传输线路中的每一个被提供有电阻元件，其电阻等于或接近于通过从块内传输线路的阻抗减去块间传输线路的阻抗的一半导出的值，降低信号幅度并抑制沿着主块间传输线的分支点处的信号的反射，从而实现高速信号传送。

10. 发明授权

US5195576A LSI cooling apparatus and computer cooling apparatus 失效
标题翻译： LSI冷却装置和计算机冷却装置
公开(公告)号：US5195576A
公开(公告)日：1993-03-23
申请号：US659671
申请日：1991-02-25
申请人： Toshio Hatada , Hitoshi Matsushima , Yoshihiro Kondou , Hiroshi Inoue , Kanji Otsuka , Yuji Shirai , Takao Ohba , Akira Yamagiwa
发明人： Toshio Hatada , Hitoshi Matsushima , Yoshihiro Kondou , Hiroshi Inoue , Kanji Otsuka , Yuji Shirai , Takao Ohba , Akira Yamagiwa
IPC分类号： H01L23/473 , F28F3/02 , H01L23/367 , H01L23/467 , H05K7/10 , H05K7/20
CPC分类号： F28F3/022 , H01L23/3672 , H01L23/3677 , H01L23/467 , H05K7/1015 , H01L2224/45015 , H01L2224/49109 , H01L24/49 , H01L2924/00014 , H01L2924/01014 , H01L2924/01068 , H01L2924/16195
摘要： An LSI cooling apparatus having various structures is used in electronic devices such as computer systems. In particular, the LSI cooling of apparatus is suitable for cooling of LSIs having high heat generating densities. In a cooling apparatus of the present invention, a heat sink is constructed to be small in pressure loss and excellent in cooling performance. This is because the heat sink comprises thin wire fins so set that the Reynold's number may not exceed 40. As a result, LSIs generating a large amount of heat can be cooled. Further, a heat sink having rigidity can be obtained by disposing wide-width wire drawn substances in thin wires or by using supports. Further, a computer comprising LSIs equipped with heat sinks can cope with various cooling air sending methods and it can be cooled with low noises.
摘要翻译：具有各种结构的LSI冷却装置用于诸如计算机系统的电子设备中。特别地，装置的LSI冷却适用于具有高发热密度的LSI的冷却。在本发明的冷却装置中，散热器的压力损失小，冷却性能优异。这是因为散热器包括细线散热片，使得雷诺数不得超过40个。结果，可以冷却产生大量热量的LSI。此外，通过将宽幅拉丝物质设置在细线中或通过使用支撑体，可以获得具有刚性的散热器。此外，包括散热器的LSI的计算机可以应对各种冷却空气送出方法，并且可以以低噪声进行冷却。

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