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1. 发明申请

US20120249499A1 DISPLAY PANEL AND INSPECTION METHOD THEREOF 审中-公开
标题翻译：显示面板及其检查方法
公开(公告)号：US20120249499A1
公开(公告)日：2012-10-04
申请号：US13513017
申请日：2010-10-07
申请人： Isao Takahashi , Shige Furuta , Yuhichiroh Murakami , Yasushi Sasaki
发明人： Isao Takahashi , Shige Furuta , Yuhichiroh Murakami , Yasushi Sasaki
IPC分类号： G06F3/038
CPC分类号： G09G3/006 , G09G3/3611 , G09G3/3688 , G09G2310/0297 , G09G2330/12
摘要： A one-input and three-output demultiplexer that includes sampling switches for sampling a video signal is provided at one end side of source bus lines, and a one-input and three-output demultiplexer that includes test switches provided corresponding to sampling switches and that uses a test video signal as an input signal is provided at the other end side of the source bus lines. When an any control signal out of three control signals for controlling states of a sampling switch and a test switch is defined as a target control signal, a source bus line connected to the sampling switch which is set to an on state by the target control signal and a source bus line connected to the test switch which is set to an on state by the target control signal are different.
摘要翻译：在源总线的一端提供包括用于采样视频信号的采样开关的单输入和三输出解复用器，以及包括与采样开关相对应的测试开关的单输入和三输出解复用器，并且使用测试视频信号作为输入信号设置在源总线的另一端。当将用于控制采样开关和测试开关的状态的三个控制信号中的任何控制信号定义为目标控制信号时，连接到通过目标控制信号被设置为导通状态的采样开关的源极总线并且连接到由目标控制信号设置为接通状态的测试开关的源极总线不同。

2. 发明授权

US08970565B2 Display driving circuit, display panel and display device 有权
标题翻译：显示驱动电路，显示面板和显示设备
公开(公告)号：US08970565B2
公开(公告)日：2015-03-03
申请号：US13378233
申请日：2010-03-18
申请人： Takuya Hachida , Yuhichiroh Murakami , Shige Furuta , Makoto Yokoyama , Yasushi Sasaki
发明人： Takuya Hachida , Yuhichiroh Murakami , Shige Furuta , Makoto Yokoyama , Yasushi Sasaki
IPC分类号： G06F3/038 , G09G3/36 , G11C19/28
CPC分类号： G11C19/28 , G09G3/3677 , G09G2310/063
摘要： A stage of the shift register has (i) a set-reset type flip-flop which receives an initialization signal and (ii) a signal generating circuit which receives a simultaneous selection signal and which generates an output signal by use of an output of the flip-flop. In at least one example embodiment, the output of the flip-flop becomes inactive regardless of whether a setting signal and a resetting signal are active or inactive, as long as the initialization signal is active. The initialization signal becomes active before the end of the simultaneous selection, and then becomes inactive after the end of the simultaneous selection. This makes it possible to stabilize operation of the shift register after the end of simultaneous selection of a plurality of signal lines carried out by the display driving circuit at a predetermined timing.
摘要翻译：移位寄存器的一级具有（i）接收初始化信号的设置复位型触发器，以及（ii）接收同时选择信号并且通过使用输出信号产生输出信号的信号发生电路拖鞋。在至少一个示例性实施例中，只要初始化信号有效，触发器的输出就会变得无效，而不管设置信号和复位信号是有效还是无效。初始化信号在同时选择结束之前变为有效，然后在同时选择结束后变为无效。这使得可以在预定定时同时选择由显示驱动电路执行的多条信号线结束之后稳定移位寄存器的操作。

3. 发明申请

US20120200549A1 Display Device And Drive Method For Display Device 审中-公开
标题翻译：显示设备的显示设备和驱动方式
公开(公告)号：US20120200549A1
公开(公告)日：2012-08-09
申请号：US13395518
申请日：2010-04-23
申请人： Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
发明人： Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
IPC分类号： G09G3/36 , G09G5/00
CPC分类号： G09G3/3659 , G09G2300/0842 , G09G2300/0861 , G09G2320/0219 , G09G2330/022
摘要： Provided is a display device which can prevent screen noise caused such that a potential of a common electrode is reversed after a memory mode enters from a refresh period to an entire write-in period, and a method for driving the display device. The memory mode includes (i) an entire write-in period in which a potential of the common electrode (COM) is fixed and the display data is written into all the memory circuits (node (PIX)) in each row and (ii) a refresh period in which the display data which has been written during the entire write-in period is refreshed at least once while the common electrode (COM) is driven. In the memory mode, the potential of the common electrode during the entire write-in period being a potential which the common electrode having been driven had at the end of a refresh period preceding the entire write-in period.
摘要翻译：提供一种显示装置，其可以防止在从刷新周期进入整个写入周期之后引起公共电极的电位反转的屏幕噪声，以及用于驱动显示装置的方法。存储模式包括：（i）公共电极（COM）的电位固定并将显示数据写入到每行的所有存储电路（节点（PIX））中的整个写入周期，以及（ii）在驱动公共电极（COM）的过程中至少刷新一次整个写入周期期间已写入的显示数据的刷新周期。在存储模式中，公共电极在整个写入周期期间的电位是已经被驱动的公共电极在整个写入周期之前的刷新周期结束时的电位。

4. 发明授权

US08223112B2 Shift register receiving all-on signal and display device 有权
标题翻译：移位寄存器接收全信号和显示设备
公开(公告)号：US08223112B2
公开(公告)日：2012-07-17
申请号：US12734234
申请日：2008-08-18
申请人： Hiroyuki Ohkawa , Shige Furuta , Yasushi Sasaki , Yuhichiroh Murakami
发明人： Hiroyuki Ohkawa , Shige Furuta , Yasushi Sasaki , Yuhichiroh Murakami
IPC分类号： G09G3/36 , G09G5/00 , G06F3/038
CPC分类号： G11C19/28 , G09G3/20 , G09G3/3266 , G09G3/3275 , G09G3/3648 , G09G3/3674 , G09G3/3677 , G09G3/3685 , G09G3/3688 , G09G2300/0426 , G09G2310/0245 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2310/0291
摘要： At least one embodiment of the present invention is directed to, even when external noise is applied to a shift register during all-on operation, preventing through-current from flowing in unit circuits and also to prevent increase in load on all-on control signal lines. When a high-level all-on control signal is provided to a unit circuit of a shift register, a transistor T3 is brought into off-state, so that a transistor T2 cannot output an on-voltage to a first output terminal. However, a transistor T24 is brought into on-state, so that the first output terminal outputs an on-voltage to the exterior. On the other hand, a transistor T32 is brought into on-state, so that a second output terminal outputs an off-voltage to a unit circuit 11 in the next stage. At this time, the transistor T3 is kept in off-state, so that no through-current flows to the transistors T24 and T3.
摘要翻译：本发明的至少一个实施例涉及即使当在全导通操作期间外部噪声被施加到移位寄存器时，也可以防止在单位电路中流过电流，并且还防止全通控制信号的负载增加线条。当向移位寄存器的单元电路提供高电平全通控制信号时，晶体管T3进入截止状态，晶体管T2不能向第一输出端子输出导通电压。然而，晶体管T24进入导通状态，使得第一输出端子向外部输出导通电压。另一方面，晶体管T32进入导通状态，使得第二输出端在下一级向单元电路11输出截止电压。此时，晶体管T3保持截止状态，使得没有贯通电流流向晶体管T24和T3。

5. 发明申请

US20120169753A1 MEMORY DEVICE, DISPLAY DEVICE EQUIPPED WITH MEMORY DEVICE, DRIVE METHOD FOR MEMORY DEVICE, AND DRIVE METHOD FOR DISPLAY DEVICE 有权
标题翻译：存储装置，具有存储装置的显示装置，用于存储装置的驱动方法和用于显示装置的驱动方法
公开(公告)号：US20120169753A1
公开(公告)日：2012-07-05
申请号：US13496027
申请日：2010-04-23
申请人： Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki , Seijirou Gyouten , Shuji Nishi
发明人： Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki , Seijirou Gyouten , Shuji Nishi
IPC分类号： G09G5/36 , G11C7/00 , G11C5/06
CPC分类号： G09G3/3659 , G09G2300/0417 , G09G2300/0823 , G09G2300/0842 , G09G2300/0861 , G09G2300/088 , G09G2330/022 , G11C11/405
摘要： A memory device is provided which includes a memory circuit that allows a circuit which carries out a refresh operation to suitably carry out an original operation of the circuit even if an off-leakage current occurs in a transfer element used in a transfer section. A memory cell includes a switching circuit, a first retaining section, a transfer section, a second retaining section, a first control section, and a voltage supply, and the first control section is controlled to be in (i) a state in which the first control section carries out a first operation in which the first control section is in an active state or a non-active state and (ii) a state in which the first control section carries out a second operation.
摘要翻译：提供了一种存储器件，其包括一个存储器电路，即使在转印部件中使用的转印元件中出现泄漏电流，允许进行刷新操作的电路适当地执行电路的原始操作。存储单元包括开关电路，第一保持部分，转移部分，第二保持部分，第一控制部分和电压源，并且第一控制部分被控制为处于（i）第一控制部分执行第一操作，其中第一控制部分处于活动状态或非活动状态，以及（ii）第一控制部分执行第二操作的状态。

6. 发明申请

US20100309184A1 SEMICONDUCTOR DEVICE AND DISPLAY DEVICE 有权
标题翻译：半导体器件和显示器件
公开(公告)号：US20100309184A1
公开(公告)日：2010-12-09
申请号：US12734595
申请日：2008-08-20
申请人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta
发明人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta
IPC分类号： G09G5/00 , H01L25/00
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0289 , G11C19/28 , H01L27/124 , H03K17/161 , H03K17/162 , H03K17/687
摘要： A circuit which is constituted by a plurality of n-channel transistors includes, in at least one embodiment, a transistor (T1) which has a drain terminal to which an input signal is supplied and a source terminal from which a output signal is supplied; and a transistor (T2) which has a drain terminal to which a control signal is supplied and a source terminal connected to a gate terminal of the transistor (T1). A gate terminal of the transistor (T2) is connected to the source terminal of the transistor (T2). With the arrangement, it is possible to provide (i) a semiconductor device which is constituted by transistors having an identical conductivity type and which is capable of reducing an influence of noise, and (ii) a display device including the semiconductor device.
摘要翻译：在至少一个实施例中，由多个n沟道晶体管构成的电路包括具有供给输入信号的漏极端子和提供输出信号的源极端子的晶体管（T1）; 以及具有提供控制信号的漏极端子和与晶体管（T1）的栅极端子连接的源极端子的晶体管（T2）。晶体管（T2）的栅极端子连接到晶体管（T2）的源极端子。通过该结构，可以提供（i）由具有相同导电类型并能够减小噪声影响的晶体管构成的半导体器件，以及（ii）包括半导体器件的显示器件。

7. 发明申请

US20100259525A1 SHIFT REGISTER AND DISPLAY DEVICE 有权
标题翻译：移位寄存器和显示设备
公开(公告)号：US20100259525A1
公开(公告)日：2010-10-14
申请号：US12734234
申请日：2008-08-18
申请人： Hiroyuki Ohkawa , Shige Furuta , Yasushi Sasaki , Yuhichiroh Murakami
发明人： Hiroyuki Ohkawa , Shige Furuta , Yasushi Sasaki , Yuhichiroh Murakami
IPC分类号： G06F3/038 , G11C19/00
CPC分类号： G11C19/28 , G09G3/20 , G09G3/3266 , G09G3/3275 , G09G3/3648 , G09G3/3674 , G09G3/3677 , G09G3/3685 , G09G3/3688 , G09G2300/0426 , G09G2310/0245 , G09G2310/0267 , G09G2310/0275 , G09G2310/0286 , G09G2310/0291
摘要： At least one embodiment of the present invention is directed to, even when external noise is applied to a shift register during all-on operation, preventing through-current from flowing in unit circuits and also to prevent increase in load on all-on control signal lines. When a high-level all-on control signal is provided to a unit circuit of a shift register, a transistor T3 is brought into off-state, so that a transistor T2 cannot output an on-voltage to a first output terminal. However, a transistor T24 is brought into on-state, so, that the first output terminal outputs an on-voltage to the exterior. On the other hand, a transistor T32 is brought into on-state, so that a second output terminal outputs an off-voltage to a unit circuit 11 in the next stage. At this time, the transistor T3 is kept in off-state, so that no through-current flows to the transistors T24 and T3. At least one embodiment of the present invention is suitable for driver circuits or suchlike of display devices and imaging devices.
摘要翻译：本发明的至少一个实施例涉及即使当在全导通操作期间外部噪声被施加到移位寄存器时，也可以防止贯通电流在单元电路中流动，并且还防止全导通控制信号上的负载增加线条。当向移位寄存器的单元电路提供高电平全通控制信号时，晶体管T3进入截止状态，晶体管T2不能向第一输出端子输出导通电压。然而，晶体管T24进入导通状态，因此，第一输出端子向外部输出导通电压。另一方面，晶体管T32进入导通状态，使得第二输出端在下一级向单元电路11输出截止电压。此时，晶体管T3保持截止状态，使得没有贯通电流流向晶体管T24和T3。本发明的至少一个实施例适用于诸如显示装置和成像装置的驱动电路等。

8. 发明授权

US09070471B2 Shift register, display-driving circuit, displaying panel, and displaying device 有权
标题翻译：移位寄存器，显示驱动电路，显示面板和显示设备
公开(公告)号：US09070471B2
公开(公告)日：2015-06-30
申请号：US13377838
申请日：2010-03-18
申请人： Shige Furuta , Makoto Yokoyama , Yasushi Sasaki , Yuhichiroh Murakami
发明人： Shige Furuta , Makoto Yokoyama , Yasushi Sasaki , Yuhichiroh Murakami
IPC分类号： G09G3/36 , G06F3/038 , G11C19/28
CPC分类号： G11C19/28 , G09G3/3677 , G09G2310/063
摘要： Provided is a shift register of a display-driving circuit which carries out simultaneous selection of a plurality of signal lines by using a simultaneous selection signal. A stage of the shift register includes (i) a set-reset type flip-flop and (ii) a signal generating circuit which generates an output signal of the stage by selectively outputting a signal in response to an output of the flip-flop. The output signal of the stage (i) becomes active due to an activation of the simultaneous selection signal and then (ii) remains active while the simultaneous selection is being performed, and the output from the flip-flop is inactive during a period in which a setting signal and a resetting signal are both being active. This makes it possible to quickly carry out the simultaneous selection of all the signal lines and the initialization of the shift register.
摘要翻译：提供了一种显示驱动电路的移位寄存器，其通过使用同时选择信号来执行多个信号线的同时选择。移位寄存器的一级包括（i）设置复位型触发器和（ii）信号发生电路，其通过响应于触发器的输出选择性地输出信号来产生该级的输出信号。由于同时选择信号的激活，阶段（i）的输出信号变为有效，然后（ii）在执行同时选择时保持有效，并且触发器的输出在其中设定信号和复位信号均处于活动状态。这使得可以快速地执行所有信号线的同时选择和移位寄存器的初始化。

9. 发明授权

US08896511B2 Display apparatus and display apparatus driving method 有权
标题翻译：显示装置和显示装置的驱动方法
公开(公告)号：US08896511B2
公开(公告)日：2014-11-25
申请号：US13395681
申请日：2010-05-18
申请人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
发明人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
IPC分类号： G09G3/36 , G09G5/00 , G02F1/1362
CPC分类号： G09G3/3648 , G02F1/13624 , G09G3/3614 , G09G2300/0857 , G09G2310/08 , G09G2320/0219 , G09G2330/021
摘要： In an active matrix display apparatus including: pixels provided in a matrix pattern, the pixels each including a memory circuit which retains data while refreshing the data, a data signal electric potential which is supplied from a source line in a period t1 and written to a node which is connected to a liquid capacitor is higher than a data electric potential of the node, the data electric potential being obtained in a period t14 after a refresh operation of the memory circuit.
摘要翻译：在一种有源矩阵显示装置中，包括以矩阵模式提供的像素，每个像素包括一个在刷新数据的同时保留数据的存储电路，在时间段t1内从源极线提供的数据信号电位被写入到连接到液体电容器的节点高于节点的数据电位，在存储器电路的刷新操作之后的周期t14中获得数据电位。

10. 发明授权

US08866720B2 Memory device and display device equipped with memory device 有权
标题翻译：内存设备和显示设备配备内存设备
公开(公告)号：US08866720B2
公开(公告)日：2014-10-21
申请号：US13496027
申请日：2010-04-23
申请人： Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki , Seijirou Gyouten , Shuji Nishi
发明人： Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki , Seijirou Gyouten , Shuji Nishi
IPC分类号： G09G5/36 , G11C11/405 , G09G3/36
CPC分类号： G09G3/3659 , G09G2300/0417 , G09G2300/0823 , G09G2300/0842 , G09G2300/0861 , G09G2300/088 , G09G2330/022 , G11C11/405
摘要： A memory device is provided which includes a memory circuit that allows a circuit which carries out a refresh operation to suitably carry out an original operation of the circuit even if an off-leakage current occurs in a transfer element used in a transfer section. A memory cell includes a switching circuit, a first retaining section, a transfer section, a second retaining section, a first control section, and a voltage supply, and the first control section is controlled to be in (i) a state in which the first control section carries out a first operation in which the first control section is in an active state or a non-active state and (ii) a state in which the first control section carries out a second operation.
摘要翻译：提供了一种存储器件，其包括一个存储器电路，即使在转印部件中使用的转印元件中出现泄漏电流，允许进行刷新操作的电路适当地执行电路的原始操作。存储单元包括开关电路，第一保持部分，转移部分，第二保持部分，第一控制部分和电压源，并且第一控制部分被控制为处于（i）第一控制部分执行第一操作，其中第一控制部分处于活动状态或非活动状态，以及（ii）第一控制部分执行第二操作的状态。

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