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    • 1. 发明授权
    • Robust and Efficient dynamic voltage scaling for portable devices
    • 强大而有效的便携式设备的动态电压缩放
    • US07583555B2
    • 2009-09-01
    • US10814935
    • 2004-03-30
    • Inyup KangKarthikeyan EthirajanMatthew Levi SeversonMohamed ElgebalyManoj SachdevAmr Fahim
    • Inyup KangKarthikeyan EthirajanMatthew Levi SeversonMohamed ElgebalyManoj SachdevAmr Fahim
    • G11C7/00G05F1/40
    • G05F1/40G06F1/3203G06F1/324G06F1/3296Y02D10/126Y02D10/172
    • A method and apparatus for voltage regulation uses, in one aspect, worst-case supply voltages specific to the process split of the integrated device at issue. In another aspect, a two-phase voltage regulation system and method identifies the characterization data pertinent to a family of integrated circuit devices in a first phase, and identifies an associated process split of a candidate integrated circuit device in a second phase. The characterization data from the first phase is then used to provide supply voltages that correspond to target frequencies of operation for the candidate device. In another aspect, a hybrid voltage regulator circuit includes an open loop circuit which automatically identifies the process split of the integrated circuit device and allows a regulator to modify supply voltage based on characterization data specific to that process split, and a closed loop circuit which fine-tunes the supply voltage. In one embodiment, the closed-loop circuit includes a critical path replica for providing estimated frequencies of operation necessary for a critical path in the integrated circuit device. A ring oscillator circuit may be used in one embodiment in the critical path and/or in the open loop circuit.
    • 一方面,用于电压调节的方法和装置在一个方面使用特定于所讨论的集成器件的工艺分裂的最坏情况的电源电压。 在另一方面,两相电压调节系统和方法识别与第一阶段中的集成电路器件系列相关的特征数据,并且识别在第二阶段中候选集成电路器件的相关联的工艺分组。 然后使用来自第一阶段的表征数据来提供对应于候选设备的目标操作频率的电源电压。 另一方面,混合电压调节器电路包括开环电路,其自动识别集成电路器件的工艺分离,并且允许调节器基于该工艺分离特有的特性数据修改供电电压,以及闭环电路 调节电源电压。 在一个实施例中,闭环电路包括关键路径副本,用于提供集成电路设备中的关键路径所需的估计工作频率。 在一个实施例中,在关键路径和/或开环电路中可以使用环形振荡器电路。
    • 4. 发明授权
    • Headswitch and footswitch circuitry for power management
    • 用于电源管理的头开关和脚踏开关电路
    • US07279926B2
    • 2007-10-09
    • US10856526
    • 2004-05-27
    • Matthew Levi SeversonChih-tung ChenGeoffrey ShippeeSorin Dobre
    • Matthew Levi SeversonChih-tung ChenGeoffrey ShippeeSorin Dobre
    • H03K19/23
    • H03K19/0016
    • In general, this disclosure is directed to circuitry for implementation of headswitches and footswitches in an ASIC for power management. The disclosed circuitry supports not only effective power management, but also efficient use of ASIC area, reduced complexity, and the use of electronic design automation (EDA) tools. In this manner, the disclosed circuitry can support enhanced performance and simplified ASIC design. In some cases, headswitch or footswitch circuitry may be implemented as a switch pad ring that extends around a hard macro forming part of an ASIC core. In other cases, headswitch or footswitch circuitry can be distributed within an ASIC core by embedding distributed headswitch or footswitch components under metal layer power routing coupled to standard cell rows.
    • 通常,本公开涉及用于在用于电力管理的ASIC中实现头戴式开关和脚踏开关的电路。 所公开的电路不仅支持有效的电源管理,而且还有效地利用ASIC区域,降低复杂性以及使用电子设计自动化(EDA)工具。 以这种方式,所公开的电路可以支持增强的性能和简化的ASIC设计。 在一些情况下,头开关或脚踏开关电路可以实现为围绕形成ASIC核心的一部分的宏宏延伸的开关板环。 在其他情况下,通过将耦合到标准单元行的金属层功率路由嵌入分布式头部开关或脚踏开关组件,可将头开关或脚踏开关电路分布在ASIC内部。