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1. 发明授权

US09874917B2 Adaptive power capping in a chip 有权
公开(公告)号：US09874917B2
公开(公告)日：2018-01-23
申请号：US14986944
申请日：2016-01-04
申请人： International Business Machines Corporation
发明人： Charles R. Lefurgy , Preetham M. Lobo , Richard F. Rizzolo , Malcolm S. Allen-Ware , Tobias Webel
IPC分类号： G06F1/28 , G06F1/32
CPC分类号： G06F1/28 , G06F1/32 , G06F1/324 , G06F1/3243 , G06F1/3296 , G06F9/44
摘要： Adaptive power capping in a chip that includes a plurality of cores in a processing system is provided. An active power demand for the chip is dynamically determined based on observed events of the cores. An average temperature of the chip is computed using one or more on-chip thermal sensors in the cores to estimate leakage power of the chip. A power capping threshold that incorporates the estimate of leakage power is determined based on the average temperature of the chip. Power capping is performed by throttling the cores based on determining that the active power demand for the chip exceeds the power capping threshold.

2. 发明授权

US09733685B2 Temperature-aware microprocessor voltage management 有权
公开(公告)号：US09733685B2
公开(公告)日：2017-08-15
申请号：US14967929
申请日：2015-12-14
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Charles R. Lefurgy , Karthick Rajamani , Richard F. Rizzolo , Malcolm S. Allen-Ware
IPC分类号： G06F1/00 , G06F1/26 , G05F1/625
CPC分类号： G06F1/26 , G05F1/625 , G06F1/206
摘要： A method, system, and computer program product for controlling power supplied to a processor is disclosed. A voltage regulator is set to a first voltage regulator set point, wherein the first voltage regulator set point provides a first load line for operation of the processor. A change in an operation of the processor from a first operating condition along the first load line to a second operating condition along the first load line is determined. The voltage regulator is the set to a second voltage regulator set point and the processor is operated at a third operating condition on a second load line corresponding to the second voltage regulator set point.

3. 发明授权

US10048734B2 Adaptive power capping in a chip 有权
公开(公告)号：US10048734B2
公开(公告)日：2018-08-14
申请号：US15831576
申请日：2017-12-05
申请人： International Business Machines Corporation
发明人： Charles R. Lefurgy , Preetham M. Lobo , Richard F. Rizzolo , Malcolm S. Allen-Ware , Tobias Webel
IPC分类号： G06F1/32 , G06F1/28 , G06F9/44
摘要： Adaptive power capping in a chip that includes a plurality of cores in a processing system is provided. An active power demand for the chip is dynamically determined based on observed events of the cores. An average temperature of the chip is computed using one or more on-chip thermal sensors in the cores to estimate leakage power of the chip. A power capping threshold that incorporates the estimate of leakage power is determined based on the average temperature of the chip. Power capping is performed by throttling the cores based on determining that the active power demand for the chip exceeds the power capping threshold.

4. 发明申请

US20180081413A1 ADAPTIVE POWER CAPPING IN A CHIP 审中-公开
公开(公告)号：US20180081413A1
公开(公告)日：2018-03-22
申请号：US15831576
申请日：2017-12-05
申请人： International Business Machines Corporation
发明人： Charles R. Lefurgy , Preetham M. Lobo , Richard F. Rizzolo , Malcolm S. Allen-Ware , Tobias Webel
IPC分类号： G06F1/28 , G06F1/32 , G06F9/44
CPC分类号： G06F1/28 , G06F1/32 , G06F1/324 , G06F1/3243 , G06F1/3296 , G06F9/44
摘要： Adaptive power capping in a chip that includes a plurality of cores in a processing system is provided. An active power demand for the chip is dynamically determined based on observed events of the cores. An average temperature of the chip is computed using one or more on-chip thermal sensors in the cores to estimate leakage power of the chip. A power capping threshold that incorporates the estimate of leakage power is determined based on the average temperature of the chip. Power capping is performed by throttling the cores based on determining that the active power demand for the chip exceeds the power capping threshold.

5. 发明申请

US20170168534A1 TEMPERATURE-AWARE MICROPROCESSOR VOLTAGE MANAGEMENT 有权
公开(公告)号：US20170168534A1
公开(公告)日：2017-06-15
申请号：US14967929
申请日：2015-12-14
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Charles R. Lefurgy , Karthick Rajamani , Richard F. Rizzolo , Malcolm S. Allen-Ware
IPC分类号： G06F1/26 , G05F1/625
CPC分类号： G06F1/26 , G05F1/625 , G06F1/206
摘要： A method, system, and computer program product for controlling power supplied to a processor is disclosed. A voltage regulator is set to a first voltage regulator set point, wherein the first voltage regulator set point provides a first load line for operation of the processor. A change in an operation of the processor from a first operating condition along the first load line to a second operating condition along the first load line is determined. The voltage regulator is the set to a second voltage regulator set point and the processor is operated at a third operating condition on a second load line corresponding to the second voltage regulator set point.

6. 发明申请

US20170192477A1 ADAPTIVE POWER CAPPING IN A CHIP 有权
公开(公告)号：US20170192477A1
公开(公告)日：2017-07-06
申请号：US14986944
申请日：2016-01-04
申请人： International Business Machines Corporation
发明人： Charles R. Lefurgy , Preetham M. Lobo , Richard F. Rizzolo , Malcolm S. Allen-Ware , Tobias Webel
IPC分类号： G06F1/28
CPC分类号： G06F1/28 , G06F1/32 , G06F1/324 , G06F1/3243 , G06F1/3296 , G06F9/44
摘要： Adaptive power capping in a chip that includes a plurality of cores in a processing system is provided. An active power demand for the chip is dynamically determined based on observed events of the cores. An average temperature of the chip is computed using one or more on-chip thermal sensors in the cores to estimate leakage power of the chip. A power capping threshold that incorporates the estimate of leakage power is determined based on the average temperature of the chip. Power capping is performed by throttling the cores based on determining that the active power demand for the chip exceeds the power capping threshold.

7. 发明授权

US09575529B2 Voltage droop reduction in a processor 有权
标题翻译：处理器中的电压下降降低
公开(公告)号：US09575529B2
公开(公告)日：2017-02-21
申请号：US14863995
申请日：2015-09-24
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Brian W. Curran , Preetham M. Lobo , Richard F. Rizzolo , James D. Warnock , Tobias Webel
IPC分类号： G06F1/26
CPC分类号： G06F1/26 , G06F1/28 , G06F1/3206
摘要： A processor is provided having a common supply rail, and one or more processor cores, where the one or more processor cores share the common supply rail. Each processor core(s) includes a core dIPC value output and a core throttling signal input, and a chip power management logic, which has at least one input for inputting the core dIPC value, a threshold register for a dIPC threshold value, a chip dIPC register for a current global dIPC value, at least one chip dIPC history register for a historic global dIPC value, a subtractor providing an absolute difference of an average historic global dIPC derived from the historic global dIPC value and the current global dIPC value, a magnitude comparator providing a throttling signal when the absolute difference is above the dIPC threshold value, and at least one output for outputting a core throttling signal to the processor core(s).
摘要翻译：提供了具有公共供电轨的处理器和一个或多个处理器核，其中所述一个或多个处理器核共享共同的供电轨。每个处理器核心包括核心dIPC值输出和核心节流信号输入，以及芯片功率管理逻辑，其具有至少一个用于输入核心dIPC值的输入，用于dIPC阈值的阈值寄存器，芯片 dIPC寄存器用于当前全局dIPC值，至少一个用于历史全局dIPC值的码片dIPC历史寄存器，提供来自历史全球dIPC值和当前全局dIPC值的平均历史全球dIPC的绝对差的减法器，a 幅度比较器在绝对差高于dIPC阈值时提供节流信号，以及至少一个输出，用于向处理器核心输出核心节流信号。

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