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1. 发明授权

US10545824B2 Selective error coding 有权
公开(公告)号：US10545824B2
公开(公告)日：2020-01-28
申请号：US15809046
申请日：2017-11-10
申请人： International Business Machines Corporation
发明人： Diyanesh Babu Chinnakkonda Vidyapoornachary , Timothy J. Dell , Marc A. Gollub , Anil B. Lingambudi
IPC分类号： G06F11/10 , G11C29/52 , G11C29/42 , G11C29/44 , G06F3/06 , G11C11/401
摘要： A system and method of performing selective error coding in memory management of a memory device are described. The method includes performing a process of detecting and correcting memory errors in the memory of the memory device either prior to or after a chip mark associated with the memory device is in place. The method also includes localizing hard errors of the memory device based on a second process of detecting the memory errors in the memory of the memory device, the hard errors being persistent memory errors that persist from the process of detecting and correcting the memory errors to the second process, determining an extent of the hard errors based on the localizing, and preventing placement of the chip mark or removing the chip mark after de-allocating one or more ranges of addresses based on a result of the determining the extent of the hard errors.

2. 发明申请

US20160357628A1 SELECTIVE ERROR CODING 有权
公开(公告)号：US20160357628A1
公开(公告)日：2016-12-08
申请号：US14732945
申请日：2015-06-08
申请人： International Business Machines Corporation
发明人： Diyanesh Babu Chinnakkonda Vidyapoornachary , Timothy J. Dell , Marc A. Gollub , Anil B. Lingambudi
IPC分类号： G06F11/10 , G11C29/52
CPC分类号： G06F11/1068 , G06F3/0619 , G06F3/064 , G06F3/0652 , G06F3/0679 , G06F11/106 , G11C11/401 , G11C29/42 , G11C29/44 , G11C29/52
摘要： A system and method of performing selective error coding in memory management of a memory device are described. The method includes performing a process of detecting and correcting memory errors in the memory of the memory device either prior to or after a chip mark associated with the memory device is in place. The method also includes localizing hard errors of the memory device based on a second process of detecting the memory errors in the memory of the memory device, the hard errors being persistent memory errors that persist from the process of detecting and correcting the memory errors to the second process, determining an extent of the hard errors based on the localizing, and preventing placement of the chip mark or removing the chip mark after de-allocating one or more ranges of addresses based on a result of the determining the extent of the hard errors.

3. 发明授权

US10255986B2 Assessing in-field reliability of computer memories 有权
公开(公告)号：US10255986B2
公开(公告)日：2019-04-09
申请号：US15617158
申请日：2017-06-08
申请人： International Business Machines Corporation
发明人： Diyanesh B. Chinnakkonda Vidyapoornachary , Kyu-hyoun Kim , Anil B. Lingambudi , Adam J. McPadden
IPC分类号： G06F11/00 , G11C29/10 , G06F11/10 , G11C29/42 , G11C29/12
摘要： The present invention provides a computer implemented method, system, and computer program product of assessing in-field reliability of computer memories. In an embodiment, the present invention includes taking control of a portion of a computer memory circuit, utilizing a portion of a computer memory bus associated with the portion of the computer memory circuit, moving computer memory circuit data stored in the portion of the computer memory circuit to a host computer storage device, executing a set of logical operations assessing reliability of the portion of the computer memory circuit, resulting in assessment data stored in a reliability error monitor (REM) computer storage device, transmitting the stored assessment data from the REM computer storage device to a computer memory controller circuit, and in response to the transmitting, moving the moved computer memory circuit data from the host computer storage device back to the portion of the computer memory circuit.

4. 发明申请

US20170293514A1 HANDLING REPAIRED MEMORY ARRAY ELEMENTS IN A MEMORY OF A COMPUTER SYSTEM 有权
公开(公告)号：US20170293514A1
公开(公告)日：2017-10-12
申请号：US15096344
申请日：2016-04-12
申请人： International Business Machines Corporation
发明人： David D. Cadigan , Charles A. Kilmer , Anil B. Lingambudi , Adam J. McPadden , Anuwat Saetow
IPC分类号： G06F11/07 , G06F11/10
CPC分类号： G06F11/076 , G06F11/0727 , G06F11/0793 , G06F11/1048 , G06F11/1076
摘要： An aspect includes identifying a repaired memory array element in a memory array, and identifying memory array elements in the memory array that are adjacent to the repaired memory array element. A group that includes the repaired and adjacent memory array elements is formed and monitored for error conditions. It is determined whether a number of the error conditions exceeds a threshold. A repair action is performed to the memory array based on determining that the number of error conditions exceeds the threshold.

5. 发明授权

US09600187B2 Virtual grouping of memory 有权
公开(公告)号：US09600187B2
公开(公告)日：2017-03-21
申请号：US15244010
申请日：2016-08-23
申请人： International Business Machines Corporation
发明人： Timothy J. Dell , Prasanna Jayaraman , Anil B. Lingambudi , Girisankar Paulraj
IPC分类号： G06F12/00 , G06F3/06
CPC分类号： G06F3/0617 , G06F3/0631 , G06F3/0664 , G06F3/0683 , G06F12/0646 , G06F12/0661 , G06F2212/1024 , G06F2212/152
摘要： The present disclosure includes identifying, in a memory system, a capacity for each of a plurality of memory modules for a first memory channel having a first amount of memory and a second memory channel having a second amount of memory; determining a memory segment size from the capacities of the memory modules; identifying a first memory segment of the memory segment size for the first memory channel and a second memory segment of the memory segment size for the second memory channel; and creating a virtual group that includes the first memory segment and the second memory segment and that uses less than the entire first amount of memory from the first memory channel.

6. 发明授权

US09459672B2 Capacitance management 有权
标题翻译：电容管理
公开(公告)号：US09459672B2
公开(公告)日：2016-10-04
申请号：US13929896
申请日：2013-06-28
申请人： International Business Machines Corporation
发明人： Kyu-hyoun Kim , Anil B. Lingambudi , Diyanesh B. Vidyapoornachary
IPC分类号： H02M3/08 , G06F1/26
CPC分类号： G06F1/26
摘要： A system and method are provided for sharing capacitance. The system may include a first electronic entity with a capacitor having capacitance. The system may further include a switched path in the first electronic entity. The switched path may have a first switched position in which the switched path provides the capacitance to a voltage using device in first electronic entity. The switched path may also have a second switched position in which the switched path provides the capacitance to a second electronic entity. The switched path may also have a third switched position in which the switched path provides the capacitance to both the voltage-using device in the first electronic entity and the second electronic entity.
摘要翻译：提供一种用于共享电容的系统和方法。该系统可以包括具有电容器的电容器的第一电子实体。系统还可以包括第一电子实体中的切换路径。开关路径可以具有第一开关位置，其中开关路径使用第一电子实体中的装置向电压提供电容。切换路径还可以具有第二切换位置，其中切换路径将电容提供给第二电子实体。开关路径还可以具有第三开关位置，其中开关路径向第一电子实体和第二电子实体中的电压使用装置提供电容。

7. 发明申请

US20150270017A1 TRAFFIC AND TEMPERATURE BASED MEMORY TESTING 有权
公开(公告)号：US20150270017A1
公开(公告)日：2015-09-24
申请号：US14220924
申请日：2014-03-20
申请人： International Business Machines Corporation
发明人： Diyanesh B. Chinnakkonda Vidyapoornachary , Timothy J. Dell , Joab D. Henderson , Anil B. Lingambudi , Michael D. Pardeik
IPC分类号： G11C29/50
CPC分类号： G11C29/50 , G11C5/04 , G11C7/04 , G11C29/06 , G11C29/50004 , G11C2029/5002
摘要： According to embodiments of the disclosure, methods, systems, and computer program products for memory module testing are disclosed. The method may include accessing, with a first stress test, a plurality of memory modules, the plurality of memory modules coupled in a computer system, the plurality of memory modules including a first module having a first memory characteristic and a second module having a second memory characteristic. The method may include determining for the first module, a first traffic-to-temperature parameter, and determining that the first module was sufficiently stressed in response to determining that the first traffic-to-temperature parameter is within a first traffic-to-temperature range. The method may also include determining, for the second module, a second traffic-to-temperature parameter, and determining that the second module was sufficiently stressed in response to determining that the second traffic-to-temperature parameter is within a second traffic-to-temperature range.

8. 发明申请

US20150169446A1 VIRTUAL GROUPING OF MEMORY 审中-公开
标题翻译：记忆虚拟分组
公开(公告)号：US20150169446A1
公开(公告)日：2015-06-18
申请号：US14247331
申请日：2014-04-08
申请人： International Business Machines Corporation
发明人： Timothy J. Dell , Prasanna Jayaraman , Anil B. Lingambudi , Girisankar Paulraj
IPC分类号： G06F12/06
CPC分类号： G06F3/0617 , G06F3/0631 , G06F3/0664 , G06F3/0683 , G06F12/0646 , G06F12/0661 , G06F2212/1024 , G06F2212/152
摘要： The present disclosure includes identifying, in a memory system, a capacity for each of a plurality of memory modules for a first memory channel having a first amount of memory and a second memory channel having a second amount of memory; determining a memory segment size from the capacities of the memory modules; identifying a first memory segment of the memory segment size for the first memory channel and a second memory segment of the memory segment size for the second memory channel; and creating a virtual group that includes the first memory segment and the second memory segment and that uses less than the entire first amount of memory from the first memory channel.
摘要翻译：本公开包括在存储器系统中识别具有第一存储器量的第一存储器通道的多个存储器模块中的每一个的容量以及具有第二存储量的第二存储器通道; 从所述存储器模块的容量确定存储器段大小; 识别第一存储器通道的存储器段大小的第一存储器段和用于第二存储器通道的存储器段大小的第二存储器段; 以及创建包括所述第一存储器段和所述第二存储器段并且使用来自所述第一存储器通道的小于所述第一量的存储器的虚拟组。

9. 发明申请

US20150169445A1 VIRTUAL GROUPING OF MEMORY 审中-公开
公开(公告)号：US20150169445A1
公开(公告)日：2015-06-18
申请号：US14104438
申请日：2013-12-12
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Timothy J. Dell , Prasanna Jayaraman , Anil B. Lingambudi , Girisankar Paulraj
IPC分类号： G06F12/06
CPC分类号： G06F3/0617 , G06F3/0631 , G06F3/0664 , G06F3/0683 , G06F12/0646 , G06F12/0661 , G06F2212/1024 , G06F2212/152
摘要： The present disclosure includes identifying, in a memory system, a capacity for each of a plurality of memory modules for a first memory channel having a first amount of memory and a second memory channel having a second amount of memory; determining a memory segment size from the capacities of the memory modules; identifying a first memory segment of the memory segment size for the first memory channel and a second memory segment of the memory segment size for the second memory channel; and creating a virtual group that includes the first memory segment and the second memory segment and that uses less than the entire first amount of memory from the first memory channel.

10. 发明申请

US20140328132A1 MEMORY MARGIN MANAGEMENT 有权
标题翻译：内存管理
公开(公告)号：US20140328132A1
公开(公告)日：2014-11-06
申请号：US13886971
申请日：2013-05-03
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Edgar R. Cordero , Timothy J. Dell , Anil B. Lingambudi , Diyanesh B. Vidyapoornachary
IPC分类号： G11C29/50 , G11C11/4063
CPC分类号： G11C29/50012 , G11C5/04 , G11C29/023 , G11C29/028
摘要： A method for testing and correcting a memory system is described. The method includes selecting a target memory unit of the memory system having a timing margin in response to a trigger to start a timing margin measurement. The stored data in the target memory unit is moved to a spare memory unit. The memory system performs reads and writes of user data from the spare memory unit while measuring the target memory unit. The timing margins of the target memory unit are measured. The reliability of the measured timing margins of the target memory unit based on a timing margin profile is determined.
摘要翻译：描述了一种用于测试和校正存储器系统的方法。该方法包括响应于触发来选择具有定时裕度的存储器系统的目标存储器单元以开始定时裕度测量。存储在目标存储器单元中的数据被移动到备用存储器单元。存储器系统在测量目标存储器单元的同时执行从备用存储器单元读取和写入用户数据。测量目标存储器单元的定时裕度。确定基于定时裕度分布的目标存储器单元的测量的定时裕度的可靠性。

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