会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • FinFET and method of manufacturing same
    • FinFET及其制造方法
    • US09515169B2
    • 2016-12-06
    • US14904140
    • 2013-10-22
    • Institute of Microelectronics, Chinese Academy of Sciences
    • Haizhou YinYunfei Liu
    • H01L29/66H01L29/78H01L21/02H01L21/311H01L21/762H01L29/06
    • H01L29/66795H01L21/02164H01L21/0217H01L21/31116H01L21/76224H01L29/0649H01L29/6653H01L29/66545H01L29/66818H01L29/785H01L29/7851
    • There is provided a FinFET fabricating method, comprising: a. providing a substrate ; b. forming a fin on the substrate; c. forming a channel protective layer on the fin; d. forming a shallow trench isolation on both sides of the fin; e. forming a sacrificial gate stack and a spacer on the top surface and sidewalls of the channel region which is in the middle of the fin; f. forming source/drain regions in both ends of the fin; g. depositing an interlayer dielectric layer on the sacrificial gate stack and the source/drain regions, planarizing later to expose the sacrificial gate stack; h. removing the sacrificial gate stack stack to form a sacrificial gate vacancy and expose the channel region and the channel protective layer; i. covering a portion of the semiconductor structure in one end of the fin with a photoresist layer; j. removing a portion of the spacer not covered; k. removing the photoresist layer and filling a gate stack in the sacrificial gate vacancy; l. planarizing the semiconductor structure formed by the foregoing steps to expose the channel protective layer and forming a first separated gate stack and a second separated gate stack. Comparing with the prior art, control ability of independent-gate-voltage FinFET can be effectively improved and it is good for device performance.
    • 提供了一种FinFET制造方法,包括:a。 提供衬底; b。 在基板上形成翅片; C。 在翅片上形成通道保护层; d。 在鳍的两侧形成浅沟槽隔离; e。 在鳍的中间的沟道区的顶表面和侧壁上形成牺牲栅叠层和间隔物; F。 在鳍的两端形成源/漏区; G。 在所述牺牲栅极堆叠和所述源极/漏极区域上沉积层间电介质层,以稍后平坦化以暴露所述牺牲栅极堆叠; H。 去除牺牲栅极堆叠堆叠以形成牺牲栅极空位并暴露沟道区域和沟道保护层; 一世。 用光致抗蚀剂层覆盖鳍的一端中的半导体结构的一部分; j。 去除未覆盖的间隔件的一部分; k。 去除光致抗蚀剂层并在牺牲栅极空位中填充栅极堆叠; l。 平面化由上述步骤形成的半导体结构以暴露沟道保护层并形成第一分离的栅极堆叠和第二分离栅极堆叠。 与现有技术相比,可以有效提高独立栅极电压FinFET的控制能力,对器件性能有好处。
    • 2. 发明申请
    • METHOD FOR MANUFACTURING FINFET
    • 制造FINFET的方法
    • US20160276467A1
    • 2016-09-22
    • US14905465
    • 2013-10-22
    • INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
    • Yunfei LiuHaizhou YinKeke Zhang
    • H01L29/66H01L29/49H01L29/06
    • H01L29/66795H01L21/823418H01L21/823431H01L29/0649H01L29/4966H01L29/66545H01L29/785H01L29/7853
    • A method of manufacturing a FinFET device is provided, comprising: a. providing a substrate (100); b. forming a fin (200) on the substrate; c. forming an shallow trench isolation structure (300) on the substrate; d. forming an sacrificial gate stack on the isolation structure, wherein the sacrificial gate stack intersects the fin; e. forming source/drain doping regions by ion implantation into the fin; f. depositing an interlayer dielectric layer (400) on the substrate; g. removing the sacrificial gate stack to form a sacrificial gate vacancy; h. forming an doped region (201) under the sacrificial gate vacancy; i. etching the shallow trench isolation structure (300) under the sacrificial gate vacancy until the top surface of the shallow trench isolation structure (300) levels with the bottom surface of the source/drain doping regions; j. forming a new gate stack in the sacrificial gate vacancy. Some advantages of the current invention may be, harmful effects produced in the source/drain regions by the triangle fin structure are eliminated, the device performance is improved, and the complexity of the process is reduce.
    • 提供一种制造FinFET器件的方法,包括:a。 提供衬底(100); b。 在所述基板上形成翅片(200); C。 在衬底上形成浅沟槽隔离结构(300); d。 在所述隔离结构上形成牺牲栅极堆叠,其中所述牺牲栅极堆叠与所述鳍片相交; e。 通过离子注入形成源极/漏极掺杂区域; F。 在衬底上沉积层间电介质层(400); G。 去除牺牲栅极堆叠以形成牺牲栅极空位; H。 在牺牲栅极空位下形成掺杂区域(201); 一世。 在牺牲栅极空位下蚀刻浅沟槽隔离结构(300),直到浅沟槽隔离结构(300)的顶表面与源极/漏极掺杂区域的底表面一致; j。 在牺牲栅极空位中形成新的栅极堆叠。 本发明的一些优点可以是消除由三角鳍结构在源极/漏极区域产生的有害影响,提高了器件性能,并且降低了工艺的复杂性。
    • 3. 发明授权
    • Method for manufacturing finFET
    • finFET的制造方法
    • US09577074B2
    • 2017-02-21
    • US14905465
    • 2013-10-22
    • Institute of Microelectronics, Chinese Academy of Sciences
    • Yunfei LiuHaizhou YinKeke Zhang
    • H01L29/49H01L29/66H01L21/8234H01L29/78H01L29/06
    • H01L29/66795H01L21/823418H01L21/823431H01L29/0649H01L29/4966H01L29/66545H01L29/785H01L29/7853
    • A method of manufacturing a FinFET device is provided, comprising: a. providing a substrate (100); b. forming a fin (200) on the substrate; c. forming an shallow trench isolation structure (300) on the substrate; d. forming an sacrificial gate stack on the isolation structure, wherein the sacrificial gate stack intersects the fin; e. forming source/drain doping regions by ion implantation into the fin; f. depositing an interlayer dielectric layer (400) on the substrate; g. removing the sacrificial gate stack to form a sacrificial gate vacancy; h. forming an doped region (201) under the sacrificial gate vacancy; i. etching the shallow trench isolation structure (300) under the sacrificial gate vacancy until the top surface of the shallow trench isolation structure (300) levels with the bottom surface of the source/drain doping regions; j. forming a new gate stack in the sacrificial gate vacancy. Some advantages of the current invention may be, harmful effects produced in the source/drain regions by the triangle fin structure are eliminated, the device performance is improved, and the complexity of the process is reduce.
    • 提供一种制造FinFET器件的方法,包括:a。 提供衬底(100); b。 在所述基板上形成翅片(200); C。 在衬底上形成浅沟槽隔离结构(300); d。 在所述隔离结构上形成牺牲栅极堆叠,其中所述牺牲栅极堆叠与所述鳍片相交; e。 通过离子注入形成源极/漏极掺杂区域; F。 在衬底上沉积层间电介质层(400); G。 去除牺牲栅极堆叠以形成牺牲栅极空位; H。 在牺牲栅极空位下形成掺杂区域(201); 一世。 在牺牲栅极空位下蚀刻浅沟槽隔离结构(300),直到浅沟槽隔离结构(300)的顶表面与源极/漏极掺杂区域的底表面一致; j。 在牺牲栅极空位中形成新的栅极堆叠。 本发明的一些优点可以是消除由三角鳍结构在源极/漏极区域产生的有害影响,提高了器件性能,并且降低了工艺的复杂性。