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1. 发明申请

US20040197576A1 Adhesion layer for Pt on SiO2 有权
标题翻译： Pt上的粘附层
公开(公告)号：US20040197576A1
公开(公告)日：2004-10-07
申请号：US10408339
申请日：2003-04-07
申请人： Infineon Technologies North America Corp. , International Business Machines Corporation
发明人： Jingyu Lian , Kwong Hon Wong , Michael Wise , Young Limb , Nicolas Nagel
IPC分类号： B32B009/04 , B32B015/04
CPC分类号： H01L28/65 , Y10T428/12597 , Y10T428/12875
摘要： Si, Al, Al plus TiN, and Ir02 are used as adhesion layers to prevent peeling of noble metal electrodes, such as Pt, from a silicon dioxide (5i02) substrate in capacitor structures of memory devices.
摘要翻译： Si，Al，Al，TiN和IrO 2用作粘合层，以防止诸如Pt的贵金属电极从存储器件的电容器结构中的二氧化硅（5i02）衬底剥离。

2. 发明申请

US20040110380A1 TEOS assisted oxide CMP process 失效
标题翻译： TEOS辅助氧化物CMP工艺
公开(公告)号：US20040110380A1
公开(公告)日：2004-06-10
申请号：US10314865
申请日：2002-12-09
申请人： International Business Machines Corporation , Infineon Technologies North America Corp.
发明人： Jochen Beintner , Laertis Economikos , Michael Wise , Andreas Knorr
IPC分类号： H01L021/302 , H01L021/461
CPC分类号： H01L21/76819 , H01L21/31053 , H01L21/31055 , H01L27/1087 , H01L27/10894
摘要： CMP of integrated circuits containing DRAM arrays with trench capacitors fill the trenches with oxide, resulting in a an array of oxide structures that is dense compared with the concentration in the surrounding support structures and therefore has a higher loading. A conformal layer is deposited over the wafer, increasing the loading in the array, but filling in spaces between active areas. A blanket etch removes material in both the array and the supports. A block etch balances the amount of material in the array and the supports. A supplementary oxide deposition in the array fills spaces between the structures to a nearly uniform density.
摘要翻译：包含具有沟槽电容器的DRAM阵列的集成电路的CMP用氧化物填充沟槽，导致与周围的支撑结构中的浓度相比密集的氧化物结构的阵列，因此具有更高的负载。保形层沉积在晶片上，增加阵列中的负载，但填充有效区域之间的空间。覆盖蚀刻去除阵列和支撑体中的材料。块蚀刻平衡阵列中的材料和支撑体的数量。阵列中的补充氧化物沉积将结构之间的空间填充到几乎均匀的密度。

3. 发明申请

US20040197984A1 Adhesion layer for Pt on SiO2 审中-公开
公开(公告)号：US20040197984A1
公开(公告)日：2004-10-07
申请号：US10803363
申请日：2004-03-17
申请人： Infineon Technologies North America Corp. , International Business Machines Corp.
发明人： Jingyu Lian , Kwong Hon Wong , Michael Wise , Young Limb , Nicolas Nagel
IPC分类号： H01L021/8242
CPC分类号： H01L28/65 , Y10T428/12597 , Y10T428/12875
摘要： Si, Al, Al plus TiN, and Ir02 are used as adhesion layers to prevent peeling of noble metal electrodes, such as Pt, from a silicon dioxide (5i02) substrate in capacitor structures of memory devices.

4. 发明申请

US20020048959A1 Diamond as a polish-stop layer for chemical-mechanical planarization in a damascene process flow 失效
标题翻译：金刚石作为抛光停止层，用于镶嵌工艺流程中的化学 - 机械平面化
公开(公告)号：US20020048959A1
公开(公告)日：2002-04-25
申请号：US10021123
申请日：2001-10-30
申请人： International Business Machines Corporation
发明人： Lawrence A. Clevenger , Louis L. C. Hsu , Jeremy K. Stephens , Michael Wise
IPC分类号： H01L021/302 , H01L021/461 , H01L021/311
CPC分类号： H01L21/31053 , H01L21/28525 , H01L21/3081 , H01L21/31144 , H01L21/3212 , H01L21/7684
摘要： A method of using diamond or a diamond-like carbon layer as a polish-stop for patterning a metal level into an inter-level dielectric substrate using a damascene process flow. The diamond or diamond-like carbon layer is deposited onto the surface of the substrate before patterning the metal level. A protective layer is then deposited over the diamond or diamond-like carbon polish-stop layer, wherein such protective layer may act as an additional polish-stop layer. Together, the diamond or diamond-like carbon polish-stop layer and the protective layer are used as a hard-mask for patterning the trenches that will become the metal features, wherein such protective layer protects the diamond or diamond-like carbon polish-stop layer during the patterning process. After deposition of a conductive metal layer, the dielectric substrate is polished to remove excess conductive material, as well as topography. In the polishing process, the diamond or diamond-like carbon polish-stop layer and any remaining protective layer are used as polish-stop layers. The diamond or diamond-like carbon polish-stop layer allows for an improved planar surface, thereby resulting in an sufficient decrease in topography at the surface of the inter-level dielectric.
摘要翻译：使用金刚石或类金刚石碳层作为抛光停止件的方法，其使用镶嵌工艺流程将金属层图案化成层间电介质基板。在图案化金属层之前，将金刚石或类金刚石碳层沉积在基板的表面上。然后将保护层沉积在金刚石或类金刚石碳抛光层上，其中这种保护层可以用作另外的抛光停止层。一起使用金刚石或类金刚石碳抛光层和保护层作为用于图案化将成为金属特征的沟槽的硬掩模，其中这种保护层保护金刚石或类金刚石碳抛光在图案化过程中。在沉积导电金属层之后，电介质基底被抛光以除去过量的导电材料以及形貌。在抛光过程中，将金刚石或类金刚石碳抛光层和任何剩余的保护层用作抛光 - 停止层。金刚石或类金刚石碳抛光层允许改进的平面表面，从而导致层间电介质表面的形貌的充分降低。

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