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1. 发明授权

US06246560B1 Peripheral device isolator 失效
标题翻译：外围设备隔离器
公开(公告)号：US06246560B1
公开(公告)日：2001-06-12
申请号：US09288770
申请日：1999-04-08
申请人： Ignacio A. Linares , Donald H. Topper, III , Dale L. Reynolds
发明人： Ignacio A. Linares , Donald H. Topper, III , Dale L. Reynolds
IPC分类号： H02H700
CPC分类号： H02H9/044 , G06F1/182
摘要： A peripheral device isolator (32) is provided which consists of an insulating material (33) having a first conductive area (34) on a top surface and a second conductive area (35) on a bottom surface. A transient voltage suppressor (36) provides an electrical connection between the first conductive area (34) and second conductive area (35) through a first lead (38) and a second lead (40). When the peripheral device isolator (32) is placed between an internal peripheral device (12), having a common logic and chassis ground, and a host frame (10), having a host system frame ground (16), an electrical path for a voltage spike occurring on the internal peripheral device (12) is provided so that the voltage spike can be diverted away from host system logic ground (22) and into host system frame/safety ground (16). Under normal circumstances, the transient voltage suppressor (36) is in a non-conductive state so that the separation of the host system logic ground (22) and the host system frame/safety ground (16) is maintained. The transient voltage suppressor (36) is in a conductive state only upon sensing a voltage spike on the chassis of the internal peripheral device (12).
摘要翻译：提供了一种外围设备隔离器（32），其由在顶表面上具有第一导电区域（34）和底表面上的第二导电区域（35）的绝缘材料（33）组成。瞬态电压抑制器（36）通过第一引线（38）和第二引线（40）提供第一导电区域（34）和第二导电区域（35）之间的电连接。当外围设备隔离器（32）被放置在具有公共逻辑和机箱接地的内部外围设备（12）和具有主机系统框架接地（16）的主机框架（10）之间时，用于提供在内部外围设备（12）上发生的电压尖峰，使得电压尖峰可以从主机系统逻辑接地（22）转移到主机系统框架/安全接地（16）中。在正常情况下，瞬态电压抑制器（36）处于非导通状态，从而保持主系统逻辑地（22）与主机系统框架/安全接地（16）的分离。瞬态电压抑制器（36）只有在感测到内部外围设备（12）的底盘上的电压尖峰时才处于导通状态。

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