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    • 3. 发明授权
    • Memory card and system for updating distributed memory
    • 用于更新分布式存储器的存储卡和系统
    • US06865637B1
    • 2005-03-08
    • US09891999
    • 2001-06-26
    • Ignacio A. LinaresRobert S. Gammenthaler, Jr.Edwin J. Burger
    • Ignacio A. LinaresRobert S. Gammenthaler, Jr.Edwin J. Burger
    • G06F1/00H04L12/66H04Q3/00
    • H04L12/66
    • A memory card cooperating with a network interface for receiving data entry and update signals from a database manager via a switch fabric and with a bus interface for outputting data on a system bus disposed in a system shelf, which shelf forms at least a portion of a telecommunications node having a distributed scalable database system. The memory card is operable to contain at least a portion of the distributed database in a high speed, high density memory block disposed thereon, which memory block is coupled to a network interface controller via a first memory interface and to a bus interface controller via a second memory interface. An arbiter is coupled to the first and second memory interfaces for arbitrating data input operations and data output operations with respect to the memory block.
    • 与网络接口协作的存储卡,用于经由交换结构从数据库管理器接收数据输入和更新信号,并且具有用于在布置在系统架中的系统总线上输出数据的总线接口,所述系统总线架构形成至少一部分 电信节点具有分布式可扩展数据库系统。 存储卡可操作以将分布式数据库的至少一部分包含在其上设置的高速,高密度存储器块中,该存储块经由第一存储器接口耦合到网络接口控制器,并经由 第二存储器接口。 仲裁器耦合到第一和第二存储器接口,用于对相对于存储器块的数据输入操作和数据输出操作进行仲裁。
    • 5. 发明授权
    • Peripheral device isolator
    • 外围设备隔离器
    • US06246560B1
    • 2001-06-12
    • US09288770
    • 1999-04-08
    • Ignacio A. LinaresDonald H. Topper, IIIDale L. Reynolds
    • Ignacio A. LinaresDonald H. Topper, IIIDale L. Reynolds
    • H02H700
    • H02H9/044G06F1/182
    • A peripheral device isolator (32) is provided which consists of an insulating material (33) having a first conductive area (34) on a top surface and a second conductive area (35) on a bottom surface. A transient voltage suppressor (36) provides an electrical connection between the first conductive area (34) and second conductive area (35) through a first lead (38) and a second lead (40). When the peripheral device isolator (32) is placed between an internal peripheral device (12), having a common logic and chassis ground, and a host frame (10), having a host system frame ground (16), an electrical path for a voltage spike occurring on the internal peripheral device (12) is provided so that the voltage spike can be diverted away from host system logic ground (22) and into host system frame/safety ground (16). Under normal circumstances, the transient voltage suppressor (36) is in a non-conductive state so that the separation of the host system logic ground (22) and the host system frame/safety ground (16) is maintained. The transient voltage suppressor (36) is in a conductive state only upon sensing a voltage spike on the chassis of the internal peripheral device (12).
    • 提供了一种外围设备隔离器(32),其由在顶表面上具有第一导电区域(34)和底表面上的第二导电区域(35)的绝缘材料(33)组成。 瞬态电压抑制器(36)通过第一引线(38)和第二引线(40)提供第一导电区域(34)和第二导电区域(35)之间的电连接。 当外围设备隔离器(32)被放置在具有公共逻辑和机箱接地的内部外围设备(12)和具有主机系统框架接地(16)的主机框架(10)之间时,用于 提供在内部外围设备(12)上发生的电压尖峰,使得电压尖峰可以从主机系统逻辑接地(22)转移到主机系统框架/安全接地(16)中。 在正常情况下,瞬态电压抑制器(36)处于非导通状态,从而保持主系统逻辑地(22)与主机系统框架/安全接地(16)的分离。 瞬态电压抑制器(36)只有在感测到内部外围设备(12)的底盘上的电压尖峰时才处于导通状态。