专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

2. 发明申请

US20160328156A1 DRAM MEMORY CHANNEL SCRAMBLING/ECC DISASSOCIATED COMMUNICATION 有权
标题翻译： DRAM存储器通道SCRAMBLING / ECC DISASSOCIATED COMMUNICATION
公开(公告)号：US20160328156A1
公开(公告)日：2016-11-10
申请号：US14967258
申请日：2015-12-11
申请人： Ian SWARBRICK , Michael BEKERMAN , Craig HANSON , Chihjen CHANG
发明人： Ian SWARBRICK , Michael BEKERMAN , Craig HANSON , Chihjen CHANG
IPC分类号： G06F3/06
CPC分类号： G06F13/4234
摘要： A protocol that enables communication between a host and an Input/Output (I/O) channel storage device, such as a Dynamic Random Access Memory (DRAM) channel Dual In-Line Memory Module (DIMM) form-factor Solid State Drive (SSD), without the need to know or reverse engineer the encoding applied by the host. The control/status data are written to the storage device by sending a protocol training sequence of known values and storing the associated command/status data in the storage device in the same encoding format as that received from the host. These stored values are used at run time to execute encoded commands received from the host and to report status data to the host in the host-recognizable manner. A memory bank-based buffered configuration stores user data also in the as-received condition to preserve the host-specific encoding. This facilitates exchange of user data between the host memory controller and the storage device over the DRAM channel.
摘要翻译：支持主机与输入/输出（I / O）通道存储设备之间的通信的协议，例如动态随机存取存储器（DRAM）通道双列直插存储器模块（DIMM）外形固态驱动器（SSD）），而不需要知道或逆向工程主机应用的编码。控制/状态数据通过发送已知值的协议训练序列并以与从主机接收的编码格式相同的编码格式将相关联的命令/状态数据存储在存储设备中而被写入存储设备。在运行时使用这些存储的值来执行从主机接收的编码命令，并以主机可识别的方式将状态数据报告给主机。基于存储体的缓冲配置也将用户数据也存储在接收状态以保存主机特定的编码。这有助于通过DRAM信道在主机存储器控制器和存储设备之间交换用户数据。

IPRDB

热门服务

关于我们

友情链接

联系方式