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1. 发明授权

US06822965B1 Approximate state control mechanism 有权
标题翻译：近似状态控制机制
公开(公告)号：US06822965B1
公开(公告)日：2004-11-23
申请号：US09869085
申请日：2001-06-20
申请人： Ian David Johnson , Paul Howarth
发明人： Ian David Johnson , Paul Howarth
IPC分类号： H04L1228
CPC分类号： H04L47/10 , H04L47/30 , H04L49/254 , H04L49/30 , H04L49/3081 , H04L49/55 , H04L2012/5679 , H04L2012/5682
摘要： A data packet switching system having a central controller and a number of peripheral controllers each incorporating at least one queue for storing packets of information received from a peripheral data packet source. Each queue in each peripheral controller includes a queue size detection logic adapted to communicate to the central controller the approximate state of the size of the corresponding queue. The scale for the approximate state being arranged to be empty, nearly empty, active, busy, very busy, nearly full and full.
摘要翻译：一种具有中央控制器和多个外围控制器的数据分组交换系统，每个外围控制器包括至少一个队列，用于存储从外围数据分组源接收的信息分组。每个外围控制器中的每个队列包括适合于向中央控制器通信相应队列的大小的大致状态的队列大小检测逻辑。大约状态的比例被排列为空，几乎为空，主动，繁忙，非常繁忙，接近满和满。

2. 发明授权

US07088710B1 Method of transmitting information through data switching apparatus and apparatus therefor 有权
标题翻译：通过数据交换装置及其装置发送信息的方法
公开(公告)号：US07088710B1
公开(公告)日：2006-08-08
申请号：US09869091
申请日：1999-11-10
申请人： Ian David Johnson , Michael Patrick Robert Collins , Paul Howarth
发明人： Ian David Johnson , Michael Patrick Robert Collins , Paul Howarth
IPC分类号： H04L12/56
CPC分类号： H04L49/506 , H04L12/64 , H04L49/1523 , H04L49/153 , H04L49/1576 , H04L49/254 , H04L49/30 , H04L49/3081 , H04L49/606 , H04L2012/5642 , H04L2012/5652 , H04Q11/0478
摘要： A data switch for handling packets of information; the switch includes input traffic managers, ingress routers, a memoryless cyclic switch fabric, egress routers and output traffic managers all acting under the control of a switch controller. Each ingress router includes a set of virtual output buffers one for each output traffic manager and each message priority. Each data packet or cell as it arrives is examined to identify the output traffic manager address and its message priority. The switch controller uses a first arbitration and selection process to schedule the passage of the next cell across the switch fabric which the ingress router uses a second arbitration and selection process to select the appropriate virtual output queue for use in the switch fabric transfer.
摘要翻译：用于处理信息包的数据交换机; 交换机包括输入业务管理器，入口路由器，无记忆循环交换结构，出口路由器和输出业务管理器，全部在交换机控制器的控制下起作用。每个入口路由器包括一组虚拟输出缓冲器，每个输出流量管理器和每个消息优先级。检查每个数据包或单元到达时，以识别输出流量管理器地址及其消息优先级。交换机控制器使用第一仲裁和选择过程来调度跨越交换机结构的下一个小区的通过，入口路由器使用第二仲裁和选择过程来选择用于交换矩阵传输的适当的虚拟输出队列。

3. 发明申请

US20090092046A1 Method for Congestion Management of a Network, a Switch, and a Network 有权
标题翻译：网络，交换机和网络的拥塞管理方法
公开(公告)号：US20090092046A1
公开(公告)日：2009-04-09
申请号：US12295969
申请日：2007-03-22
申请人： Finbar Naven , Ian David Johnson , Jose Duato , Jose Flich
发明人： Finbar Naven , Ian David Johnson , Jose Duato , Jose Flich
IPC分类号： G08C15/00 , H04L12/56
CPC分类号： H04L47/10 , H04L47/17 , H04L47/266 , H04L47/29 , H04L47/30
摘要： A switch for connection in a network of other like switches and includes memory for storing data packets, a control system arranged to control the switch to, upon receipt at one of the ingress or egress ports of notification of congestion at a downstream congested port, either store at said ingress port or egress port data packets received for said congested port or to communicate with an upstream port for storage at said upstream port of data packets destined for the congested port, and in dependence on the current of stored data, to send a message to a further upstream port informing the further upstream port of the congestion downstream. The memory is provided substantially only at the ingress ports or the egress ports of the switch.
摘要翻译：用于在其他类似交换机的网络中连接的交换机，并且包括用于存储数据分组的存储器，被配置为在下游拥塞端口的拥塞通知中的一个入口或出口端口接收时控制交换机的控制系统，存储在针对所述拥塞端口接收的所述入口端口或出口端口数据分组，或者与上游端口进行通信，以存储在去往拥塞端口的数据分组的所述上行端口处，并且根据所存储的数据的当前状态，发送向另一个上游端口发送消息，通知进一步的上游端口拥塞下游。存储器基本上仅在交换机的入口端口或出口端口提供。

4. 发明授权

US07936953B2 Optical printed circuit board and manufacturing method 有权
标题翻译：光学印刷电路板及其制造方法
公开(公告)号：US07936953B2
公开(公告)日：2011-05-03
申请号：US11995065
申请日：2006-06-30
申请人： Ian David Johnson , Richard Charles Alexander Pitwon , David R. Selviah , Ioannis Papakonstantinou
发明人： Ian David Johnson , Richard Charles Alexander Pitwon , David R. Selviah , Ioannis Papakonstantinou
IPC分类号： G02B6/12 , G02B6/26
CPC分类号： G02B6/138 , G02B6/1221 , G02B6/43 , H05K1/0274
摘要： The invention provides a method of manufacturing an optical printed circuit board and an optical printed circuit board. The method comprises providing a support layer; on the support layer, providing an optical core layer; forming optical channels from the optical core layer and surrounding the optical channels with cladding thereby forming optical waveguides; and during said step of forming the optical channels, forming one or more alignment features, e.g. projections, on the optical printed circuit board.
摘要翻译：本发明提供一种制造光学印刷电路板和光学印刷电路板的方法。该方法包括提供支撑层; 在支撑层上，提供光芯层; 从光纤芯层形成光通道并用包层围绕光通道，从而形成光波导; 并且在形成光学通道的所述步骤期间，形成一个或多个对准特征，例如。投影，在光学印刷电路板上。

5. 发明授权

US07002981B2 Method and arbitration unit for digital switch 有权
公开(公告)号：US07002981B2
公开(公告)日：2006-02-21
申请号：US09858437
申请日：2001-05-16
申请人： Ian David Johnson , Simon William Farrow , Marek Stephen Piekarski , Paul Graham Howarth
发明人： Ian David Johnson , Simon William Farrow , Marek Stephen Piekarski , Paul Graham Howarth
IPC分类号： H04L12/50
CPC分类号： H04L49/1576 , H04L49/254 , H04L49/30 , H04L49/3081 , H04L2012/5679 , H04Q11/0478
摘要： In a data switching system, the ingress and egress ports of a memoryless cross-bar switch are controlled by an arbitration method. The arbitration method uses a three phase process involving (i) a request phase in which each ingress port sends its connection requests to egress ports to which a connection is required, (ii) a grant phase in which each egress port uses a grant pointer to select one of the requests directed to it using a grant pointer, and generates a grant signal, and (iii) an accept phase in which each ingress port selects one of the received grant signals to accept, so defining an ingress to egress port connection across the cross-bar switch. The transition sequences for each of the grant pointers are mutually exclusive, so that any synchronisation of the grant pointers is eliminated on the next arbitration cycle. This is arranged by a setting of the paths taken by request and grant signals.

6. 发明申请

US20090162004A1 OPTICAL PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD 有权
标题翻译：光学印刷电路板和制造方法
公开(公告)号：US20090162004A1
公开(公告)日：2009-06-25
申请号：US11995065
申请日：2006-06-30
申请人： Ian David Johnson , Richard Charles Alexander Pitwon , David R. Selviah , Ioannis Papakonstantinou
发明人： Ian David Johnson , Richard Charles Alexander Pitwon , David R. Selviah , Ioannis Papakonstantinou
IPC分类号： G02B6/12 , H01L21/00
CPC分类号： G02B6/138 , G02B6/1221 , G02B6/43 , H05K1/0274
摘要： The invention provides a method of manufacturing an optical printed circuit board and an optical printed circuit board. The method comprises providing a support layer; on the support layer, providing an optical core layer; forming optical channels from the optical core layer and surrounding the optical channels with cladding thereby forming optical waveguides; and during said step of forming the optical channels, forming one or more alignment features, e.g. projections, on the optical printed circuit board.
摘要翻译：本发明提供一种制造光学印刷电路板和光学印刷电路板的方法。该方法包括提供支撑层; 在支撑层上，提供光芯层; 从光纤芯层形成光通道并用包层围绕光通道，从而形成光波导; 并且在形成光学通道的所述步骤期间，形成一个或多个对准特征，例如。投影，在光学印刷电路板上。

7. 发明授权

US06876663B2 Switching system 有权
标题翻译：开关系统
公开(公告)号：US06876663B2
公开(公告)日：2005-04-05
申请号：US09874500
申请日：2001-06-05
申请人： Ian David Johnson , Colin Martin Duxbury , Marek Stephen Piekarskl
发明人： Ian David Johnson , Colin Martin Duxbury , Marek Stephen Piekarskl
IPC分类号： H04L12/933 , H04L12/935 , H04L12/937 , H04Q3/545 , H04Q11/04 , H04L12/28
CPC分类号： H04Q11/0478 , H04L49/101 , H04L49/254 , H04L49/30 , H04L49/3027 , H04L49/3045 , H04Q3/5455 , H04Q2213/1302 , H04Q2213/1304 , H04Q2213/131 , H04Q2213/13103 , H04Q2213/13106 , H04Q2213/13196
摘要： A data switching device has ingress routers and egress routers interconnected by a switching matrix controlled by a controller. Each ingress router maintains one or more virtual output queues for each egress router. The switching matrix itself maintains a head-of queue buffer of cells which are to be transmitted. Each of these queues corresponds to one of the virtual output queues, and the cells stored in the switching matrix are replicated from the cells queuing in the respective virtual output queues. Thus, when it is determined that a connection is to be made between a given input and output of the switching matrix, a cell suitable for transmission along that connection is already available to the switching matrix. Upon receipt of a new cell by one of the ingress routers, the cell is stored in one of the virtual output queues of the ingress router corresponding to the egress router for the cell, and also written the corresponding head of queue buffer, if that buffer has space. If not, the cell is stored, and written to the head of queue buffer when that buffer has space for it.
摘要翻译：数据交换设备具有由控制器控制的交换矩阵互连的入口路由器和出口路由器。每个入口路由器为每个出口路由器维护一个或多个虚拟输出队列。交换矩阵本身维护要发送的小区的队列缓冲区。这些队列中的每一个对应于虚拟输出队列中的一个，并且存储在交换矩阵中的单元从在各个虚拟输出队列中排队的单元中复制。因此，当确定在交换矩阵的给定输入和输出之间进行连接时，适合于沿着该连接的传输的小区已经可用于交换矩阵。在由入口路由器之一接收到新的小区时，该小区被存储在对应于该小区的出口路由器的入口路由器的一个虚拟输出队列中，并且还写入相应的队列缓冲区头部，如果该缓冲器有空间。如果没有，则该单元被存储，并且当缓冲器具有空间时将其写入队列缓冲器的头部。

8. 发明授权

US07050448B2 Data switching arbitration arrangements 有权
标题翻译：数据交换仲裁安排
公开(公告)号：US07050448B2
公开(公告)日：2006-05-23
申请号：US09826801
申请日：2001-04-05
申请人： Ian David Johnson , Marek Stephen Piekarski
发明人： Ian David Johnson , Marek Stephen Piekarski
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L49/101 , H04L49/3027 , H04L49/3045
摘要： There is disclosed a masking unit (REQMSK) for use in a data packet switching system. The data switching system being of the type having a memoryless cross-back switch (SM) providing cyclic connections under the control of a switch arbiter (SCARB) between ingress routers (IR0, IR1, IR2 and IR3) and egress routers (ER0, ER1, ER2 and ER3). Each of the ingress routers (IR0–IR3) is provided with incoming packet buffering on a virtual output queue basis (VOQ0.0, VOQ0.1, VOQ0.2, and VOQ0.3 for ingress router IR0). Each virtual output queue also produces a connection request signal REQ0.0 to REQ3.3 when the corresponding queue has a data packet in it. The masking unit REQMSK is arranged to randomly mask out correlated connection requests.
摘要翻译：公开了一种用于数据分组交换系统的掩蔽单元（REQMSK）。数据交换系统具有在入口路由器（IR 0，IR 1，IR 2和IR 3）之间的交换仲裁器（SCARB）的控制下提供循环连接的无记忆交叉交换（SM）和出口路由器（ER 0，ER 1，ER 2和ER 3）。每个入口路由器（IR 0 -IR 3）都以虚拟输出队列（VOQ 0.0，VOQ 0.1，VOQ 0.2和VOQ 0.3为入口路由器IR 0）提供输入数据包缓冲。当对应的队列中有一个数据包时，每个虚拟输出队列也产生一个连接请求信号REQ 0.0到REQ 3.3。屏蔽单元REQMSK被布置成随机屏蔽相关的连接请求。

9. 发明授权

US06970469B1 Scheduling means for data switching apparatus 有权
标题翻译：数据交换装置的调度装置
公开(公告)号：US06970469B1
公开(公告)日：2005-11-29
申请号：US09601695
申请日：1999-02-09
申请人： Paul Graham Howarth , Ian David Johnson
发明人： Paul Graham Howarth , Ian David Johnson
IPC分类号： H04L12/931 , H04L12/933 , H04L12/935 , H04L12/937 , H04Q11/04 , H04J3/02
CPC分类号： H04Q11/0478 , H04L49/1546 , H04L49/205 , H04L49/254 , H04L49/3018
摘要： A scheduling means for data switching apparatus includes a plurality of input ports and a plurality of output ports, the scheduling means capable of processing a plurality of interconnection requests, each requesting interconnection between a sub-set of the input ports and a sub-set of respective the output ports, and each request having a respective priority level which is one of a predetermined number of priority levels. The scheduling means includes determination means for determining a first set of requests selected from the plurality of requests, according to the respective priority levels; a first pipeline stage for receiving only the first set of requests am satisfying at least one of the first set of requests; a priority mixer for determining a further set of requests independently of the priority levels, the further set including requests of the first set which were not satisfied and requests included in the plurality of requests which were not part of the first set and which are of any of the priority levels, and an additional pipeline stage for identifying requests in the further set which can be satisfied, and for satisfying the identified requests.
摘要翻译：一种用于数据交换装置的调度装置包括多个输入端口和多个输出端口，该调度装置能够处理多个互连请求，每个互连请求请求在输入端口的子集之间的互连和子集相应的输出端口，并且每个请求具有作为预定数量的优先级之一的相应优先级。调度装置包括：确定装置，用于根据各自的优先级确定从多个请求中选择的第一组请求; 用于仅接收满足第一组请求中的至少一个的第一组请求的第一流水线级; 用于独立于所述优先级确定另一组请求的优先级混合器，所述另一组包括不满足的第一组的请求和包括在多个请求中的请求，所述请求不包括第一组的一部分，并且是任何以及用于识别可满足的另外的集合中的请求以及满足所识别的请求的附加流水线级。

10. 发明授权

US06622202B2 Method and device for operating a RAM memory 有权
公开(公告)号：US06622202B2
公开(公告)日：2003-09-16
申请号：US09850245
申请日：2001-05-07
申请人： Steven Raymond Carroll , Ian David Johnson
发明人： Steven Raymond Carroll , Ian David Johnson
IPC分类号： G06F1208
CPC分类号： G11C7/1006
摘要： A method of operating a RAM memory having a plurality of memory addresses for storing data, the method being performed with a timing based on clock signals spaced by clock periods and comprising the steps of: receiving an address and a function signal specifying a function to be performed on data associated with that address; determining whether the same address has been received during a predefined number of preceding clock periods; generating a first data item representing data associated with the received address; modifying the first item according to the function signal to generate a second data item associated with the address, and writing the second data item to the address in the RAM and retaining a separate record of the last n second data items, the step of generating a first data item being performed by: (i) if the result of the determination is negative, generating the first data item to be equal to data stored by the RAM in the address, and (ii) if the result of the determination is positive, generating the first data item to be equal to the most recent second item associated with the address which is stored in the record.

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