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    • 3. 发明授权
    • Organic light emitting diode lighting apparatus
    • 有机发光二极管照明装置
    • US08405119B2
    • 2013-03-26
    • US13272043
    • 2011-10-12
    • Young-Mo KooOk-Keun SongHyuk-Sang JunYong-Han LeeJae-Goo Lee
    • Young-Mo KooOk-Keun SongHyuk-Sang JunYong-Han LeeJae-Goo Lee
    • H01L33/00
    • H01L51/529H01L51/524
    • An organic light emitting diode (OLED) lighting apparatus is disclosed. In one embodiment, the apparatus includes i) a substrate main body including a light emitting area and a sealing area surrounding the light emitting area, ii) an OLED disposed on the light emitting area of the substrate main body, iii) a sealant disposed on the sealing area of the substrate main body and iv) an encapsulation substrate encapsulating the OLED, wherein the encapsulation substrate comprises first and second surfaces opposing each other. The apparatus may further include a heat dissipating wire configured to dissipate heat generated by the OLED. The heat dissipating wire includes a heat absorption portion disposed on the first surface of the encapsulation substrate and contacting the sealant, a heat dissipating portion disposed on the second surface, and a coupling portion interconnecting the absorption portion and the heat dissipating portion.
    • 公开了一种有机发光二极管(OLED)照明装置。 在一个实施例中,该设备包括:i)包括发光区域和围绕发光区域的密封区域的衬底主体,ii)设置在衬底主体的发光区域上的OLED,iii) 所述衬底主体的密封区域和iv)封装所述OLED的封装衬底,其中所述封装衬底包括彼此相对的第一和第二表面。 该装置还可以包括散热线,该散热线被配置成散发由OLED产生的热量。 散热线包括设置在封装基板的第一表面上并接触密封剂的热吸收部分,设置在第二表面上的散热部分和将吸收部分和散热部分互连的耦合部分。
    • 5. 发明申请
    • Panel Driving Circuit That Generates Panel Test Pattern and Panel Test Method Thereof
    • 生成面板测试图案和面板测试方法的面板驱动电路
    • US20120072773A1
    • 2012-03-22
    • US13290790
    • 2011-11-07
    • Won Sik KangJae-Goo Lee
    • Won Sik KangJae-Goo Lee
    • G06F11/263
    • G01R31/318378G09G3/006G09G3/3611G09G3/3648G09G5/006G09G2330/02G09G2340/125H04N5/06H04N17/04
    • A panel driving circuit that produces a panel test pattern and a method of testing a panel are provided. The driving circuit includes a pattern generation unit and a selection unit. The pattern generation unit responds to a system clock and produces pattern test data and pattern test signals. The selection unit responds to a test signal and selects and outputs either (a) the pattern test data and the pattern test signals that are outputted from the pattern generation unit, or (b) the pattern test data and pattern test signals that are directly applied from the outside. The driving circuit and the method of the panel test generates the panel test data, the horizontal synchronizing signal, the vertical synchronizing signal, and the data activating signal within the driving circuit using a system clock so that the testing of the panel can be carried out without using a separate test device.
    • 提供了产生面板测试图案的面板驱动电路和测试面板的方法。 驱动电路包括图案生成单元和选择单元。 图案生成单元响应系统时钟并产生模式测试数据和模式测试信号。 选择单元响应于测试信号,并且选择并输出(a)从模式生成单元输出的模式测试数据和模式测试信号,或者(b)直接应用的模式测试数据和模式测试信号 从外部。 驱动电路和面板测试方法使用系统时钟产生驱动电路内的面板测试数据,水平同步信号,垂直同步信号和数据激活信号,从而可以执行面板的测试 而不使用单独的测试设备。
    • 7. 发明授权
    • Panel driving circuit that generates panel test pattern and panel test method thereof
    • 生成面板测试图案的面板驱动电路及其面板测试方法
    • US07627799B2
    • 2009-12-01
    • US11046178
    • 2005-01-28
    • Won-Sik KangJae-Goo Lee
    • Won-Sik KangJae-Goo Lee
    • G01R31/28
    • G01R31/318378G09G3/006G09G3/3611G09G3/3648G09G5/006G09G2330/02G09G2340/125H04N5/06H04N17/04
    • A panel driving circuit that produces a panel test pattern and a method of testing a panel are provided. The driving circuit includes a pattern generation unit and a selection unit. The pattern generation unit responds to a system clock and produces pattern test data and pattern test signals. The selection unit responds to a test signal and selects and outputs either (a) the pattern test data and the pattern test signals that are outputted from the pattern generation unit, or (b) the pattern test data and pattern test signals that are directly applied from the outside. The driving circuit and the method of the panel test generates the panel test data, the horizontal synchronizing signal, the vertical synchronizing signal, and the data activating signal within the driving circuit using a system clock so that the testing of the panel can be carried out without using a separate test device.
    • 提供了产生面板测试图案的面板驱动电路和测试面板的方法。 驱动电路包括图案生成单元和选择单元。 图案生成单元响应系统时钟并产生模式测试数据和模式测试信号。 选择单元响应于测试信号,并且选择并输出(a)从模式生成单元输出的模式测试数据和模式测试信号,或者(b)直接应用的模式测试数据和模式测试信号 从外部。 驱动电路和面板测试方法使用系统时钟产生驱动电路内的面板测试数据,水平同步信号,垂直同步信号和数据激活信号,从而可以执行面板的测试 而不使用单独的测试设备。
    • 8. 发明授权
    • Organic light-emitting display device
    • 有机发光显示装置
    • US07557391B2
    • 2009-07-07
    • US11755095
    • 2007-05-30
    • Young-Mo KooOk-Keun SongHye-In JeongTae-Shick KimJae-Goo Lee
    • Young-Mo KooOk-Keun SongHye-In JeongTae-Shick KimJae-Goo Lee
    • H01L51/50
    • H01L27/3288H01L27/3283H01L51/5212
    • An organic light-emitting display device wherein an IR drop across a first electrode can be prevented. The organic light-emitting display device includes a substrate; a plurality of stripe-shaped first electrodes disposed on the substrate and extending in a first direction; a plurality of stripe-shaped first insulators extending in a second direction to cross the stripe-shaped first electrodes; a plurality of stripe-shaped second electrodes disposed between the stripe-shaped first insulators to extend in the same direction as the stripe-shaped first insulators and cross the stripe-shaped first electrodes; an intermediate layer disposed at positions where the stripe-shaped first electrodes and the stripe-shaped second electrodes cross and including an emission layer; and first conductors disposed at positions where the stripe-shaped first electrodes and the stripe-shaped first insulators intersect and between the stripe-shaped first electrodes and the stripe-shaped first insulators.
    • 一种有机发光显示装置,其中可以防止穿过第一电极的IR降落。 有机发光显示装置包括:基板; 多个条形的第一电极,设置在所述基板上并沿第一方向延伸; 多个条形的第一绝缘体,沿第二方向延伸以跨过条形的第一电极; 多个条形的第二电极,设置在所述条形的第一绝缘体之间,以与所述条形的第一绝缘体相同的方向延伸并跨过所述条形的第一电极; 中间层,设置在所述条形的第一电极和所述条形的第二电极交叉的位置处,并且包括发射层; 以及第一导体,其设置在条形第一电极和条形第一绝缘体相交的位置和条形第一电极与条形第一绝缘体之间。
    • 9. 发明授权
    • Semiconductor device
    • 半导体器件
    • US07307305B2
    • 2007-12-11
    • US11143197
    • 2005-06-01
    • Jae-Goo LeeCheol-Ju Yun
    • Jae-Goo LeeCheol-Ju Yun
    • H01L27/108
    • H01L27/10888H01L27/0207H01L27/10814H01L27/10855H01L27/10885
    • Bit lines having first conductive patterns and bit line mask patterns are formed on a first insulating layer between capacitor contact regions of a substrate. An oxide second insulating layer is formed on the bit lines and contact patterns are formed to open storage node contact hole regions corresponding to portions of the second insulating layer. First spacers are formed on sidewalls of the etched portions. The second and first insulating layers are etched to form storage node contact holes exposing the capacitor contact regions. Simultaneously, second spacers of the second insulating layer are formed beneath the first spacers. A second conductive layer fills the storage node contact holes to form storage node contact pads. A loss of the bit line mask pattern decreases due to the reduced thickness of the bit line mask pattern and a bit line loading capacitance decreases due to the second spacers.
    • 具有第一导电图案和位线掩模图案的位线形成在衬底的电容器接触区域之间的第一绝缘层上。 在位线上形成氧化物第二绝缘层,并且形成接触图案以打开与第二绝缘层的部分相对应的存储节点接触孔区域。 在蚀刻部分的侧壁上形成第一间隔物。 蚀刻第二和第一绝缘层以形成暴露电容器接触区域的存储节点接触孔。 同时,第二绝缘层的第二间隔件形成在第一间隔件下面。 第二导电层填充存储节点接触孔以形成存储节点接触焊盘。 由于位线掩模图案的厚度减小,位线掩模图案的损失减小,并且位线负载电容由于第二间隔件而减小。
    • 10. 发明授权
    • Sidewall spacer structure for self-aligned contact and method for forming the same
    • 用于自对准接触的侧壁间隔结构及其形成方法
    • US07056828B2
    • 2006-06-06
    • US10404951
    • 2003-03-31
    • Tae-Young ChungJae-Goo LeeDong-Jun Lee
    • Tae-Young ChungJae-Goo LeeDong-Jun Lee
    • H01L24/4763
    • H01L21/76897H01L21/76829H01L21/76837
    • In one embodiment, adjacent conductive patterns are formed overlying a semiconductor substrate. The conductive patterns each have a conductive line and a capping layer. A first spacer formation layer is formed between the adjacent conductive patterns. The first spacer formation layer is formed between the top surface of the capping layer and the bottom surface of the conductive line. A conformal second spacer formation layer is formed on the conductive patterns. A first interlayer insulating layer is formed on the conformal second spacer formation layer. Next, an opening is formed to extend to a portion of the first spacer formation layer, in the first interlayer insulating layer. The portion of the first spacer formation layer is etched, using the second spacer formation layer as an etch mask, to form a single-layer spacer on sidewalls of the conductive patterns, concurrently with a contact hole.
    • 在一个实施例中,在半导体衬底上形成相邻的导电图案。 导电图案各自具有导电线和封盖层。 在相邻的导电图案之间形成第一间隔物形成层。 第一间隔物形成层形成在覆盖层的顶表面和导电线的底表面之间。 在导电图案上形成保形第二间隔物形成层。 在保形第二间隔物形成层上形成第一层间绝缘层。 接下来,形成在第一层间绝缘层中延伸到第一间隔物形成层的一部分的开口。 使用第二间隔物形成层作为蚀刻掩模蚀刻第一间隔物形成层的部分,以在接触孔同时在导电图案的侧壁上形成单层间隔物。