专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20120214146A1 INTERACTIVE LEARNING SYSTEM 审中-公开
标题翻译：互动学习系统
公开(公告)号：US20120214146A1
公开(公告)日：2012-08-23
申请号：US13155931
申请日：2011-06-08
申请人： Hsiu-Ping Yueh , Chih-Ting Lin , Yuan-Chen Liu , Shih-Kuan Hsu
发明人： Hsiu-Ping Yueh , Chih-Ting Lin , Yuan-Chen Liu , Shih-Kuan Hsu
IPC分类号： G09B5/00 , G09B7/00
CPC分类号： G09B7/02
摘要： An interactive learning system includes a sensing network constituted by a plurality of sensing/transmitting modules, and a transmission network formed by the sensing network and a data processing device. The sensing/transmitting modules sense movements and vibrations thereof and interactive statuses between the sensing/transmitting modules and other sensing/transmitting modules, so as to generate messages that indicate the movements, the vibrations and the interactive statuses, and transmit the sensed messages to the data processing device by the transmission network, for interactive messages to be displayed through a human-machine interface of the data processing device. As such, learners' conceptions can be perceived and shown by the actual operations of the sensing/transmitting modules, which allows teachers to grasp learners' conceptions and thereby increase their interactions.
摘要翻译：交互式学习系统包括由多个感测/发送模块构成的感测网络，以及由感测网络和数据处理设备形成的传输网络。感测/发射模块检测其感测/发射模块和其他感测/发射模块之间的运动和振动以及交互状态，以产生指示移动，振动和交互状态的消息，并将感测到的消息发送到数据处理设备由传输网络，用于通过数据处理设备的人机界面显示交互消息。因此，学习者的观念可以被感知/传输模块的实际操作所感知和显示，这使教师能够掌握学习者的观念，从而增加他们的相互作用。

2. 发明授权

US06199039B1 Synthesis subband filter in MPEG-II audio decoding 有权
标题翻译： MPEG-II音频解码中的合成子带滤波器
公开(公告)号：US06199039B1
公开(公告)日：2001-03-06
申请号：US09128015
申请日：1998-08-03
申请人： Liang-Gee Chen , Tsung-Han Tsai , Yuan-Chen Liu
发明人： Liang-Gee Chen , Tsung-Han Tsai , Yuan-Chen Liu
IPC分类号： G10L2106
CPC分类号： G10L19/0208 , G10L19/0212
摘要： An MPEG-II audio decoder with a synthesis subband filter includes a fast IMDCT (Inverse Modified Discrete Cosine Transform) module and an IPQMF (Inverse Pseudo Quadrature Mirror Filter) module. The fast IMDCT module involves a butterfly stage of input subband samples which requires only about ¼ the amount of multiplier-accumulate computation of the ISO suggested method. The IPQMF module involves an efficient memory configuration which requires only half size of the standard synthesis subband filter bank.
摘要翻译：具有合成子带滤波器的MPEG-II音频解码器包括快速IMDCT（逆修正离散余弦变换）模块和IPQMF（逆伪正交镜滤波器）模块。快速IMDCT模块涉及输入子带样本的蝴蝶阶段，其仅需要ISO建议方法的乘数累加量的大约1/4。 IPQMF模块涉及高效的存储器配置，其仅需要标准合成子带滤波器组的一半。

3. 发明授权

US06587589B1 Architecture for performing two-dimensional discrete wavelet transform 有权
标题翻译：用于执行二维离散小波变换的架构
公开(公告)号：US06587589B1
公开(公告)日：2003-07-01
申请号：US09514522
申请日：2000-02-28
申请人： Liang-Gee Chen , Po-Cheng Wu , Yuan-Chen Liu , Yeong-Kang Lai
发明人： Liang-Gee Chen , Po-Cheng Wu , Yuan-Chen Liu , Yeong-Kang Lai
IPC分类号： G06K946
CPC分类号： G06F17/148 , H04N19/42 , H04N19/63
摘要： An architecture for performing the two-dimensional discrete wavelet transform includes a transform module including a first stage and a second stage for decomposing an input image into four bands, and among the four bands, the band having the low frequency in both horizontal and vertical direction serves as the input image for next level decomposition operation; a multiplexer for selecting the band having the low frequency in both horizontal and vertical direction as the input image to feed into the transform module; and an optional memory module for storing the band having the lowest frequency in both horizontal and vertical direction. The polyphse decomposition technique is employed to the decimation filters of the first stage for segmenting the coefficients of the decimation filters of the first stage into an odd-numbered part and an even-numbered part, and the coefficient folding technique is employed to the decimation filters of the second stage such that every two coefficients of the decimation filters of the second stage share one set of a multiplier, an adder, and a register.
摘要翻译：用于执行二维离散小波变换的架构包括：变换模块，包括第一级和第二级，用于将输入图像分解成四个频带，并且在四个频带中，在水平和垂直方向上具有低频的频带作为下一级分解操作的输入图像; 用于选择具有水平和垂直方向上的低频的频带作为输入图像的多路复用器，以馈送到变换模块; 以及用于在水平和垂直方向上存储具有最低频率的频带的可选存储模块。多重分解技术被用于第一级的抽取滤波器，用于将第一级的抽取滤波器的系数分为奇数部分和偶数部分，并且系数折叠技术被用于抽取滤波器使得第二级的抽取滤波器的每两个系数共享一组乘法器，加法器和寄存器。

4. 发明授权

US6151409A Methods for compressing and re-constructing a color image in a computer system 失效
标题翻译：在计算机系统中压缩和重新构造彩色图像的方法
公开(公告)号：US6151409A
公开(公告)日：2000-11-21
申请号：US42061
申请日：1998-03-13
申请人： Liang-Gee Chen , Yuan-Chen Liu , Yung-Pin Lee , Po-Cheng Wu , Hsu-Tung Chen
发明人： Liang-Gee Chen , Yuan-Chen Liu , Yung-Pin Lee , Po-Cheng Wu , Hsu-Tung Chen
IPC分类号： G06T9/00 , G06K9/00 , G06K9/36
CPC分类号： G06T9/005
摘要： We discloses an efficient method for compressing a color image, visual block pattern truncation coding (VBPTC), in which the conventional block truncation coding (BTC) serves to encode an original image. This method defines the edge block according to human visual perception. If the difference between the two quantized values of BTC in a block is larger than a threshold which is defined by visual characteristics, the block will be identified as an edge block. In an edge block, the bitmap is adapted to compute block gradient orientation and to match the block pattern.
摘要翻译：我们公开了一种用于压缩彩色图像，视频块模式截断编码（VBPTC）的有效方法，其中常规块截断编码（BTC）用于对原始图像进行编码。该方法根据人的视觉感知定义边缘块。如果块中BTC的两个量化值之间的差大于由视觉特征定义的阈值，则该块将被识别为边缘块。在边缘块中，位图适于计算块梯度取向并匹配块模式。

5. 发明授权

US6118901A Array architecture with data-rings for 3-step hierarchical search block matching algorithm 失效
标题翻译：具有数据环的阵列架构，用于三步分层搜索块匹配算法
公开(公告)号：US6118901A
公开(公告)日：2000-09-12
申请号：US960526
申请日：1997-10-31
申请人： Liang-Gee Chen , Yeong-Kang Lai , Yuan-Chen Liu , Yung-Pin Lee
发明人： Liang-Gee Chen , Yeong-Kang Lai , Yuan-Chen Liu , Yung-Pin Lee
IPC分类号： G06T7/20 , H04N7/26 , G06K9/36 , H04N5/14 , H04N7/12
CPC分类号： G06T7/2026 , H04N19/433 , H04N19/533 , G06T2207/10016
摘要： The invention discloses a 9-cell array architecture with data-rings for 3-step hierarchical search (3SHS) block-matching algorithm. With the efficient data-rings and memory organization, the regular raster-scanned data flow and comparator tree-like structure can be used to simply internal I/O controller and reduce latency. In addition, we can utilize techniques to reduce external memory accesses and interconnections. The results demonstrate that the array architecture with the data-rings is low in terms of latency, memory bandwidth and costs and a high performance solution for the 3 SHS.
摘要翻译：本发明公开了一种具有用于三步分层搜索（3SHS）块匹配算法的数据环的9单元阵列架构。通过高效的数据环和存储器组织，常规的光栅扫描数据流和比较树状结构可用于简单的内部I / O控制器并减少延迟。此外，我们可以利用技术来减少外部存储器访问和互连。结果表明，具有数据环的阵列架构在延迟，内存带宽和成本方面都很低，而3 SHS的高性能解决方案。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式