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1. 发明授权

US06587589B1 Architecture for performing two-dimensional discrete wavelet transform 有权
标题翻译：用于执行二维离散小波变换的架构
公开(公告)号：US06587589B1
公开(公告)日：2003-07-01
申请号：US09514522
申请日：2000-02-28
申请人： Liang-Gee Chen , Po-Cheng Wu , Yuan-Chen Liu , Yeong-Kang Lai
发明人： Liang-Gee Chen , Po-Cheng Wu , Yuan-Chen Liu , Yeong-Kang Lai
IPC分类号： G06K946
CPC分类号： G06F17/148 , H04N19/42 , H04N19/63
摘要： An architecture for performing the two-dimensional discrete wavelet transform includes a transform module including a first stage and a second stage for decomposing an input image into four bands, and among the four bands, the band having the low frequency in both horizontal and vertical direction serves as the input image for next level decomposition operation; a multiplexer for selecting the band having the low frequency in both horizontal and vertical direction as the input image to feed into the transform module; and an optional memory module for storing the band having the lowest frequency in both horizontal and vertical direction. The polyphse decomposition technique is employed to the decimation filters of the first stage for segmenting the coefficients of the decimation filters of the first stage into an odd-numbered part and an even-numbered part, and the coefficient folding technique is employed to the decimation filters of the second stage such that every two coefficients of the decimation filters of the second stage share one set of a multiplier, an adder, and a register.
摘要翻译：用于执行二维离散小波变换的架构包括：变换模块，包括第一级和第二级，用于将输入图像分解成四个频带，并且在四个频带中，在水平和垂直方向上具有低频的频带作为下一级分解操作的输入图像; 用于选择具有水平和垂直方向上的低频的频带作为输入图像的多路复用器，以馈送到变换模块; 以及用于在水平和垂直方向上存储具有最低频率的频带的可选存储模块。多重分解技术被用于第一级的抽取滤波器，用于将第一级的抽取滤波器的系数分为奇数部分和偶数部分，并且系数折叠技术被用于抽取滤波器使得第二级的抽取滤波器的每两个系数共享一组乘法器，加法器和寄存器。

2. 发明授权

US6118901A Array architecture with data-rings for 3-step hierarchical search block matching algorithm 失效
标题翻译：具有数据环的阵列架构，用于三步分层搜索块匹配算法
公开(公告)号：US6118901A
公开(公告)日：2000-09-12
申请号：US960526
申请日：1997-10-31
申请人： Liang-Gee Chen , Yeong-Kang Lai , Yuan-Chen Liu , Yung-Pin Lee
发明人： Liang-Gee Chen , Yeong-Kang Lai , Yuan-Chen Liu , Yung-Pin Lee
IPC分类号： G06T7/20 , H04N7/26 , G06K9/36 , H04N5/14 , H04N7/12
CPC分类号： G06T7/2026 , H04N19/433 , H04N19/533 , G06T2207/10016
摘要： The invention discloses a 9-cell array architecture with data-rings for 3-step hierarchical search (3SHS) block-matching algorithm. With the efficient data-rings and memory organization, the regular raster-scanned data flow and comparator tree-like structure can be used to simply internal I/O controller and reduce latency. In addition, we can utilize techniques to reduce external memory accesses and interconnections. The results demonstrate that the array architecture with the data-rings is low in terms of latency, memory bandwidth and costs and a high performance solution for the 3 SHS.
摘要翻译：本发明公开了一种具有用于三步分层搜索（3SHS）块匹配算法的数据环的9单元阵列架构。通过高效的数据环和存储器组织，常规的光栅扫描数据流和比较树状结构可用于简单的内部I / O控制器并减少延迟。此外，我们可以利用技术来减少外部存储器访问和互连。结果表明，具有数据环的阵列架构在延迟，内存带宽和成本方面都很低，而3 SHS的高性能解决方案。

3. 发明授权

US6160850A Motion estimator employing a three-step hierachical search block-matching algorithm 有权
标题翻译：运动估计器采用三步法搜索块匹配算法
公开(公告)号：US6160850A
公开(公告)日：2000-12-12
申请号：US128523
申请日：1998-08-03
申请人： Liang-Gee Chen , Yung-Ping Lee , Yeong-Kang Lai
发明人： Liang-Gee Chen , Yung-Ping Lee , Yeong-Kang Lai
IPC分类号： G06T7/20 , H04N5/14 , H04N7/26 , H04N7/12
CPC分类号： H04N5/145 , G06T7/238 , G06T2207/10016 , H04N19/433 , H04N19/533
摘要： A motion estimator, employing a three-step hierarchical search block-matching algorithm for obtaining a motion vector by block-matching between a current block and its corresponding block, is provided. The motion estimator comprises: a memory block, a matching unit and a control unit. The memory block is for storing a candidate block corresponding to the current block. The matching unit matches the size of a current block with aforementioned candidate block and sub-candidate blocks identical to the current block. The control unit supplies candidate blocks in the memory blocks to the matching unit according to a prescribed matching sequence, and writes the candidate block corresponding to the current block to the section no longer used in the memory block simultaneous to the performance of Step 3 of a three-step hierarchical search block-matching algorithm.
摘要翻译：提供了一种采用三步分层搜索块匹配算法的运动估计器，用于通过当前块与其相应块之间的块匹配获得运动矢量。运动估计器包括：存储块，匹配单元和控制单元。存储器块用于存储与当前块相对应的候选块。匹配单元将当前块的大小与当前块相同的上述候选块和子候选块进行匹配。控制单元根据规定的匹配序列向存储块提供候选块到匹配单元，并将与当前块相对应的候选块写入到不再使用在存储块中的区段，同时执行步骤3的执行三步分层搜索块匹配算法。

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