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1. 发明授权

US07030016B2 Post ECP multi-step anneal/H2 treatment to reduce film impurity 失效
标题翻译：后期ECP多步退火/ H2处理以降低膜杂质
公开(公告)号：US07030016B2
公开(公告)日：2006-04-18
申请号：US10812729
申请日：2004-03-30
申请人： Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
发明人： Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
IPC分类号： H01L21/44
CPC分类号： H01L21/76877 , H01L21/2885
摘要： A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2 current density and second deposition step at a 60 mA/cm2 current density is used to deposit a second copper layer-that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.
摘要翻译：描述了在双镶嵌方案中形成铜互连的方法。在扩散阻挡层和种子层依次形成在电介质层中的沟槽和通孔的侧壁和底部上之后，通过第一ECP工艺以10mA / cm 2 / >电流密度以填充通孔和部分沟槽。进行第一退火步骤以除去碳杂质，并且任选地包括H 2 O 3等离子体处理。使用在40mA / cm 2电流密度下的第一沉积步骤和以60mA / cm 2电流密度进行第二沉积步骤的第二个ECP工艺来沉积第二铜层 - 过度填充沟槽。在第二退火步骤之后，CMP工艺使铜层平坦化。通过该方法可以实现更少的铜缺陷，降低的S，Cl和C杂质，以及Rc性能的提高。

2. 发明申请

US20050227479A1 Post ECP multi-step anneal/H2 treatment to reduce film impurity 失效
标题翻译：后期ECP多步退火/ H2处理以降低膜杂质
公开(公告)号：US20050227479A1
公开(公告)日：2005-10-13
申请号：US10812729
申请日：2004-03-30
申请人： Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
发明人： Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
IPC分类号： H01L21/311 , H01L21/768
CPC分类号： H01L21/76877 , H01L21/2885
摘要： A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2 current density and second deposition step at a 60 mA/cm2 current density is used to deposit a second copper layer-that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.
摘要翻译：描述了在双镶嵌方案中形成铜互连的方法。在扩散阻挡层和种子层依次形成在电介质层中的沟槽和通孔的侧壁和底部上之后，通过第一ECP工艺以10mA / cm 2 / >电流密度以填充通孔和部分沟槽。进行第一退火步骤以除去碳杂质，并且任选地包括H 2 O 3等离子体处理。使用在40mA / cm 2电流密度下的第一沉积步骤和以60mA / cm 2电流密度进行第二沉积步骤的第二个ECP工艺来沉积第二铜层 - 过度填充沟槽。在第二退火步骤之后，CMP工艺使铜层平坦化。通过该方法可以实现更少的铜缺陷，降低的S，Cl和C杂质，以及Rc性能的提高。

3. 发明授权

US07667835B2 Apparatus and method for preventing copper peeling in ECP 有权
标题翻译：用于防止ECP中铜剥落的装置和方法
公开(公告)号：US07667835B2
公开(公告)日：2010-02-23
申请号：US11510951
申请日：2006-08-28
申请人： Hsi-Kuei Cheng , Jung-Chih Tsao , Hsien-Ping Feng , Ming-Yuan Cheng , Steven Lin , Ray Chuang
发明人： Hsi-Kuei Cheng , Jung-Chih Tsao , Hsien-Ping Feng , Ming-Yuan Cheng , Steven Lin , Ray Chuang
IPC分类号： G01N21/00 , G01N21/55 , G01B11/28 , C25D21/12 , H01L21/00
CPC分类号： C25D17/00 , C25D7/123 , C25D17/001 , C25D21/12 , G01N21/55 , G01N2021/8411 , H01L21/67005 , H01L21/67253
摘要： An apparatus and method for preventing the peeling of electroplated metal from a wafer, is disclosed. The apparatus includes a seed layer detector system having a light source and a reflectivity detector. According to the method, the light source emits a beam of light onto a wafer and the reflectivity detector receives the light reflected from the wafer. The reflectivity of the wafer surface is measured to determine the presence or absence of a seed layer on the wafer, as well as whether the seed layer has a minimum thickness for optimum electroplating of a metal onto the seed layer.
摘要翻译：公开了一种用于防止电镀金属从晶片剥离的装置和方法。该装置包括具有光源和反射率检测器的种子层检测器系统。根据该方法，光源将光束发射到晶片上，反射率检测器接收从晶片反射的光。测量晶片表面的反射率以确定晶片上晶种层的存在或不存在，以及种子层是否具有用于最佳电镀金属到籽晶层上的最小厚度。

4. 发明授权

US07432192B2 Post ECP multi-step anneal/H2 treatment to reduce film impurity 有权
标题翻译：后期ECP多步退火/ H2处理以降低膜杂质
公开(公告)号：US07432192B2
公开(公告)日：2008-10-07
申请号：US11347946
申请日：2006-02-06
申请人： Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
发明人： Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
IPC分类号： H01L21/4763
CPC分类号： H01L21/76877 , H01L21/2885
摘要： A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2 current density and second deposition step at a 60 mA/cm2 current density is used to deposit a second copper layer that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.
摘要翻译：描述了在双镶嵌方案中形成铜互连的方法。在扩散阻挡层和种子层依次形成在电介质层中的沟槽和通孔的侧壁和底部上之后，通过第一ECP工艺以10mA / cm 2 / >电流密度以填充通孔和部分沟槽。进行第一退火步骤以除去碳杂质，并且任选地包括H 2 O 3等离子体处理。使用在40mA / cm 2电流密度下的第一沉积步骤和以60mA / cm 2电流密度进行第二沉积步骤的第二个ECP工艺来沉积第二铜层超过沟槽。在第二退火步骤之后，CMP工艺使铜层平坦化。通过该方法可以实现更少的铜缺陷，降低的S，Cl和C杂质，以及Rc性能的提高。

5. 发明申请

US20080047827A1 Apparatus and method for preventing copper peeling in ECP 有权
标题翻译：用于防止ECP中铜剥落的装置和方法
公开(公告)号：US20080047827A1
公开(公告)日：2008-02-28
申请号：US11510951
申请日：2006-08-28
申请人： Hsi-Kuei Cheng , Jung-Chih Tsao , Hsien-Ping Feng , Ming-Yuan Cheng , Steven Lin , Ray Chuang
发明人： Hsi-Kuei Cheng , Jung-Chih Tsao , Hsien-Ping Feng , Ming-Yuan Cheng , Steven Lin , Ray Chuang
IPC分类号： C25B9/00
CPC分类号： C25D17/00 , C25D7/123 , C25D17/001 , C25D21/12 , G01N21/55 , G01N2021/8411 , H01L21/67005 , H01L21/67253
摘要： An apparatus and method for preventing the peeling of electroplated metal from a wafer, is disclosed. The apparatus includes a seed layer detector system having a light source and a reflectivity detector. According to the method, the light source emits a beam of light onto a wafer and the reflectivity detector receives the light reflected from the wafer. The reflectivity of the wafer surface is measured to determine the presence or absence of a seed layer on the wafer, as well as whether the seed layer has a minimum thickness for optimum electroplating of a metal onto the seed layer.
摘要翻译：公开了一种用于防止电镀金属从晶片剥离的装置和方法。该装置包括具有光源和反射率检测器的种子层检测器系统。根据该方法，光源将光束发射到晶片上，反射率检测器接收从晶片反射的光。测量晶片表面的反射率以确定晶片上晶种层的存在或不存在，以及种子层是否具有用于最佳电镀金属到籽晶层上的最小厚度。

6. 发明申请

US20060216930A1 Post ECP multi-step anneal/H2 treatment to reduce film impurity 有权
标题翻译：后期ECP多步退火/ H2处理以降低膜杂质
公开(公告)号：US20060216930A1
公开(公告)日：2006-09-28
申请号：US11347946
申请日：2006-02-06
申请人： Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
发明人： Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
IPC分类号： H01L21/4763
CPC分类号： H01L21/76877 , H01L21/2885
摘要： A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2 current density and second deposition step at a 60 mA/cm2 current density is used to deposit a second copper layer that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.
摘要翻译：描述了在双镶嵌方案中形成铜互连的方法。在扩散阻挡层和种子层依次形成在电介质层中的沟槽和通孔的侧壁和底部上之后，通过第一ECP工艺以10mA / cm 2 / >电流密度以填充通孔和部分沟槽。进行第一退火步骤以除去碳杂质，并且任选地包括H 2 O 3等离子体处理。使用在40mA / cm 2电流密度下的第一沉积步骤和以60mA / cm 2电流密度进行第二沉积步骤的第二个ECP工艺来沉积第二铜层超过沟槽。在第二退火步骤之后，CMP工艺使铜层平坦化。通过该方法可以实现更少的铜缺陷，降低的S，Cl和C杂质，以及Rc性能的提高。

7. 发明申请

US20060219566A1 Method for fabricating metal layer 审中-公开
标题翻译：金属层制造方法
公开(公告)号：US20060219566A1
公开(公告)日：2006-10-05
申请号：US11092594
申请日：2005-03-29
申请人： Hsi-Kuei Cheng , Hsien-Ping Feng , Ming-Yuan Cheng , Jung-Chih Tsao , Shih-Chi Lin , Ray Chuang
发明人： Hsi-Kuei Cheng , Hsien-Ping Feng , Ming-Yuan Cheng , Jung-Chih Tsao , Shih-Chi Lin , Ray Chuang
IPC分类号： C25D5/02
CPC分类号： C25D7/123 , C25D5/02 , C25D5/04 , C25D17/001 , C25D21/10 , H01L21/2855 , H01L21/2885 , H01L21/76843 , H01L21/76877
摘要： A method for filling a structure using electrochemical deposition includes a barrier layer and a seed layer being deposited on one or more surfaces of the structure. Metal is electrochemically deposited to fill the structure in an electrochemical plating cell, wherein the electroplating surface of the substrate is tilted and rotated during electrochemical deposition.
摘要翻译：使用电化学沉积填充结构的方法包括沉积在该结构的一个或多个表面上的阻挡层和种子层。电化学沉积金属以填充电化学电镀单元中的结构，其中基板的电镀表面在电化学沉积期间倾斜并旋转。

8. 发明申请

US20080067076A1 Method of reducing oxygen content in ECP solution 审中-公开
标题翻译：降低ECP溶液中氧含量的方法
公开(公告)号：US20080067076A1
公开(公告)日：2008-03-20
申请号：US11523135
申请日：2006-09-19
申请人： Ming-Yuan Cheng , Hsien-Ping Feng , Hsi-Kuei Cheng , Kei-Wei Chen , Jung-Chin Tsao , Steven Lin , Ray Chuang
发明人： Ming-Yuan Cheng , Hsien-Ping Feng , Hsi-Kuei Cheng , Kei-Wei Chen , Jung-Chin Tsao , Steven Lin , Ray Chuang
IPC分类号： C25D3/00
CPC分类号： C25D3/02 , C02F3/34
摘要： A novel method, which is suitable to substantially reduce the presence of oxygen micro-bubbles in an electroplating bath solution, is disclosed. The method includes the addition of aerobic bacteria to the electroplating bath solution to consume oxygen in the solution. Reduction of the oxygen content in the electroplating bath solution prevents oxygen micro-bubbles from forming in the solution and becoming trapped between the solution and the surface of a metal seed layer on a substrate to block the electroplating of a metal film onto the seed layer. Consequently, the presence of surface pits and other structural defects in the surface of the electroplated metal film is substantially reduced.
摘要翻译：公开了一种适合于显着减少电镀浴液中氧微气泡存在的新方法。该方法包括向电镀浴溶液中加入需氧细菌以消耗溶液中的氧气。电镀浴溶液中的氧含量的降低防止溶液中形成氧微气泡并被困在溶液与基底上的金属种子层的表面之间，以阻止金属膜在种子层上的电镀。因此，电镀金属膜的表面中存在表面凹坑等结构缺陷。

9. 发明申请

US20060213778A1 Method for electrochemical plating on semiconductor wafers 审中-公开
标题翻译：半导体晶片电化学电镀方法
公开(公告)号：US20060213778A1
公开(公告)日：2006-09-28
申请号：US11089404
申请日：2005-03-23
申请人： Hsi-Kuei Cheng , Steven Lin , Chih-Chang Huang , Tzu-Ling Liao , Hsien-Ping Peng , Ming-Yuan Cheng , Ying-Jing Lu , Chieh-Tsao Wang , Ray Chuang , Chen-Peng Fan
发明人： Hsi-Kuei Cheng , Steven Lin , Chih-Chang Huang , Tzu-Ling Liao , Hsien-Ping Peng , Ming-Yuan Cheng , Ying-Jing Lu , Chieh-Tsao Wang , Ray Chuang , Chen-Peng Fan
IPC分类号： C25D5/18 , C25D5/02
CPC分类号： C25D5/18 , C25D5/02 , C25D7/123 , H01L21/2885
摘要： A method of electroplating conductive material on semiconductor wafers improves deposited film quality by providing greater control over the formation of the film grain structure. Better grain size control is achieved by applying a continuous DC plating current to the wafer which avoids sharp discontinuities in the current as the applied current is increased in successive stages during a plating cycle. Current discontinuities are avoided by gradually increasing the current in a ramp-like fashion between the successive plating stages.
摘要翻译：在半导体晶片上电镀导电材料的方法通过提供对薄膜晶粒结构的形成的更大控制来提高沉积膜质量。通过向晶片施加连续的直流电镀电流来实现更好的晶粒尺寸控制，其避免了在电镀循环期间的连续阶段中所施加的电流增加的电流中的尖锐的不连续性。通过在连续的电镀阶段之间以斜坡状的方式逐渐增加电流来避免电流不连续性。

10. 发明授权

US07926366B2 Tactile sensing array and manufacturing method thereof 有权
标题翻译：触觉传感阵列及其制造方法
公开(公告)号：US07926366B2
公开(公告)日：2011-04-19
申请号：US12476248
申请日：2009-06-01
申请人： Yao-Joe Yang , Ming-Yuan Cheng , Chen-Mo Taso
发明人： Yao-Joe Yang , Ming-Yuan Cheng , Chen-Mo Taso
IPC分类号： G01D7/00
CPC分类号： G01D5/25 , Y10T29/49007 , Y10T29/49117
摘要： In a tactile sensing array and its manufacturing method, the tactile sensing array includes first and second electrodes at different layers, conductors provided for cladding intersection positions of the first and second electrodes, and a cladding layer for cladding the first and second electrodes and conductors. Each of the first and second electrodes is a spiral conducting wire wound onto an elastic wire. During manufacture, a cladding layer solution is injected into a mold; first electrodes are installed in rows and apart, and each first electrode includes conductor solution drops; second electrodes are installed at the conductor solution drops; a cladding layer solution is injected again; and vacuum, heating and demolding process are performed. The invention has the effects of high extensibility, high elasticity and low manufacturing cost and prevents damages caused by high deformation when the tactile sensing array is used and covered onto a complicated surface.
摘要翻译：在触觉感测阵列及其制造方法中，触觉感测阵列包括不同层的第一和第二电极，用于包覆第一和第二电极的交叉位置的导体，以及用于包覆第一和第二电极和导体的包覆层。第一和第二电极中的每一个是缠绕在弹性线上的螺旋导电线。在制造过程中，将包覆层溶液注入模具中; 第一电极以行分开安装，并且每个第一电极包括导体溶液滴; 第二电极安装在导体溶液滴下; 再次注入包覆层溶液; 并执行真空，加热和脱模过程。本发明具有高延展性，高弹性和低制造成本的效果，并且当使用触觉感测阵列并覆盖在复杂表面上时，防止由高变形引起的损伤。

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