专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20110233778A1 FORMATION OF LINER AND BARRIER FOR TUNGSTEN AS GATE ELECTRODE AND AS CONTACT PLUG TO REDUCE RESISTANCE AND ENHANCE DEVICE PERFORMANCE 有权
标题翻译：形成用于电极电极和接触电极的衬里和障板，以降低电阻和增强器件性能
公开(公告)号：US20110233778A1
公开(公告)日：2011-09-29
申请号：US12730888
申请日：2010-03-24
申请人： Sang-Hyeob Lee , Sang Ho Yu , Wei Ti Lee , Seshadri Ganguli , Hyoung-Chan Ha , Hoon Kim
发明人： Sang-Hyeob Lee , Sang Ho Yu , Wei Ti Lee , Seshadri Ganguli , Hyoung-Chan Ha , Hoon Kim
IPC分类号： H01L23/532 , H01L21/768
CPC分类号： H01L23/485 , C23C16/34 , H01L21/28088 , H01L21/28556 , H01L21/321 , H01L21/76846 , H01L21/76856 , H01L21/76877 , H01L21/76883 , H01L21/76886 , H01L23/53266 , H01L27/10891 , H01L29/4236 , H01L2924/0002 , H01L2924/00
摘要： The invention provides a method of forming a film stack on a substrate, comprising depositing a tungsten nitride layer on the substrate, subjecting the substrate to a nitridation treatment using active nitrogen species from a remote plasma, and depositing a conductive bulk layer directly on the tungsten nitride layer without depositing a tungsten nucleation layer on the tungsten nitride layer as a growth site for tungsten.
摘要翻译：本发明提供了一种在衬底上形成膜堆叠的方法，包括在衬底上沉积氮化钨层，使用来自远程等离子体的活性氮物质对衬底进行氮化处理，并将导电体层直接沉积在钨上氮化物层，而不在钨氮化物层上沉积钨成核层，作为钨的生长位置。

2. 发明授权

US09129945B2 Formation of liner and barrier for tungsten as gate electrode and as contact plug to reduce resistance and enhance device performance 有权
标题翻译：形成作为栅电极的钨线和屏障，作为接触插塞，以降低电阻并提高器件性能
公开(公告)号：US09129945B2
公开(公告)日：2015-09-08
申请号：US12730888
申请日：2010-03-24
申请人： Sang-Hyeob Lee , Sang Ho Yu , Wei Ti Lee , Seshadri Ganguli , Hyoung-Chan Ha , Hoon Kim
发明人： Sang-Hyeob Lee , Sang Ho Yu , Wei Ti Lee , Seshadri Ganguli , Hyoung-Chan Ha , Hoon Kim
IPC分类号： H01L23/532 , H01L21/768 , H01L23/485 , C23C16/34 , H01L21/28 , H01L21/285 , H01L21/321 , H01L27/108 , H01L29/423
CPC分类号： H01L23/485 , C23C16/34 , H01L21/28088 , H01L21/28556 , H01L21/321 , H01L21/76846 , H01L21/76856 , H01L21/76877 , H01L21/76883 , H01L21/76886 , H01L23/53266 , H01L27/10891 , H01L29/4236 , H01L2924/0002 , H01L2924/00
摘要： The invention provides a method of forming a film stack on a substrate, comprising depositing a tungsten nitride layer on the substrate, subjecting the substrate to a nitridation treatment using active nitrogen species from a remote plasma, and depositing a conductive bulk layer directly on the tungsten nitride layer without depositing a tungsten nucleation layer on the tungsten nitride layer as a growth site for tungsten.
摘要翻译：本发明提供了一种在衬底上形成膜堆叠的方法，包括在衬底上沉积氮化钨层，使用来自远程等离子体的活性氮物质对衬底进行氮化处理，并将导电体层直接沉积在钨上氮化物层，而不在钨氮化物层上沉积钨成核层，作为钨的生长位置。

3. 发明授权

US09926639B2 Methods for forming barrier/seed layers for copper interconnect structures 有权
公开(公告)号：US09926639B2
公开(公告)日：2018-03-27
申请号：US13167001
申请日：2011-06-23
申请人： Hoon Kim , Wei Ti Lee , Sang Ho Yu , Seshadri Ganguli , Hyoung-Chan Ha , Sang Hyeob Lee
发明人： Hoon Kim , Wei Ti Lee , Sang Ho Yu , Seshadri Ganguli , Hyoung-Chan Ha , Sang Hyeob Lee
IPC分类号： C25D5/02 , H01L21/768 , H01L21/285
CPC分类号： C25D5/02 , H01L21/2855 , H01L21/28556 , H01L21/28562 , H01L21/76831 , H01L21/76846 , H01L21/76864 , H01L21/76873 , H01L21/76898
摘要： Methods for forming barrier/seed layers for interconnect structures are provided herein. In some embodiments, a method of processing a substrate having an opening formed in a first surface of the substrate, the opening having a sidewall and a bottom surface, the method may include forming a layer comprising manganese (Mn) and at least one of ruthenium (Ru) or cobalt (Co) on the sidewall and bottom surface of the opening; and depositing a conductive material on the layer to fill the opening. In some embodiments, one of ruthenium (Ru) or cobalt (Co) is deposited on the sidewall and bottom surface of the opening. The materials may be deposited by chemical vapor deposition (CVD) or by physical vapor deposition (PVD).

4. 发明授权

US08637390B2 Metal gate structures and methods for forming thereof 有权
标题翻译：金属门结构及其形成方法
公开(公告)号：US08637390B2
公开(公告)日：2014-01-28
申请号：US13116794
申请日：2011-05-26
申请人： Seshadri Ganguli , Sang Ho Yu , Sang-Hyeob Lee , Hyoung-Chan Ha , Wei Ti Lee , Hoon Kim , Srinivas Gandikota , Yu Lei , Kevin Moraes , Xianmin Tang
发明人： Seshadri Ganguli , Sang Ho Yu , Sang-Hyeob Lee , Hyoung-Chan Ha , Wei Ti Lee , Hoon Kim , Srinivas Gandikota , Yu Lei , Kevin Moraes , Xianmin Tang
IPC分类号： H01L21/4763
CPC分类号： H01L21/28079 , H01L21/28088 , H01L21/32051 , H01L29/49
摘要： Metal gate structures and methods for forming thereof are provided herein. In some embodiments, a method for forming a metal gate structure on a substrate having a feature formed in a high k dielectric layer may include depositing a first layer within the feature atop the dielectric layer; depositing a second layer comprising cobalt or nickel within the feature atop the first layer; and depositing a third layer comprising a metal within the feature atop the second layer to fill the feature, wherein at least one of the first or second layers forms a wetting layer to form a nucleation layer for a subsequently deposited layer, wherein one of the first, second, or third layers forms a work function layer, and wherein the third layer forms a gate electrode.
摘要翻译：本文提供了金属门结构及其形成方法。在一些实施例中，在具有形成在高k电介质层中的特征的衬底上形成金属栅极结构的方法可以包括在电介质层顶部的特征内沉积第一层; 在所述特征内在所述第一层顶部沉积包含钴或镍的第二层; 以及在第二层顶部沉积包括特征内的金属的第三层以填充该特征，其中第一层或第二层中的至少一层形成润湿层以形成后续沉积层的成核层，其中第一层第二层或第三层形成功函数层，并且其中第三层形成栅电极。

5. 发明授权

US07378002B2 Aluminum sputtering while biasing wafer 失效
标题翻译：铝溅射同时偏置晶圆
公开(公告)号：US07378002B2
公开(公告)日：2008-05-27
申请号：US11209328
申请日：2005-08-23
申请人： Wei Ti Lee , Ted Guo , Sang-Ho Yu
发明人： Wei Ti Lee , Ted Guo , Sang-Ho Yu
IPC分类号： C23C14/35 , H01L21/44
CPC分类号： C23C14/185 , C23C14/025 , C23C14/046 , C23C14/345
摘要： An aluminum sputtering process including RF biasing the wafer and a two-step aluminum fill process and apparatus used therefor to fill aluminum into a narrow via hole by sputtering under two distinctly different conditions, preferably in two different plasma sputter reactors. The first step includes sputtering a high fraction of ionized aluminum atoms onto a relatively cold wafer, e.g., held at less than 150° C., and relatively highly biased to attract aluminum atoms into the narrow holes and etch overhangs. The second step includes more neutral sputtering onto a relatively warm wafer, e.g. held at greater than 250° C., and substantially unbiased to provide a more isotropic and uniform aluminum flux. The magnetron scanned about the back of the aluminum target may be relatively small and unbalanced in the first step and relatively large and balanced in the second.
摘要翻译：一种铝溅射工艺，包括RF偏置晶片和两步铝填充工艺和装置，用于在两个明显不同的条件下，优选在两个不同的等离子体溅射反应器中通过溅射将铝填充到窄通孔中。第一步包括将大部分电离铝原子溅射到相对冷的晶片上，例如保持在小于150℃，并且相当高的偏压以将铝原子吸引到窄孔中并蚀刻突出端。第二步包括在相对温暖的晶片上的更中性的溅射，例如保持在大于250℃，并且基本上无偏差以提供更多的各向同性和均匀的铝通量。围绕铝靶的背面扫描的磁控管可能在第一步骤中相对较小并且不平衡，而在第二步中相对较大且平衡。

6. 发明授权

US07867900B2 Aluminum contact integration on cobalt silicide junction 失效
标题翻译：硅化钴接头上的铝接触集成
公开(公告)号：US07867900B2
公开(公告)日：2011-01-11
申请号：US12240816
申请日：2008-09-29
申请人： Wei Ti Lee , Mohd Fadzli Anwar Hassan , Ted Guo , Sang-Ho Yu
发明人： Wei Ti Lee , Mohd Fadzli Anwar Hassan , Ted Guo , Sang-Ho Yu
IPC分类号： H01L21/44
CPC分类号： H01L23/53214 , H01L21/02068 , H01L21/28518 , H01L21/76876 , H01L21/76877 , H01L23/485 , H01L23/53223 , H01L2924/0002 , H01L2924/00
摘要： Embodiments herein provide methods for forming an aluminum contact on a cobalt silicide junction. In one embodiment, a method for forming materials on a substrate is provided which includes forming a cobalt silicide layer on a silicon-containing surface of the substrate during a silicidation process, forming a fluorinated sublimation film on the cobalt silicide layer during a plasma process, heating the substrate to a sublimation temperature to remove the fluorinated sublimation film, depositing a titanium-containing nucleation layer over the cobalt silicide layer, and depositing an aluminum-containing material over the titanium-containing nucleation layer. In one example, the method further provides forming the cobalt silicide layer by depositing a cobalt-containing layer on the silicon-containing surface, heating the substrate during a rapid thermal annealing (RTA) process, etching away any remaining portions of the cobalt-containing layer from the substrate, and subsequently heating the substrate during another RTA process.
摘要翻译：本文的实施方案提供了在钴硅化物结上形成铝接触的方法。在一个实施例中，提供了一种在衬底上形成材料的方法，包括在硅化过程中在衬底的含硅表面上形成钴硅化物层，在等离子体工艺期间在硅化钴层上形成氟化升华膜，将基板加热到升华温度以除去氟化升华膜，在硅化钴层上沉积含钛成核层，并在含钛成核层上沉积含铝材料。在一个实例中，该方法还提供通过在含硅表面上沉积含钴层来形成钴硅化物层，在快速热退火（RTA）工艺中加热衬底，蚀刻掉含钴的剩余部分层，然后在另一RTA工艺期间加热衬底。

7. 发明授权

US09952166B2 Silicon germanium thickness and composition determination using combined XPS and XRF technologies 有权
公开(公告)号：US09952166B2
公开(公告)日：2018-04-24
申请号：US15454950
申请日：2017-03-09
申请人： Heath A. Pois , Wei Ti Lee
发明人： Heath A. Pois , Wei Ti Lee
IPC分类号： G01N23/22 , G01B15/02 , G01N23/223 , G01N23/227
CPC分类号： G01N23/2206 , G01B15/02 , G01N23/2208 , G01N23/223 , G01N23/2273 , G01N2223/61 , G01N2223/6116
摘要： Systems and approaches for silicon germanium thickness and composition determination using combined XPS and XRF technologies are described. In an example, a method for characterizing a silicon germanium film includes generating an X-ray beam. A sample is positioned in a pathway of said X-ray beam. An X-ray photoelectron spectroscopy (XPS) signal generated by bombarding said sample with said X-ray beam is collected. An X-ray fluorescence (XRF) signal generated by bombarding said sample with said X-ray beam is also collected. Thickness or composition, or both, of the silicon germanium film is determined from the XRF signal or the XPS signal, or both.

8. 发明申请

US20170176357A1 SILICON GERMANIUM THICKNESS AND COMPOSITION DETERMINATION USING COMBINED XPS AND XRF TECHNOLOGIES 有权
公开(公告)号：US20170176357A1
公开(公告)日：2017-06-22
申请号：US15454950
申请日：2017-03-09
申请人： Heath A. Pois , Wei Ti Lee
发明人： Heath A. Pois , Wei Ti Lee
IPC分类号： G01N23/22 , G01N23/223 , G01N23/227 , G01B15/02
CPC分类号： G01N23/2206 , G01B15/02 , G01N23/2208 , G01N23/223 , G01N23/2273 , G01N2223/61 , G01N2223/6116
摘要： Systems and approaches for silicon germanium thickness and composition determination using combined XPS and XRF technologies are described. In an example, a method for characterizing a silicon germanium film includes generating an X-ray beam. A sample is positioned in a pathway of said X-ray beam. An X-ray photoelectron spectroscopy (XPS) signal generated by bombarding said sample with said X-ray beam is collected. An X-ray fluorescence (XRF) signal generated by bombarding said sample with said X-ray beam is also collected. Thickness or composition, or both, of the silicon germanium film is determined from the XRF signal or the XPS signal, or both.

9. 发明授权

US08847192B2 Resistive switching devices having alloyed electrodes and methods of formation thereof 有权
标题翻译：具有合金电极的电阻式开关器件及其形成方法
公开(公告)号：US08847192B2
公开(公告)日：2014-09-30
申请号：US13558296
申请日：2012-07-25
申请人： Wei Ti Lee , Chakravarthy Gopalan , Yi Ma , Jeffrey Shields , Philippe Blanchard , John Ross Jameson , Foroozan Sarah Koushan , Janet Wang , Mark Kellam
发明人： Wei Ti Lee , Chakravarthy Gopalan , Yi Ma , Jeffrey Shields , Philippe Blanchard , John Ross Jameson , Foroozan Sarah Koushan , Janet Wang , Mark Kellam
IPC分类号： H01L47/00 , H01L45/00
CPC分类号： H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/142 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/16 , H01L45/1658
摘要： In accordance with an embodiment of the present invention, a resistive switching device comprises a bottom electrode, a switching layer disposed over the bottom electrode, and a top electrode disposed over the switching layer. The top electrode comprises an alloy of a memory metal and an alloying element. The top electrode provides a source of the memory metal. The memory metal is configured to change a state of the switching layer.
摘要翻译：根据本发明的实施例，电阻式开关装置包括底电极，设置在底电极上的开关层和设置在开关层上的顶电极。顶部电极包括记忆金属和合金元素的合金。顶部电极提供存储金属的源。存储器金属被配置为改变开关层的状态。

10. 发明授权

US06716733B2 CVD-PVD deposition process 有权
标题翻译： CVD-PVD沉积工艺
公开(公告)号：US06716733B2
公开(公告)日：2004-04-06
申请号：US10170128
申请日：2002-06-11
申请人： Wei Ti Lee , Ted Guo
发明人： Wei Ti Lee , Ted Guo
IPC分类号： H01L213205
CPC分类号： H01L21/76843 , H01L21/2855 , H01L21/76876 , H01L21/76877 , H01L21/76882
摘要： The present invention relates to a method for depositing metal layers on substrates with improved surface morphology. According to one aspect of the invention, a metal is deposited by chemical vapor deposition on a substrate having an aperture formed therein. A metal is then deposited on the substrate by physical vapor deposition performed with a low substrate temperature. The substrate is then heated. The substrate may then receive a metal deposited by physical vapor deposition performed at a high temperature and an additional heating step. The aperture of the resulting substrate is filled with metal and is substantially void-free and has a smooth surface morphology.
摘要翻译：本发明涉及一种在具有改进的表面形态的基底上沉积金属层的方法。根据本发明的一个方面，通过化学气相沉积将金属沉积在其上形成有孔的基底上。然后通过在低衬底温度下进行的物理气相沉积将金属沉积在衬底上。然后将基材加热。然后，基板可以接收通过在高温和附加加热步骤进行的物理气相沉积沉积的金属。所得衬底的孔径被填充金属，并且基本上无空隙并且具有光滑的表面形态。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式