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    • 1. 发明授权
    • Spread spectrum clock generator
    • 扩频时钟发生器
    • US07161970B2
    • 2007-01-09
    • US10939199
    • 2004-09-10
    • Hong Sair LimJunho Cho
    • Hong Sair LimJunho Cho
    • H04B1/69
    • H03L7/0805H03L7/099H04B15/02H04B2215/067
    • A spread spectrum clock generator comprises a conventional closed-loop VCO and an open-loop VCO where both are coupled to the same point of the PLL. Both VCOs comprise a V-to-I converter followed by a current-controlled oscillator and are identical in design but only the open-loop VCO receives the modulation current to generate the spread spectrum clock signal. The open-loop ICO is part of the spread spectrum generator and in one embodiment of the invention receives feedback current signals representing the modulation method and modulation ratio. This ensures that the modulated clock output tracks the PLL output frequency. In a second embodiment the closed-loop VCO receives from the spread spectrum generator the feedback current signal representing the modulation method (center/down spread) while the open-loop VCO receives the feedback signal representing the modulation ratio.
    • 扩频时钟发生器包括常规闭环VCO和开环VCO,其中两者都耦合到PLL的相同点。 两个VCO都包括一个V-to-I转换器,随后是一个电流控制的振荡器,并且在设计上是相同的,但只有开环VCO接收调制电流以产生扩频时钟信号。 开环ICO是扩频发生器的一部分,并且在本发明的一个实施例中,接收表示调制方法和调制比的反馈电流信号。 这样可以确保调制时钟输出跟踪PLL输出频率。 在第二实施例中,闭环VCO从扩展频谱发生器接收表示调制方法的反馈电流信号(中心/向下扩展),而开环VCO接收到表示调制比的反馈信号。
    • 2. 发明授权
    • Integrated circuit with improved level shifter
    • 具有改进电平转换器的集成电路
    • US08723551B2
    • 2014-05-13
    • US12610750
    • 2009-11-02
    • Junho Cho
    • Junho Cho
    • H03K19/0175G09G5/00
    • H03K3/356113G09G3/20G09G2310/0289G09G2330/02
    • Level shifting circuitry and corresponding enable signal generating circuitry provides improved leakage current control while eliminating the need for supplying reference voltage input in the enable signal generator. The level shifting circuitry is a type of cascode free level shifting circuit that does not include cascode transistors as in the prior art but instead utilizes cross coupled logic to provide level shifting while also utilizing enable signal controlled transistors to control leakage current through the cross coupled logic during power up sequencing. The level shifting circuitry provides improved leakage current limiting structure for power up sequencing whether a lower level supply voltage ramps up faster than the higher level supply voltage or vice a versa.
    • 电平移位电路和相应的使能信号发生电路提供改进的漏电流控制,同时消除在使能信号发生器中提供参考电压输入的需要。 电平移位电路是一种类型的无共享共栅电平移位电路,其不包括现有技术中的共源共栅晶体管,而是使用交叉耦合逻辑来提供电平移位,同时还利用使能信号控制的晶体管来控制穿过交叉耦合逻辑的漏电流 在上电排序期间。 电平移位电路提供改进的漏电流限制结构,用于上电排序,较低电平的电源电压是否比上一级电源电压上升更快,反之亦然。
    • 3. 发明申请
    • Spread spectrum clock generator
    • 扩频时钟发生器
    • US20060056491A1
    • 2006-03-16
    • US10939199
    • 2004-09-10
    • Hong LimJunho Cho
    • Hong LimJunho Cho
    • H04B1/69H03D3/24
    • H03L7/0805H03L7/099H04B15/02H04B2215/067
    • A spread spectrum clock generator comprises a conventional closed-loop VCO and an open-loop VCO where both are coupled to the same point of the PLL. Both VCOs comprise a V-to-I converter followed by a current-controlled oscillator and are identical in design but only the open-loop VCO receives the modulation current to generate the spread spectrum clock signal. The open-loop ICO is part of the spread spectrum generator and in one embodiment of the invention receives feedback current signals representing the modulation method and modulation ratio. This ensures that the modulated clock output tracks the PLL output frequency. In a second embodiment the closed-loop VCO receives from the spread spectrum generator the feedback current signal representing the modulation method (center/down spread) while the open-loop VCO receives the feedback signal representing the modulation ratio.
    • 扩频时钟发生器包括常规闭环VCO和开环VCO,其中两者都耦合到PLL的相同点。 两个VCO都包括一个V-to-I转换器,随后是一个电流控制的振荡器,并且在设计上是相同的,但只有开环VCO接收调制电流以产生扩频时钟信号。 开环ICO是扩频发生器的一部分,并且在本发明的一个实施例中,接收表示调制方法和调制比的反馈电流信号。 这样可以确保调制时钟输出跟踪PLL输出频率。 在第二实施例中,闭环VCO从扩展频谱发生器接收表示调制方法的反馈电流信号(中心/向下扩展),而开环VCO接收到表示调制比的反馈信号。
    • 5. 发明申请
    • APPARATUS AND METHODS FOR SELF-BIASING DIFFERENTIAL SIGNALING CIRCUITRY HAVING MULTIMODE OUTPUT CONFIGURATIONS FOR LOW VOLTAGE APPLICATIONS
    • 用于自偏置具有用于低电压应用的多模输出配置的差分信号电路的装置和方法
    • US20060284649A1
    • 2006-12-21
    • US11160243
    • 2005-06-15
    • Junho ChoNancy ChanRamesh SenthinathanStephen YueRichard Fung
    • Junho ChoNancy ChanRamesh SenthinathanStephen YueRichard Fung
    • H03K19/094
    • H03K17/302H03K17/04106
    • The present disclosure relates to a differential signaling circuit including differential signaling circuitry having at least one output and one input, that can operate in multiple mode of operations while using a single, low voltage supply source. Two or more switches are included and configured to selectively couple a supply voltage to the output dependent on a mode of operation of the differential signaling circuitry. The circuit also includes a switch control biasing circuit operatively coupled to at least one of the switches and to the output of the differential signaling circuitry. The switch control biasing circuit provides a switch control biasing voltage to control a state of the switch based on a voltage level of the output. Further, a bulk biasing circuit is included and operatively coupled to the switch. The bulk biasing circuit selectively provides a bulk biasing voltage to the switch based on the voltage level of the output.
    • 本公开涉及一种差分信号电路,其包括具有至少一个输出和一个输入的差分信号电路,其可以在使用单个低电压电源时在多种操作模式下操作。 两个或更多个开关被包括并配置成根据差分信号电路的操作模式选择性地将电源电压耦合到输出。 电路还包括可操作地耦合到至少一个开关和差分信号电路的输出的开关控制偏置电路。 开关控制偏置电路提供开关控制偏置电压,以基于输出的电压电平来控制开关的状态。 此外,体积偏置电路被包括并且可操作地耦合到开关。 体积偏置电路基于输出的电压电平选择性地向开关提供体积偏置电压。
    • 6. 发明授权
    • Apparatus and methods for self-biasing differential signaling circuitry having multimode output configurations for low voltage applications
    • 具有用于低电压应用的多模输出配置的用于自偏压差动信号电路的装置和方法
    • US07495477B2
    • 2009-02-24
    • US11830897
    • 2007-07-31
    • Junho ChoNancy ChanRamesh SenthinathanStephen YueRichard W. Fung
    • Junho ChoNancy ChanRamesh SenthinathanStephen YueRichard W. Fung
    • H03K19/094
    • H03K17/302H03K17/04106
    • The present disclosure relates to a differential signaling circuit including differential signaling circuitry having at least one output and one input, that can operate in multiple mode of operations while using a single, low voltage supply source. Two or more switches are included and configured to selectively couple a supply voltage to the output dependent on a mode of operation of the differential signaling circuitry. The circuit also includes a switch control biasing circuit operatively coupled to at least one of the switches and to the output of the differential signaling circuitry. The switch control biasing circuit provides a switch control biasing voltage to control a state of the switch based on a voltage level of the output. Further, a bulk biasing circuit is included and operatively coupled to the switch. The bulk biasing circuit selectively provides a bulk biasing voltage to the switch based on the voltage level of the output.
    • 本公开涉及一种差分信号电路,其包括具有至少一个输出和一个输入的差分信号电路,其可以在使用单个低电压电源时在多种操作模式下操作。 两个或更多个开关被包括并配置成根据差分信号电路的操作模式选择性地将电源电压耦合到输出。 电路还包括可操作地耦合到开关中的至少一个和差分信号电路的输出的开关控制偏置电路。 开关控制偏置电路提供开关控制偏置电压,以基于输出的电压电平来控制开关的状态。 此外,体积偏置电路被包括并且可操作地耦合到开关。 体积偏置电路基于输出的电压电平选择性地向开关提供体积偏置电压。
    • 7. 发明授权
    • Apparatus and methods for self-biasing differential signaling circuitry having multimode output configurations for low voltage applications
    • 具有用于低电压应用的多模输出配置的用于自偏压差动信号电路的装置和方法
    • US07253663B2
    • 2007-08-07
    • US11160243
    • 2005-06-15
    • Junho ChoNancy ChanRamesh SenthinathanStephen YueRichard W Fung
    • Junho ChoNancy ChanRamesh SenthinathanStephen YueRichard W Fung
    • H03K19/094
    • H03K17/302H03K17/04106
    • The present disclosure relates to a differential signaling circuit including differential signaling circuitry having at least one output and one input, that can operate in multiple mode of operations while using a single, low voltage supply source. Two or more switches are included and configured to selectively couple a supply voltage to the output dependent on a mode of operation of the differential signaling circuitry. The circuit also includes a switch control biasing circuit operatively coupled to at least one of the switches and to the output of the differential signaling circuitry. The switch control biasing circuit provides a switch control biasing voltage to control a state of the switch based on a voltage level of the output. Further, a bulk biasing circuit is included and operatively coupled to the switch. The bulk biasing circuit selectively provides a bulk biasing voltage to the switch based on the voltage level of the output.
    • 本公开涉及一种差分信号电路,其包括具有至少一个输出和一个输入的差分信号电路,其可以在使用单个低电压电源时在多种操作模式下操作。 两个或更多个开关被包括并配置成根据差分信号电路的操作模式选择性地将电源电压耦合到输出。 电路还包括可操作地耦合到至少一个开关和差分信号电路的输出的开关控制偏置电路。 开关控制偏置电路提供开关控制偏置电压,以基于输出的电压电平来控制开关的状态。 此外,体积偏置电路被包括并且可操作地耦合到开关。 体积偏置电路基于输出的电压电平选择性地向开关提供体积偏置电压。
    • 8. 发明授权
    • Apparatus and methods for self-biasing differential signaling circuitry having multimode output configurations for low voltage applications
    • 具有用于低电压应用的多模输出配置的用于自偏压差动信号电路的装置和方法
    • US07893719B2
    • 2011-02-22
    • US11951447
    • 2007-12-06
    • Chihou LeeJunho Cho
    • Chihou LeeJunho Cho
    • H03K19/094
    • H03K19/018528H03K17/063H03K2017/066H03K2217/0018
    • A digital data transmitting device is disclosed having differential signaling circuitry, a current source controller and a pair of transistor-implemented current sources is disclosed. The current source controller generates a current source control signal based on a detected mode of operation of the differential signaling circuitry. The pair of transistor-implemented current sources selectively generate source currents to adjust the output voltage levels as the differential output terminals in response to the current source control signal. The digital data transmitting device may also include a current bulk biasing circuit that generates a current source bulk biasing signal such that when the differential signaling circuitry is in one mode of operation, the current source bulk biasing signal retards currents leakage across the pair of transistor-implemented current sources.
    • 公开了一种数字数据传输装置,其具有差分信令电路,电流源控制器和一对晶体管实现的电流源。 电流源控制器基于差分信号电路的检测模式生成电流源控制信号。 一对晶体管实现的电流源选择性地产生源电流以响应于电流源控制信号而调整作为差分输出端的输出电压电平。 数字数据发送装置还可以包括当前体积偏置电路,其产生电流源体偏置信号,使得当差分信号电路处于一种工作模式时,电流源体偏置信号阻止跨越该对晶体管 - 实施当前来源。
    • 10. 发明申请
    • INTEGRATED CIRCUIT WITH IMPROVED LEVEL SHIFTER
    • 具有改进级别的整流器的集成电路
    • US20110102383A1
    • 2011-05-05
    • US12610750
    • 2009-11-02
    • Junho Cho
    • Junho Cho
    • G09G5/00H03K19/0175
    • H03K3/356113G09G3/20G09G2310/0289G09G2330/02
    • Level shifting circuitry and corresponding enable signal generating circuitry provides improved leakage current control while eliminating the need for supplying reference voltage input in the enable signal generator. The level shifting circuitry is a type of cascode free level shifting circuit that does not include cascode transistors as in the prior art but instead utilizes cross coupled logic to provide level shifting while also utilizing enable signal controlled transistors to control leakage current through the cross coupled logic during power up sequencing. The level shifting circuitry provides improved leakage current limiting structure for power up sequencing whether a lower level supply voltage ramps up faster than the higher level supply voltage or vice a versa.
    • 电平移位电路和相应的使能信号发生电路提供改进的漏电流控制,同时消除在使能信号发生器中提供参考电压输入的需要。 电平移位电路是一种类型的无共享共栅电平移位电路,其不包括现有技术中的共源共栅晶体管,而是使用交叉耦合逻辑来提供电平移位,同时还利用使能信号控制的晶体管来控制穿过交叉耦合逻辑的漏电流 在上电排序期间。 电平移位电路提供改进的漏电流限制结构,用于上电排序,较低电平的电源电压是否比上一级电源电压上升更快,反之亦然。