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1. 发明申请

US20110006349A1 FIELD EFFECT TRANSISTOR HAVING CHANNEL SILICON GERMANIUM 审中-公开
标题翻译：具有通道硅锗的场效应晶体管
公开(公告)号：US20110006349A1
公开(公告)日：2011-01-13
申请号：US12501718
申请日：2009-07-13
申请人： Hiroyuki Ota , Vincent Sih
发明人： Hiroyuki Ota , Vincent Sih
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/165 , H01L21/26586 , H01L21/28052 , H01L21/28255 , H01L29/1054 , H01L29/1083 , H01L29/6659 , H01L29/66651 , H01L29/7833
摘要： Field effect transistors and methods of making field effect transistors are provided. The field effect transistor can contain a semiconductor substrate containing shallow trench isolations; a silicon germanium layer in a trench at an upper surface of the semiconductor substrate between the shallow trench isolations; a gate feature on the silicon germanium layer; and metal silicides on the upper potions of silicon germanium layer and semiconductor substrate that are not covered by the gate feature. The silicon germanium layer has a bottom surface and a top surface having a (100) plane and side surfaces having two or more planes.
摘要翻译：提供场效应晶体管和制作场效应晶体管的方法。场效应晶体管可以包含含有浅沟槽隔离的半导体衬底; 在所述浅沟槽隔离部之间的所述半导体衬底的上表面的沟槽中的硅锗层; 硅锗层上的栅极特征; 以及未被栅极特征覆盖的硅锗层和半导体衬底的上部的金属硅化物。硅锗层具有底表面和具有（100）平面的顶表面和具有两个或多个平面的侧表面。

2. 发明申请

US20060030095A1 Methods for elimination of arsenic based defects 有权
标题翻译：消除基于砷的缺陷的方法
公开(公告)号：US20060030095A1
公开(公告)日：2006-02-09
申请号：US10913214
申请日：2004-08-06
申请人： Yin-Min Goh , Simon Chooi , Teck Lim , Vincent Sih , Chian Sin , Ping Ee , Zainab Ismail , Cher Chua
发明人： Yin-Min Goh , Simon Chooi , Teck Lim , Vincent Sih , Chian Sin , Ping Ee , Zainab Ismail , Cher Chua
IPC分类号： H01L21/8238 , H01L21/4763
CPC分类号： H01L21/02057 , H01L21/02068 , H01L21/28518 , H01L21/76237 , H01L21/823814 , H01L21/823878 , H01L29/665 , H01L29/7833
摘要： Methods of preparing conductive regions such as source/drain regions for silicidation procedures, has been developed. The methods feature removal of native oxide as well as removal of deposited arsenic based defects from conductive surfaces prior to deposition of a metal component of subsequently formed metal silicide regions. Arsenic ions implanted for N type source/drain regions are also implanted into insulator regions such as insulator filled shallow trench isolation regions. A hydrofluoric acid cycle used as a component of the pre-silicidation preparation procedure can release arsenic from the shallow trench isolation regions in the form of arsenic based defects, which in turn can re-deposit on the surface of source/drain region. Therefore pre-silicidation preparation treatments described in this invention feature removal of both native oxide and arsenic based defects from conductive surfaces prior to metal silicide formation. Methods include wet etch procedures featuring hydrofluoric acid and hydrogen peroxide, as well as spin dry and dry etch procedures both employed post hydrofluoric acid treatment to remove re-deposited arsenic based defects.
摘要翻译：已经开发了制备用于硅化程序的源极/漏极区域的导电区域的方法。该方法在沉积随后形成的金属硅化物区域的金属组分之前，特征在于去除自然氧化物以及从导电表面去除沉积的基于砷的缺陷。注入用于N型源极/漏极区域的砷离子也被注入绝缘体区域，例如绝缘体填充的浅沟槽隔离区域。用作预硅化物制备方法的组分的氢氟酸循环可以以基于砷的缺陷的形式从浅沟槽隔离区释放砷，其又可以沉积在源极/漏极区的表面上。因此，本发明中描述的预硅化制备处理在金属硅化物形成之前特征是从导电表面除去天然氧化物和砷的缺陷。方法包括以氢氟酸和过氧化氢为特征的湿法蚀刻程序，以及在氢氟酸处理之后采用的旋转干燥和干蚀刻方法，以去除重新沉积的基于砷的缺陷。

3. 发明授权

US06530380B1 Method for selective oxide etching in pre-metal deposition 失效
标题翻译：在金属前沉积中选择性氧化物蚀刻的方法
公开(公告)号：US06530380B1
公开(公告)日：2003-03-11
申请号：US09443428
申请日：1999-11-19
申请人： Mei Sheng Zhou , Vincent Sih , Simon Chooi , Zainab Bte Ismail , Ping Yu Ee , Sang Yee Loong
发明人： Mei Sheng Zhou , Vincent Sih , Simon Chooi , Zainab Bte Ismail , Ping Yu Ee , Sang Yee Loong
IPC分类号： H01L21302
CPC分类号： H01L21/31116
摘要： A method for completely removing dielectric layers formed selectively upon a substrate employed within a microelectronics fabrication from regions wherein closely spaced structures such as self-aligned metal silicide (or salicide) electrical contacts may be fabricated, with improved properties and with attenuated degradation. There is first provided a substrate with employed within a microelectronics fabrication having formed thereon patterned microelectronics layers with closely spaced features. There is then formed a salicide block layer employing silicon oxide dielectric material which may be selectively doped. There is then formed over the substrate a patterned photoresist etch mask layer. There is then etched the pattern of the patterned photoresist etch mask layer employing dry plasma reactive ion etching. An anhydrous etching environment is then employed to completely remove the silicon oxide dielectric salicide block layer with attenuated degradation of the microelectronics fabrication.
摘要翻译：用于完全去除在微电子制造中使用的衬底上选择性地形成的介电层的方法，其中可以制造具有改进的性质和衰减劣化的紧密间隔的结构例如自对准金属硅化物（或自对准硅））电接触的区域。首先提供了在微电子制造中使用的衬底，其中形成有具有紧密间隔的特征的图案化微电子层。然后形成可以选择性掺杂的氧化硅介电材料的自对准硅化物阻挡层。然后在衬底上形成图案化的光致抗蚀剂蚀刻掩模层。然后使用干等离子体反应离子蚀刻蚀刻图案化的光致抗蚀剂蚀刻掩模层的图案。然后使用无水蚀刻环境以完全去除具有微电子制造的衰减的氧化硅介电硅化物阻挡层。

4. 发明授权

US07268048B2 Methods for elimination of arsenic based defects in semiconductor devices with isolation regions 有权
标题翻译：在具有隔离区域的半导体器件中消除基于砷的缺陷的方法
公开(公告)号：US07268048B2
公开(公告)日：2007-09-11
申请号：US10913214
申请日：2004-08-06
申请人： Yin-Min Felicia Goh , Simon Chooi , Teck Wee Lim , Vincent Sih , Chian Yuh Sin , Ping Yu Ee , Zainab Ismail , Cher Sian Chua
发明人： Yin-Min Felicia Goh , Simon Chooi , Teck Wee Lim , Vincent Sih , Chian Yuh Sin , Ping Yu Ee , Zainab Ismail , Cher Sian Chua
IPC分类号： H01L21/4763 , H01L21/44 , H01L21/302
CPC分类号： H01L21/02057 , H01L21/02068 , H01L21/28518 , H01L21/76237 , H01L21/823814 , H01L21/823878 , H01L29/665 , H01L29/7833
摘要： Methods of preparing conductive regions such as source/drain regions for silicidation procedures, has been developed. The methods feature removal of native oxide as well as removal of deposited arsenic based defects from conductive surfaces prior to deposition of a metal component of subsequently formed metal silicide regions. Arsenic ions implanted for N type source/drain regions are also implanted into insulator regions such as insulator filled shallow trench isolation regions. A hydrofluoric acid cycle used as a component of the pre-silicidation preparation procedure can release arsenic from the shallow trench isolation regions in the form of arsenic based defects, which in turn can re-deposit on the surface of source/drain region. Therefore pre-silicidation preparation treatments described in this invention feature removal of both native oxide and arsenic based defects from conductive surfaces prior to metal silicide formation. Methods include wet etch procedures featuring hydrofluoric acid and hydrogen peroxide, as well as spin dry and dry etch procedures both employed post hydrofluoric acid treatment to remove re-deposited arsenic based defects.
摘要翻译：已经开发了制备用于硅化程序的源极/漏极区域的导电区域的方法。该方法在沉积随后形成的金属硅化物区域的金属组分之前，特征在于去除自然氧化物以及从导电表面去除沉积的基于砷的缺陷。注入用于N型源极/漏极区域的砷离子也被注入绝缘体区域，例如绝缘体填充的浅沟槽隔离区域。用作预硅化物制备方法的组分的氢氟酸循环可以以基于砷的缺陷的形式从浅沟槽隔离区释放砷，其又可以沉积在源极/漏极区的表面上。因此，本发明中描述的预硅化制备处理在金属硅化物形成之前特征是从导电表面除去天然氧化物和砷的缺陷。方法包括以氢氟酸和过氧化氢为特征的湿法蚀刻程序，以及在氢氟酸处理之后采用的旋转干燥和干蚀刻方法，以去除重新沉积的基于砷的缺陷。

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